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SIMATIC S5 S5-100U Programmable Controller
System Manual CPU 100/102/103
EWA 4NEB 812 6120-02b
Edition 04
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STEP (R) SINEC (R) and SIMATIC (R) are registered trademarks of Siemens AG. LINESTRA(R) is a registered trademark of the OSRAM Company. Subject to change without prior notice. The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved.
Copyright(c) Siemens AG 1992
EWA 4NEB 812 6120-02b
Introduction
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The SIMATIC S5 System Family Technical Description Installation Guidelines Start-Up and Program Tests Diagnostics and Troubleshooting Addressing Introduction to STEP 5 STEP 5 Operations Integrated Blocks and Their Functions Interrupt Processing Analog Value Processing The Integral Real-Time Clock, for CPU 103 and Higher Connecting the S5-100U to SINEC L1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A/B/C D/E/F
Module Spectrum Function Modules Appendices Index
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EWA 4NEB 812 6120-02b
S5-100U
Contents
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Page How to Use This Manual ............................................. xv
1
The SIMATIC S5 System Family
..................................
1- 1
2
Technical Description 2.1 2.2 2.2.1 2.2.2
......................................... .............................
2- 1 2- 1 2- 3 2- 3 2- 6
Programmable Controller Design
Principle of Operation for the Programmable Controller . . . . . . . . . . . . . . Functional Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mode of Operation for the External I/O Bus . . . . . . . . . . . . . . . . . . . . . .
3
Installation Guidelines 3.1 3.1.1 3.1.2 3.1.3 3.1.4 3.2 3.2.1 3.2.2 3.2.3 3.2.4 3.3 3.3.1 3.3.2 3.3.3 3.4 3.4.1 3.4.2 3.4.3 3.4.4 3.4.5
.........................................
3- 1 3 3 3 3 3 3 3 3 3 3 3 3 3 3 1 1 5 7 8 9 9 12 13 18 20 20 21 25
Installing S5-100U Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Assembling a Tier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multi-Tier Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cabinet Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vertical Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connection Methods: Screw-Type Terminals and Crimp Snap-in ...... Connecting the Power Supply to the S5-100U . . . . . . . . . . . . . . . . . . . . Connecting Digital Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connecting the Digital Input/Output Module . . . . . . . . . . . . . . . . . . . . . . Electrical Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Configuration for the S5-100U . . . . . . . . . . . . . . . . . . . . . . . . Electrical Configuration with External I/Os . . . . . . . . . . . . . . . . . . . . . . . Non-Floating and Floating Configurations . . . . . . . . . . . . . . . . . . . . . . . . Wiring Arrangement, Shielding, and Measures to Guard against Electromagnetic Interference . . . . . . . . . . . . . . . . . . . . . . Running Cables Inside and Outside a Cabinet . . . . . . . . . . . . . . . . . . . . Running Cables Outside Buildings . . . . . . . . . . . . . . . . . . . . . . . . . . . . Equipotential Bonding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shielding Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Special Measures for Interference-Free Operation . . . . . . . . . . . . . . . . .
3 3 3 3 3 3
-
29 29 30 31 32 33
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Start-Up and Program Tests 4.1 4.1.1 4.1.2 4.1.3 4.2 4.2.1 4.2.2 4.3 4.4 4.4.1 4.4.2 4.5 4.6 4.7 4.8 4.9 4.10
.....................................
4- 1 4 4 4 4 1 1 1 2
Operating Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CPU Operator Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Performing an Overall Reset on the Programmable Controller . . . . . . . . . Starting Up a System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Suggestions for Configuring and Installing the Product . . . . . . . . . . . . . . Procedures for Starting Up the Programmable Controller . . . . . . . . . . . . Loading the Program into the Programmable Controller . . . . . . . . . . . . . . Backing Up the Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Backing Up the Program on a Memory Submodule ................ Function of the Back-Up Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program-Dependent Signal Status Display "STATUS" Direct Signal Status Display "STATUS VAR" ..............
4- 3 4- 3 4- 4 4- 5 4- 7 4- 7 4- 8 4- 8 4- 9 4 - 10 4 - 10 4 - 11 4 - 11
..................... ...............
Forcing Outputs, "FORCE", for CPU 103 and Higher Forcing Variables, "FORCE VAR"
............................
Search Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Check, for CPU 103 and Higher .......................
5
Diagnostics and Troubleshooting 5.1 5.2 5.2.1 5.2.2 5.2.3 5.2.4 5.3 5.3.1 5.3.2 5.4 5.5 5.6
................................
5- 1 5- 1 5 5 5 5 5 1 1 4 5 6
Indication of Errors by LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CPU Malfunctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "ISTACK" Analysis Function ................................ Interrupt Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Errors during Program Copying . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Explanation of the Mnemonics Used in "ISTACK" ................. Program Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Locating the Error Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tracing the Program with the "BSTACK" Function . . . . . . . . . . . . . . . . . I/O Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Last Resort .........................................
5- 8 5- 8 5 - 11 5 - 12 5 - 12 5 - 13
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Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 6.2 6.3 6.4 6.4.1 6.4.2 Slot Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Modules .........................................
6- 1 6- 1 6- 4 6- 5 6- 6 6- 6
6.4.3 6.5 6.5.1 6.5.2 6.6 6.6.1 6.6.2 6.7
Combined Input Modules and Output Modules . . . . . . . . . . . . . . . . . . . . Output Modules with Error Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . Digital Input/Output Module, 16 Inputs, 16 Outputs, 24 V DC for All CPUs Version 8MA02 and Higher and for CPU 102, Version 8MA01, Revision 5 and Higher . . . . . . . . . . . . . . . Function Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Structure of Process Image Input and Output Tables . . . . . . . . . . . . Accessing the Process Image Input Table (PII) . . . . . . . . . . . . . . . . . . . Accessing the Process Image Output Table (PIQ) . . . . . . . . . . . . . . . . . Interrupt Process Images Tables and Time-Controlled Program Processing in OB13 for CPU 103, Version 8MA02 and Higher . . . . . . . . . Accessing the Interrupt PII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accessing the Interrupt PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAM Address Assignments .................................
6- 7 6- 7 6- 8 6 - 10 6 - 11
6 - 12 6 - 12 6 - 14 6 - 15
7
Introduction to STEP 5 7.1 7.1.1 7.1.2 7.1.3 7.2 7.2.1 7.2.2 7.3 7.3.1 7.3.2 7.3.3 7.3.4 7.3.5 7.4 7.4.1 7.4.2 7.4.3 7.4.4
.........................................
7- 1 7 7 7 7 1 1 3 3
Writing a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Methods of Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operand Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Diagram Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Linear Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structured Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Organization Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sequence Blocks, for CPU 103 and Higher ..................... Function Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Processing with CPU 102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . START-UP Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cyclic Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Time-Controlled Program Processing, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7- 4 7- 4 7- 5 7 7 7 7 7 7 7 7 7 7 7 9 11 11 11 16 18 19 24 26
7 - 28
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7.4.5
Interrupt-Driven Program Processing, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Processing Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Changing Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Changing Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compressing the Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . Number Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 - 29 7 7 7 7 30 30 30 30
7.5 7.5.1 7.5.2 7.5.3 7.6
7 - 31
8
STEP 5 Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 8.1.6 8.1.7 8.1.8 8.1.9 8.2 8.2.1 8.2.2 8.2.3 8.2.4 8.2.5 8.2.6 8.2.7 8.2.8 8.2.9 8.2.10 8.2.11 8.3 8.3.1 8.3.2 8.3.3 8.3.4 8.4 8.5 8.5.1 8.5.2 8.5.3 Basic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Boolean Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Set/Reset Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Counter Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparison Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Arithmetic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Call Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supplementary Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load Operation, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . . . . . Enable Operation, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . . . . Bit Test Operations, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . . . Digital Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shift Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conversion Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Decrement/Increment, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . Disable/Enable Interrupt, for CPU 103 Version 8MA02 and Higher . . . . . . "DO" Operation, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . . . . . Jump Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Substitution Operations, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . System Operations, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . . . Set Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Arithmetic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Condition Code Generation .................................
8- 1 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1 2 7 10 15 25 30 31 33 38 39 40 41 42 44 48 50 52 53 54 56 58 64 64 64 67 68
8 - 69 8 8 8 8 71 71 71 73
Sample Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Momentary-Contact Relay/Edge Evaluation . . . . . . . . . . . . . . . . . . . . . . Binary Scaler/Binary Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clock/Clock-Pulse Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Integrated Blocks and Their Functions 9.1 9.1.1 9.1.2 9.1.3 9.1.4 9.1.5 9.1.6 9.1.7 9.1.8 9.2 9.2.1 9.2.2 9.2.3 9.2.4 9.2.5 9.3 9.3.1 9.3.2 9.3.3
.............................
9- 1
Assigning Internal Functions to DB1, for CPU 103 Version 8MA03 and Higher . . . . . . . . . . . . . . . . . . . . . . . . Configuration and Default Settings for DB1 . . . . . . . . . . . . . . . . . . . . . . Setting the Address for the Parameter Error Code in DB1 . . . . . . . . . . . . Assigning Parameters in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Rules for Setting Parameters in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . How to Recognize and Correct Parameter Errors . . . . . . . . . . . . . . . . . . Transferring DB1 Parameters to the Programmable Controller . . . . . . . . . Reference Guide for Setting Parameters in DB1 .................. Defining System Characteristics in DB1 . . . . . . . . . . . . . . . . . . . . . . . . Integrated Function Blocks, for CPU 102 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . Code Converter : B4 - FB240 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Code Converter : 16 - FB241 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiplier : 16 - FB242 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Divider : 16 - FB243 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Value Conditioning Modules FB250 and FB251 . . . . . . . . . . . . . . Integrated Organization Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Time Triggering OB31, for CPU 103 and Higher .............. Battery Failure OB34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OB251 PID Algorithm, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . .
9 9 9 9 9 9 9 9 9
-
1 1 2 4 4 6 9 10 11
9 9 9 9 9 9
-
11 12 12 13 13 14
9 - 14 9 - 14 9 - 14 9 - 15
10
Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.1 10.2 Interrupt Processing with OB2, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calculating Interrupt Reaction Times . . . . . . . . . . . . . . . . . . . . . . . . . .
10 - 1
10 - 1 10 - 5
11
Analog Value Processing 11.1 11.2 11.2.1 11.2.2 11.2.3 11.2.4 11.2.5 11.3 11.4
...................................... ....................................
11 - 1 11 - 1
Analog Input Modules
Connecting Current and Voltage Sensors to Analog Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage Measurement with Isolated or Non-Isolated Thermocouples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Two-Wire Connection of Voltage Sensors . . . . . . . . . . . . . . . . . . . . . . Two-Wire Connection of Current Sensors . . . . . . . . . . . . . . . . . . . . . . Connection of Two-Wire and Four-Wire Transducers . . . . . . . . . . . . . . Connection of Resistance Thermometers . . . . . . . . . . . . . . . . . . . . . . Start-Up of Analog Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Value Representation of Analog Input Modules .............
11 - 1 11 11 11 11 11 2 3 4 4 6
11 - 7 11 - 11
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11.5 Analog Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.5.1 Connection of Loads to Analog Output Modules . . . . . . . . . . . . . . . . . . 11.5.2 Analog Value Representation of Analog Output Modules . . . . . . . . . . . . 11.6 Analog Value Conversion: Function Blocks FB250 and FB251 . . . . . . . . 11.6.1 Reading in and Scaling an Analog Value - FB250 - . . . . . . . . . . . . . . . . 11.6.2 Outputting of Analog Values - FB251 - . . . . . . . . . . . . . . . . . . . . . . . .
11 - 19 11 - 19 11 - 20 11 - 22 11 - 22 11 - 25
12
The Integral Real-Time Clock, for CPU 103 Version 8MA02 and Higher 12.1 12.2 Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
...
12 - 1 12 - 1
Setting Parameters in DB1, for CPU 103 Version 8MA03 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.1 Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.2 Reading the Current Clock Time and the Current Date . . . . . . . . . . . . . 12.2.3 DB1 Parameters Used for the Integral Real-Time Clock . . . . . . . . . . . . 12.3 12.3.1 12.3.2 12.3.3 12.3.4 12.4 12.5 12.6 Programming the Integral Real-Time Clock in DB1, for CPU 103 Version 8MA03 and Higher . . . . . . . . . . . . . . . . . . . . . . . Setting the Clock in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Setting the Prompt Time in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Setting the Operating Hours Counter in DB1 . . . . . . . . . . . . . . . . . . . . Entering the Clock Time Correction Factor in DB1 . . . . . . . . . . . . . . . . Structure of the Clock Data Area ............................ .................
12 12 12 12
-
2 2 3 4
12 12 12 12 12
-
5 5 6 7 7
12 - 8 12 - 12
Structure of the Status Word and How to Scan It
Setting Parameters for the Clock Data Area and the Status Word in the System Data Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Integral Real-Time Clock in the User Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reading and Setting the Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Prompt Function . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Operating Hours Counter . . . . . . . . . . . . . . . . . . . . . Entering the Clock Time Correction Factor . . . . . . . . . . . . . . . . . . . . .
12 - 15
12.7 12.7.1 12.7.2 12.7.3 12.7.4
12 12 12 12 12
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21 21 25 30 35
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Connecting the S5-100U to SINEC L1, for CPU 102 and Higher 13.1
.........
13 - 1
Connecting the Programmable Controllers to the L1 Bus Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13 - 1
Setting Parameters in the Programmable Controller for Exchanging Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2.1 How to Program in a Function Block, for CPU 102 and Higher ....... 13.2.2 Setting Parameters in DB1, for CPU 103 and Higher . . . . . . . . . . . . . . 13.3 13.3.1 13.3.2 13.3.3 Coordinating Data Exchange in the Control Program . . . . . . . . . . . . . . . Sending Data ......................................... Receiving Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Messages in a Function Block . . . . . . . . . . . . . . . . .
13.2
13 - 1 13 - 2 13 - 5 13 13 13 13 7 8 9 11
14
Module Spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.1 14.2 14.3 14.4 14.5 14.6 14.6.1 14.6.2 14.6.3 General Technical Specifications Power Supply Modules Central Processing Units ............................
14 - 1 14 - 3 14 - 4 14 - 7 14 - 10 14 - 14 14 14 14 14 16 16 26 36
................................... .................................
Bus Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interface Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Input/Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.7 Analog Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7.1 Analog Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7.2 Analog Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14 - 38 14 - 38 14 - 56
15
Function Modules 15.1 15.2 15.3 15.4
........................................... ..................
15 - 1 15 - 1 15 - 4 15 - 7 15 - 9
Comparator Module 2x1 to 20 mA/0.5 to 10 V Timer Module 2x0.3 to 300 s Simulator Module Diagnostic Module
..............................
....................................... ......................................
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15.5 15.6 15.6.1 15.6.2 15.6.3 15.6.4 15.6.5
Counter Module 2x0 to 500 Hz
.............................
15 - 12 15 15 15 15 15 17 20 25 27 29
Counter Module 25/500 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Installation Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description of the Counter Mode . . . . . . . . . . . . . . . . . . . . Functional Description of the Position Decoder . . . . . . . . . . . . . . . . . . Entering New Setpoints for the Counter and Position Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.6.6 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.7 15.8 15.9 15.10 15.11 15.12 Closed-Loop Control Module IP 262 . . . . . . . . . . . . . . . . . . . . . . . . . . IP 263 Positioning Module ................................. ......................
15 - 38 15 - 39 15 - 41 15 - 45 15 - 49 15 - 52 15 - 55 15 - 59 15 - 62 15 - 62 15 - 65
IP 264 Electronic Cam Controller Module IP 265 High Speed Sub Control
.............................
Positioning Module IP 266 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stepper Motor Control Module IP 267 ........................
15.13 Communications Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.13.1 Printer Communications Module CP 521 . . . . . . . . . . . . . . . . . . . . . . 15.13.2 Communications Module CP 521 BASIC . . . . . . . . . . . . . . . . . . . . . .
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Appendices
A
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Operations List, Machine Code and List of Abbreviations A.1 A.1.1 A.1.2 A.1.3 A.1.4 A.2 A.3
..............
A- 1 A A A A A 1 1 8 13 14
Operations List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Basic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supplementary Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Operations, for CPU 102 and Higher . . . . . . . . . . . . . . . . . . . . . Evaluation of CC 1 and CC 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Machine Code Listing List of Abbreviations ..................................... ......................................
A - 15 A - 18 B- 1 C- 1 D- 1 E- 1 F- 1
B C D E F
Dimension Drawings
.......................................... ..................
Active and Passive Faults in Automation Equipment
Information for Ordering Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference Materials ...........................................
Siemens Addresses Worldwide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Index
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How to Use This System Manual
How to Use This System Manual
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The S5-100U is a programmable controller for lower and intermediate performance ranges. It meets all the requirements for a modern programmable controller. To use this controller optimally, you need detailed information. In this system manual we have attempted to present this information as completely and as well organized as possible. Certain information is repeated in various chapters so that you do not have to leaf through the manual to find what you need. This How to Use This System Manual section gives you information that will make it easier for you to find what you need. This section explains how the manual is organized.
Contents of This System Manual
* Hardware Description (Chapters 1, 2, and 3) These chapters describe the controllers: how they fit into the SIMATIC(R) S5 family of programmable controllers, how they function, and how you install them. Start-Up Information (Chapters 4, 5, and 6) These chapters summarize the information you need to start up your programmable controller. These chapters describe how the hardware and software influence each other. The Programming Language of the Programmable Controllers (Chapters 7, 8, and 9) These chapters describe the structure, operations, and structuring aids of the STEP(R) 5 programming language. Functions of the Programmable Controllers (Chapters 10, 11, 12, 13) Each of these chapters contains a complete description of a particular function, from wiring to programming. Subjects include analog value processing, counter and interrupt inputs, integral clock, and the programmable controller as a SINEC(R) L1 slave. Module Spectrum (Chapters 14 and 15) These chapters contain information about all the currently available S5-100U modules that you can use to expand your controller. Chapter 15, Function Modules, includes the modules that require an extensive description (i. e., more than just technical specifications). Overviews (Appendices) In these chapters you will find not only a complete list of operations but also dimension drawings, a description of errors that may occur during operation of the programmable controller, maintenance and repair procedures, a list of accessories, and reference literature about programmable controllers.
*
*
*
*
*
You will find correction pages at the end of the system manual. Use them to indicate any corrections, additions, or suggestions for improvement you might have. Send these suggestions to us. They will help us to improve the next edition of this system manual.
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Conventions
This system manual is organized in menu form to make it easier for you to find information. This means the following: * * * Each chapter is marked with printed tabs. At the front of the system manual is an overview page that lists the title of each chapter. Following this page, you will find a table of contents. At the beginning of each chapter is a table of contents for that chapter. Each chapter has three level headings that are numbered. The fourth level heading is not numbered but appears in boldface type. Pages, figures, and tables are numbered separately for each chapter. On the back of the table of contents for each chapter you will find a list of the figures and tables that appear in that chapter.
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*
This system manual employs the following specific structuring devices: * * Specific terms have characteristic abbreviations (e. g., programmer is PG). Appendix A contains a list of abbreviations. Footnotes are marked with a raised number (e. g., "1") or a raised asterisk (" * "). You will find the corresponding explanations in the lower margin of the page or under a figure or table if the footnote appears in one of these. Lists are designated with bullets (* as in this particular listing) or with hyphens (-). Cross references are indicated as follows: (see section 7.3.2). There are no references to specific page numbers. Dimensions in drawings are indicated in millimeters and inches. Value ranges are indicated as follows: 17 to 21 or 17-21. Especially important information appears in framed boxes such as the following:
* * * * *
Warning
You will find definitions for the terms "Warning," "Danger," "Caution," and "Note" in the SafetyRelated Guidelines for the User at the end of the introduction.
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Changes Made to the Second Edition of the S5-100U System Manual (Order Number: 6ES5 998-0UB22) www..com
S5-100U System Manual (Order Number 6ES5 998-0UB23) has been completely revised: * * The format was adapted to the other system manuals in the SIMATIC S5 family. The contents were updated and reorganized.
Some of the functions of CPU 103 have been expanded: * The default settings (default parameters) for DB1 have been integrated into CPU 103 version 8MA03. This feature makes it easier for you to use the internal CPU functions. The following chapters were included or completely revised in the system manual: - Chapter 9 "Integrated Blocks and Their Functions" - Chapter 12 "Integral Real-Time Clock, for CPU 103 Version 8MA02 and Higher" - Chapter 13 "Connecting the S5-100U to SINEC L1, for CPU 102 and Higher" * The execution times of some operations have been reduced considerably, compared to the "old" CPU 103. For the new execution times refer to the list of operations in Appendix A.
The S5-100U system has been expanded to include an additional module: * The "Communications Module CP 521 BASIC" is described in section 15.10.2.
Changes Made to the Third Edition of the S5-100U System Manual (Order Number: 6ES5 998-0UB23)
The contents were updated.
Training
Siemens offers a wide range of training courses for SIMATIC S5 users. Contact your Siemens representative for more information.
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Safety-Related Guidelines for the User
This document provides the information required for the intended use of the particular product. The documentation is written for technically qualified personnel. Qualified personnel as referred to in the safety guidelines in this document as well as on the product itself are defined as follows. * System planning and design engineers who are familiar with the safety concepts of automation equipment. * Operating personnel who have been trained to work with automation equipment and are conversant with the contents of the document in as far as it is connected with the actual operation of the plant. * Commissioning and service personnel who are trained to repair such automation equipment and who are authorized to energize, de-energize, clear, ground, and tag circuits, equipment, and systems in accordance with established safety practice. Danger Notices The notices and guidelines that follow are intended to ensure personal safety, as well as protect the products and connected equipment against damage. The safety notices and warnings for protection against loss of life (the users or service personnel) or for protection against damage to property are highlighted in this document by the terms and pictograms defined here. The terms used in this document and marked on the equipment itself have the following significance.
Danger indicates that death, severe personal injury or substantial property damage will result if proper precautions are not taken.
Warning indicates that death, severe personal injury or substantial property damage can result if proper precautions are not taken.
Caution indicates that minor personal injury or property damage can result if proper precautions are not taken. Proper Usage
Note contains important information about the product, its operation or a part of the document to which special attention is drawn.
Warning
* The equipment/system or the system components may only be used for the applications described in the catalog or the technical description, and only in combination with the equipment, components, and devices of other manufacturers as far as this is recommended or permitted by Siemens. The product will function correctly and safely only if it is transported, stored, set up, and installed as intended, and operated and maintained with care.
*
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1
The SIMATIC S5 System Family
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1-1
Members of the SIMATIC S5 System Family
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1- 1
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The SIMATIC S5 System Family
S5-100U
The S5-100U has the following features: *
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Modular Design
Depending on the CPU you use, the S5-100U allows you to have a maximum of 448 digital inputs and outputs. It is suitable for machine control and for process automation and monitoring on a medium scale. The S5-100U allows a broad expansion capability with various types of modules to adapt optimally to a control task. * Rugged, Lightweight Design All of the modules you can use with the S5-100U are block-type modules that are small, rugged, and easy to use. The modules operate without fans. None of these modules has electromagnetically sensitive electronics. The modules are plugged into bus units and screwed tightly so that they are vibration-proof. The bus units snap onto a standard mounting rail. You can configure the S5-100U in one or more tiers and configure it vertically or horizontally. The S5-100U offers such a wide range of configuration possibilities that you can use it in rough and difficult operating conditions. * Simple Programming The programming language is STEP 5 and its comprehensive operations set. It provides three different methods of representation, - four, if you have a CPU 103 or higher. You can use any of the U series programmers to program your S5-100U, or you can load programs from memory submodules.
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Technical Description Programmable Controller Design . . . . . . . . . . . . . . . . . . . . . . . . . Principle of Operation for the Programmable Controller . . . . . . . . . Functional Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mode of Operation for the External I/O Bus . . . . . . . . . . . . . . . . . 2- 1 2- 3 2- 3 2- 6
2.1 2.2 2.2.1 2.2.2
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2-1 2-2 2-3 2-4 2-5 2-6
The S5-100U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Units of the S5-100U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example of an Arithmetic Logic Unit's Mode of Operation ............ Accumulator Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structure of the External I/O Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 2 2 2 2 2
-
1 3 5 5 6 7
Tables 2-1 2-2 Retentive and Non-Retentive Operands . . . . . . . . . . . . . . . . . . . . . . . . . . Number of Bits per Module in the Shift Register . . . . . . . . . . . . . . . . . . . . 2- 5 2- 8
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Technical Description
S5-100U
Input/output modules
www..com Input/output modules
transfer information between the CPU and such process peripherals as sensors, actuators, and transducers. You can use the following types of input/output modules with your S5-100U: * * Digital input modules and digital output modules (4, 8, and 16/16 channel) - Use these modules for simple control tasks involving signal states "0" and "1" only. Analog input modules and analog output modules - Use these modules to record and generate such variable quantities as currents and voltages. Timer module - Use this module to set various times without having to change the program. Counter module - Use this module to count pulses up to 500 Hz. You can input comparison values without having to change the program. High-speed counter/position detection module - Use the high-speed counter to record high-speed counter pulses of 25/500 kHz. You can use this module for position detection in a positioning task. Comparator module - This module makes it possible for you to monitor preset comparison values, such as for current and voltage. Simulator module - Use this module to generate digital input signals or to display digital output signals. Diagnostic module - Use this module to check the function of the I/O bus. Communications module (CP) - Use this module to output message texts with the date and clock time to a connected printer. You can also use this module to connect to external systems. Intelligent I/O module (IP) - Use these intelligent input/output modules for such special tasks as temperature control and positioning tasks.
* *
*
*
* * *
*
Bus units with terminal blocks (Crimp-snap-in or SIGUT, screw type) Use bus units to connect the CPU to input/output modules. You can plug two input/output modules into a single bus unit. Interface modules (IM) Use these modules to assemble your S5-100U in a multi-tier configuration. Standard mounting rail Mount your programmable controller on the standard mounting rail.
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2.2
Principle of Operation for the Programmable Controller
The remainder of this chapter explains how your S5-100U processes your program.
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2.2.1
CPU
Functional Units
Program memory
Timers
Counters
Flags
Process I/O image tables
Interrupt process I/O image tables*
System data
RAM
ROM
(operating
system) ALU (ACCU 1 and 2, bit-ACCU (RLO)) Processor
Memory submodule
Serial port
I/O bus
Digital modules: - input - output
Analog modules: - input - output
Function modules
I/O modules * Beginning with CPU 103, version 8MA02 Figure 2-2. Functional Units of the S5-100U
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Technical Description
S5-100U
Program Memory (EPROM/EEPROM)
www..com In order to safely store the control program outside of your S5-100U, you must store it on an EPROM or EEPROM memory submodule (see section 4.4). Programs that are available on a memory submodule (EPROM or EEPROM) can be copied to the internal program memory (see section 4.3). This internal program memory is a reserved area of the CPU's internal RAM memory.
The internal RAM memory has the following characteristics: * * The memory contents can be changed quickly. Memory contents are lost when there is a supply voltage failure and there is no battery backup.
Operating System (ROM) The operating system contains system programs that determine how the user program is executed, how inputs and outputs are managed, how the memory is divided, and how data is managed. The operating system is fixed and cannot be changed.
Process Image Tables (PII, PIQ) Signal states of input and output modules are stored in the CPU in "process image tables". Process image tables are reserved areas in the RAM of the CPU. Input and output modules have the following separate image tables: * * Process image input table (PII) Process image output table (PIQ)
Serial Interface You can connect programmers, operator panels, and monitors to the serial port (cable connector). You can use the serial port to connect your S5-100U as a slave to the SINEC L1 local area network.
Timers, Counters, Flags The CPU has timers, counters, and flags available internally that the control program can use. The program can set, delete, start, and stop the timers and counters. The time and count values are stored in reserved areas of the RAM memory. There is another area in the RAM memory where information such as intermediate results can be stored as flags. You can address the flags by bits, bytes, or words. If battery backup is available, then some of the flags and counters remain in the internal RAM memory even if the supply voltage fails or your S5-100U is switched off. These flags and counters are retentive.
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Table 2-1 gives information about the number and retentive characteristics (the internal memory contents are retained/are not retained) of these timers, counters, and flags. www..com Table 2-1. Retentive and Non-Retentive Operands Retentive Operand CPU 100 to 103 Flags Counters Timers 0.0 to 63.7 0 to 7 CPU 100 64.0 to 127.7 8 to 15 0 to 15 CPU 102 64.0 to 127.7 8 to 31 0 to 31 CPU 103 64.0 to 255.7 8 to 127 0 to 127 Non-Retentive
Arithmetic Unit The arithmetic unit (ALU) consists of two accumulators, ACCU 1 and 2. The accumulators can process byte and word operations. Load information from the PII. Process information in ACCU 1 and ACCU 2. Transfer information to the PIQ.
Figure 2-3. Example of an Arithmetic Logic Unit's Mode of Operation Accumulator Design ACCU 2
15 8 7 0 15
ACCU 1
8 7 0
High byte
Low byte
High byte Figure 2-4. Accumulator Design
Low byte
Processor According to the control program, the processor calls statements in the program memory in sequence and executes them. It processes the information from the PII and takes into consideration the values of internal timers and counters as well as the signal states of internal flags.
External I/O Bus The I/O bus is the electrical connection for all signals that are exchanged between the CPU and the S5-100U modules in a programmable controller.
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Technical Description
S5-100U
2.2.2
Mode of Operation for the External I/O Bus
The S5-100U has a serial bus for the transfer of data between the CPU and the I/O modules. This serial bus has the following characteristics: * * * * The modular design permits optimal adaptation to the particular control task. No addresses have to be set on the I/O modules. A terminating resistor connector is not required. Direct access to individual modules is not possible.
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A number of shift registers moves the data (Figure 2-5). Four data bits and one check bit for bus monitoring are assigned to each slot in the bus unit. All modules requiring more than four data bits have their own shift register and therefore do not have to use the shift register of the particular slot.
Slot number
Data ring bus
CPU
0
1
2 5 Bits
3
Shift register of a slot Shift register of an 8-channel digital module or of an analog module
n x 5 Bits n=2, 4, 6 to 16
Figure 2-5. Structure of the External I/O Bus
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Technical Description
Data Cycle
www..com Prior to a program scan, the external I/O bus transfers current information from the input modules to the process image input table (PII). At the same time, information contained in the process image output table (PIQ) is transferred to the output modules.
Data cycle Shift data
Program scanning
Shift data
Time axis Transfer data from the shift register to the output modules. Load data from the input modules into the shift register. Figure 2-6. Data Cycle
Interrupt Data Cycle, for CPU 103 version 8MA02 and higher There is an interrupt input data cycle prior to each time-controlled or interrupt-driven program scan. Before a time-controlled program scan, current information about the input modules is read into the interrupt PII. Before an interrupt-driven program scan, interrupt inputs on slots 0 and 1 only are read into the interrupt PII. Following a time-controlled program scan, there is not an interrupt output data cycle until data has been moved into the interrupt PIQ via a transfer operation (see section 6.6.2). Information is output from the interrupt PIQ to the output modules during an interrupt output data cycle. The PIQ is updated.
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Technical Description
S5-100U
Length of the Shift Register
www..com The total length of the shift register is obtained from the sum of the data bits of all plugged-in modules and of the empty slots. The check bit is not counted. You must know the length of the shift register to be able to determine the data cycle time. Data cycle time is 25 s x number of data bits.
Table 2-2. Number of Bits per Module in the Shift Register Plugged-in Module Diagnostic module or vacant slot 4-channel digital input and output modules 500 Hz comparator module, 500 Hz timer module, 500 Hz counter module 25 KHz counter module 8-channel digital input and output modules Digital input and output module, 16 inputs/16 outputs Simulator module Analog modules for each activated channel CP 521, IP 262, IP 266, IP 267 Refer to the individual manuals for information on other modules. *
This does not apply to the 466-8MC11 analog input module (8 data bits).
Number of Data Bits 4 4 4 32 8 16 8 16* 64
The CPU specifies the maximum length of the shift register in a particular configuration. * * * CPU 100: CPU 102: CPU 103: 256 data bits, 128 (max.) of these from analog modules 480 data bits, 256 (max.) of these from analog modules 704 data bits, 512 (max.) of these from analog modules
Note
If the maximum expansion allowed is exceeded, the S5-100U goes into the STOP mode. The "PEU" bit (I/O not ready) is set in the ISTACK.
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Technical Description
Examples: a) CPU 100:
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This CPU lets you operate six digital modules (8-channel) and two analog modules (4-channel): [6 x 8+2 x (4 x 16)]=48+128<256
b) CPU 100:
This CPU does not let you use three digital modules (8-channel) with three analog modules (4-channel) because the maximum permissible number of analog data bits would be exceeded: [3 x 8+3 x (4 x 16)]=24+192<256
c) CPU 102:
This CPU lets you operate seven digital modules (8-channel) and four analog modules (4-channel): [7 x 8+4 x (4 x 16)]=56+256<480
d) CPU 102:
This CPU does not let you use 20 digital modules (8-channel) with 5 analog modules (4-channel) because the maximum permissible number of analog data bits would be exceeded: [20 x 8+5 x (4 x 16)]=160+320=480
e) CPU 103:
This CPU lets you operate 24 digital modules (8-channel) and eight analog modules (4-channel): [24 x 8+8 x (4 x 16)]=192+512=704
f)
CPU 103:
This CPU does not let you use 31 digital modules (8-channel) with four analog modules (2-channel) because the maximum permissible number of slots would be exceeded: [31 x 8+4 x (2 x 16)]=248+128<704
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3
Installation Guidelines Installing S5-100U Components . . . . . . . . . . . . . . . . . . . . . . . . . Assembling a Tier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multi-Tier Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cabinet Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vertical Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connection Methods: Screw-Type Terminals and Crimp Snap-in . . Connecting the Power Supply to the S5-100U . . . . . . . . . . . . . . . Connecting Digital Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connecting the Digital Input/Output Module . . . . . . . . . . . . . . . . . Electrical Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Configuration for the S5-100U . . . . . . . . . . . . . . . . . . . . Electrical Configuration with External I/Os . . . . . . . . . . . . . . . . . . . Non-Floating and Floating Configurations . . . . . . . . . . . . . . . . . . . Wiring Arrangement, Shielding, and Measures to . . . . . . . . . . . . . Guard against Electromagnetic Interference Running Cables Inside and Outside a Cabinet . . . . . . . . . . . . . . . Running Cables Outside Buildings . . . . . . . . . . . . . . . . . . . . . . . . Equipotential Bonding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shielding Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Special Measures for Interference-Free Operation . . . . . . . . . . . . . 3 3 3 3 3 3 3 3 3 3 3 3 3 3 1 1 5 7 8 9 9 12 13 18 20 20 21 25
3.1 3.1.1 3.1.2 3.1.3 3.1.4 3.2 3.2.1 3.2.2 3.2.3 3.2.4 3.3 3.3.1 3.3.2 3.3.3 3.4 3.4.1 3.4.2 3.4.3 3.4.4 3.4.5
3 - 29 3 3 3 3 3 29 30 31 32 33
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Figures
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3-1 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 3-12 3-13 3-14 3-15 3-16 3-17 3-18 3-19
3-20 3-21 3-22 3-23 3-24 3-25 3-26 3-27 3-28
Mounting the PS 930 Power Supply Module . . . . . . . . . . . . . . . . . . . . . . . Removing Bus Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Coding System to Prevent an Inadvertent Interchange of Modules . . . . . . . . Interconnecting Tiers with Interface Modules (6ES5 316-8MA12) ........ Multi-Tier Configuration in a Cabinet with the IM 316 Interface Module (6ES5 316-8MA12) . . . . . . . . . . . . . . . . . . . . . . . Cabinet Mounting with a Series of Devices . . . . . . . . . . . . . . . . . . . . . . . . Vertically Mounting a Programmable Controller . . . . . . . . . . . . . . . . . . . . . . SIGUT/Screw-Type Connection Method . . . . . . . . . . . . . . . . . . . . . . . . . . Mounting the Crimp Snap-in Terminal ........................... Disconnecting a Terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connecting a Power Supply Module and a CPU . . . . . . . . . . . . . . . . . . . . . Two-Wire Connection of a Sensor to Channel 2 . . . . . . . . . . . . . . . . . . . . . Two-Wire Connection of a Lamp to Channel 3 . . . . . . . . . . . . . . . . . . . . . . Connecting a Sensor to Channel 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connecting a Lamp to Channel 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Front View of the Digital I/O Module with a Crimp Snap-In Connector (simplified view and not true to scale) ........................... Connecting a Sensor and a Load to Digital Input/Output Module 482 . . . . . . Configuration Possibility: S5-100U with 115/230 V AC Power Supply for Programmable Controller, Sensors, and Actuators . . . . . . . . . . . . . . . . . Configuration Possibility: S5-100U with 24 V DC Power Supply (with Safe Electrical Isolation According to DIN VDE 0160) for Programmable Controller, Sensors, and Actuators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Non-Grounded Operation; 24 V DC Power Supply (with Safe Electrical Isolation According to DIN VDE 0160) for Programmable Controller and I/Os . . . Example: Non-Floating Connection of I/Os to the S5-100U . . . . . . . . . . . . . Simplified Representation of a Non-Floating I/O Connection . . . . . . . . . . . . Simplified Representation of a Galvanically Isolated Connection of the I/Os to the S5-100U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A Simplified Representation of a Floating I/O Connection . . . . . . . . . . . . . . Laying Equipotential Bonding Conductor and Signal Label . . . . . . . . . . . . . . Fixing Shielded Cables with Various Types of Cable Clamps . . . . . . . . . . . . Wiring Coils . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Measures for Suppressing Interference from Fluorescent Lamps in the Cabinet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 3 3 3 3 3 3 3 3 3 3 3 3 3 3
-
2 3 4 5 7 8 8 9 10 11 12 14 15 16 17
3 - 18 3 - 19 3 - 22
3 - 23 3 - 24 3 - 25 3 - 26 3 3 3 3 3 27 28 31 33 33
3 - 34
Tables 3-1 3-2 3-3 Installing, Removing, and Changing S5-100U Components . . . . . . . . . . . . Connecting the Load Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Rules for Common Running of Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3- 1 3 - 13 3 - 29
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S5-100U
Installation Guidelines
3
3.1
Installation Guidelines
Installing S5-100U Components
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Except for the I/O module, all of the S5-100U components are mounted on standard mounting rails in accordance with DIN EN 50022-35x15. Mount the rails on a metal plate to obtain the same reference potential. Bus units with a SIGUT/screw-type, or crimp snap-in connection method have different heights. If you install, remove, or change any parts of your S5-100U system, your system must be in the state indicated in Table 3-1. Table 3-1. Installing, Removing, and Changing S5-100U Components Installing, Removing, and Changing: I/O modules Bus units Interface modules CPU power supply
X=not relevant
S5-100U Power Status X Power OFF Power supply voltage OFF
S5-100U Operating Mode STOP X X
Load Voltage OFF X X
3.1.1
Assembling a Tier
You need the following components to configure the S5-100U: * * * * Power supply module Central processing unit Bus units I/O modules
If you do not have a 24 V DC power supply, you must have a power supply module. Mount the first module on the extreme left end of the standard mounting rail. Add other modules to the right of the first module.
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3-1
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Installation Guidelines
S5-100U
Installing an Interface Module
www..com 1. Hook the interface module to the standard mounting rail. 2. Swing the interface module back until the slide on the bottom snaps into place on the rail. 3. Use the ribbon cable to connect the module to the last bus unit. 4. Use connecting cable 712-8 to join the two interface modules. 5. Connect the cable to the "out" socket on the programmable controller tier and to the "in" socket on the expansion tier. 6. Securely screw the connecting cable plugs in place. Use two screws for each connecting cable plug.
Removing an Interface Module 1. Only for the IM 316: Remove the hold-down screws from the plugs and remove the connecting cable. 2. Remove the connecting ribbon cable from the adjacent bus unit. 3. Use a screwdriver to press down on the slide located on the bottom of the interface module. 4. Swing the module up and out of the standard mounting rail.
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S5-100U
Installation Guidelines
3.1.3
Cabinet Mounting
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Make sure that the S5-100U, the power supply, and all modules are well grounded. Mount the S5-100U on a metal plate to help prevent noise. There should be electrical continuity between the grounded enclosure and the mounting rails. Make sure that the system is bonded to earth. You can use the 8LW system or the 8LX system mounting plates (see Catalog NV 21). Adequate ventilation and heat dissipation are important to the proper operation of the system. You must have at least 210 mm (8.3 in.) between each mounting rail (see Figures in Appendix B) for proper ventilation. Always locate the power supply and the CPU on the lowest tier to ensure better heat dissipation. To measure cabinet ventilation, define the total heat loss by calculating the sum of all typical heat losses (see Catalog ST 52.1). IM 316 interface module Metal plate
At least 210 mm (8.3 in.)
At least 210 mm (8.3 in.) CPU
Figure 3-5.
Multi-Tier Configuration in a Cabinet with the IM 316 Interface Module (6ES5 316-8MA12)
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Installation Guidelines
S5-100U
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Wiring devices and/or cable duct a At least 45 mm (1.77 in.) CPU
210 mm+a (8.3 in.+a)
Figure 3-6. Cabinet Mounting with a Series of Devices
3.1.4
Vertical Mounting
You can also mount the standard mounting rails vertically and then attach the modules one over the other. Because heat dissipation by convection is less effective in this case, the maximum ambient temperature allowed is 40 C (104 F). Use the same minimum clearances for a vertical configuration as for a horizontal configuration. You must install a clamp (see Catalog SA 2) on the lower end of the programmable controller tier to hold the modules mechanically in position.
CPU Clamp Figure 3-7. Vertically Mounting a Programmable Controller
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Installation Guidelines
3.2 3.2.1
Wiring Connection Methods: Screw-Type Terminals and Crimp Snap-in
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SIGUT Screw-Type Terminal When using screw-type terminals, you can clamp two cables per terminal. It is best to use a 3.5-mm screwdriver to tighten the screws. Permissible cable cross-sections are: * * A stranded conductor with a core end sleeve: A solid conductor: 2 x 0.5 to 1.5 mm2 2 x 0.5 to 2.5 mm2
M3 screw Wire clamp Cables
Figure 3-8. SIGUT/Screw-Type Connection Method
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S5-100U
Installation Guidelines
3.2.3
Connecting Digital Modules
All I/O modules are plugged into bus units. Connect the I/O modules to the terminal blocks of the bus units. The connections illustrated in this section are of the screw terminal type (SIGUT connection method). You can also use the crimp snap-in connection method described in section 3.2.1. In both cases, the terminal assignments are marked on the terminal blocks. The assignments listed in Table 3-2 always apply for connecting the load voltage. Table 3-2. Connecting the Load Voltage Load Voltage 24 V DC 115/230 V AC
*
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Terminal 1 L+ L1
Terminal 2 M N
115/230 V AC digital modules can be operated with a load voltage of 120/230 V AC.
Note
For digital outputs, energy is temporarily stored in an internal capacitor for about 100 ms after the L+ supply is switched off. Please note that this energy may be sufficient to activate low-rating loads (e.g., pulse valves) for a triggered output.
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Installation Guidelines
S5-100U
Connecting Four-Channel Digital Modules
www..com All of these modules are designed for a two-wire connection. You can therefore wire directly to the sensor or output field device. An external distribution block is not required.
The four channels of a module are numbered from .0 through .3. (Numbers .4 through .7 are only significant for the ET 100 distributed I/O system.) Each channel has a pair of terminals on the terminal block. The terminal assignments and the connection diagram are printed on the front plate of the module. Connecting Four-Channel Input Modules Example: Connecting a sensor to channel 2 (address I 3.2) on the input module in slot 3 (see Figure 3-12)
F .0 .4
1 2 3 4
L+ M
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
1
3
5
7
9
4
2
DIGITAL INPUT
4 x 24 - 60 V DC 6ES5 430-8MB11 1 2 3 4 5 6
4
6
8
10
L+
M
Sensor
Figure 3-12. Two-Wire Connection of a Sensor to Channel 2
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Installation Guidelines
Connecting Four-Channel Output Modules
www..com Example: Connecting a lamp to channel 3 (address Q 1.3) on the output module in slot 1 (see Figure 3-13)
F .0 .4
1 2 3 4
L+ M
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
1
3
5
7
9
5
2
DIGITAL OUTPUT
4 x 24 V DC/2 A 6ES5 440-8MA22 1 2 3 4 5 6
4
6
8
10
L+
M
Lamp
Figure 3-13. Two-Wire Connection of a Lamp to Channel 3
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S5-100U
Connecting Eight-Channel Digital Modules
www..com These modules do not have a two-wire connection. You therefore need an external distribution block.
The eight channels of a module are numbered from .0 through .7. One terminal on the terminal block is assigned to each channel. The terminal assignment and the connection diagram are printed on the front plate of the module. Connecting Eight-Channel Input Modules The sensors must be connected to terminal 1 via the L+ terminal block. Example: Connecting a sensor to channel 4 (address I 3.4) on an input module in slot 3 (see Figure 3-14)
1 F
L+
2M
.0 .1 .2 .3 .4 .5 .6 .7
4 3 6 5 8 7 10
1
9
3
5
7
9
4
2
4
6
8
10 Sensor
DIGITAL INPUT
8 x 24 V DC 6ES5 421-8MA12 1 2 3 4 5 6
L+
M
L+Terminal Figure 3-14. Connecting a Sensor to Channel 4
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Installation Guidelines
Connecting Eight-Channel Output Modules The actuators must be connected to terminal 2 via the M (negative) terminal block. This does not apply to the digital output module 8x 5 to 24 V DC/0.1 A (see section 14.6.2). Example: Connecting a lamp to channel 6 (address output Q 5.6) on an output module in slot 5 (see Figure 3-15)
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1 2
L+ M
.0 .1 .2 .3 .4 .5 .6 .7
4 3 6 5 8 7 10 9
1
3
5
7
9
5
2
DIGITAL OUTPUT
8 x 24 V DC/0.5 A 6ES5 441-8MA11 12 3 4 5 6
4
6
8
10 Lamp
L+
M
M Terminal Figure 3-15. Connecting a Lamp to Channel 6
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S5-100U
3.2.4
Connecting the Digital Input/Output Module
Use only slots 0 through 7 when you plug the module into the bus unit. Use a 40-pin cable connector with a screw-type connection or crimp snap-in connection for wiring. The module does not have a two-wire connection. You must therefore use an external distribution block. Every channel is assigned a terminal on the 40-pin connector. The channel numbers are printed on the front plate. The 16 channels on the input side (IN) are numbered from n.0 through n.7 and from n+1.0 through n+1.7. The 16 channels on the output side (OUT) are numbered from n.0 through n.7 and from n+1.0 through n+1.7. "n" is the start address of the slot. Slot 0, for example, has the start address of n=64 (see chapter 6).
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OUT n+1 L+ .0 .1 .2 .3 .4 .5 .6 .7 M L+ .0 .1 .2 .3 .4 .5 .6 .7 M
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
IN b
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
n+1
0.5 A
n
n
0.5 A
L+ .0 .1 .2 .3 .4 .5 .6 .7 NC NC .0 .1 .2 .3 .4 .5 .6 .7 M
40-pin crimp snap-in connector
Figure 3-16. Front View of the Digital I/O Module with a Crimp Snap-In Connector (simplified view and not true to scale)
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Installation Guidelines
Example:
A sensor www..com
The start address for the modules is 65.3. Inputs and outputs have the same address. is to be connected to input I 64.4 and a lamp to output Q 7.3. Figure 3-17 illustrates the wiring on the front connector.
OUT L+
1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
IN L+
A 65.3
4 5 6 7 8
M
9 10 11 12 13 14 15 16 17 18 19 20
E 64.4
M
L+ M
Lamp M L+ Sensor
M Terminal
L+Terminal
Figure 3-17. Connecting a Sensor and a Load to Digital Input/Output Module 482
Note
Chapter 11 describes how to connect analog modules.
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3.3 3.3.1
Electrical Configuration Electrical Configuration for the S5-100U
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Power Supply The entire control for the S5-100U consists of the following separate electrical circuits: * * * Control circuit for the S5-100U (24 V DC) Control circuit for the sensors (24 V DC) Load circuit for the actuators (24 V DC or 115/230 V AC)
Control Circuit The power source for the control circuit supplies the CPU, the bus units, the programmer interface, and the internal control circuits for the I/O modules. When the incoming supply is 24 V DC/1 A, the PS 931 power supply module provides an internal supply of +9 V up to a total of 1 A current input to the I/O modules. The grounding spring on the CPU forces the control circuit to be connected to the standard mounting rail. The grounding spring must also be protected from interference. The grounding spring must be grounded. Load Circuit The power source for the load circuit supplies the actuators of the process peripherals. It is suggested that you use one of the following for a 24 V DC power supply: * * The PS 931 power supply module (see Chapter 14) A Siemens load power supply from the 6EV1 series (see Appendix D)
If you use load power supplies other than the recommended ones, make certain that the load voltage is in the range of 20 to 30 V (including ripple).
Note
If you use a switched-mode power supply unit to supply floating analog modules and BEROs, then this supply must be filtered through a network.
You can connect several mutually independent load circuits adjacent to each other on a single programmable controller. These connections can either be non-floating or floating (see section 3.3.3).
3-20
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Installation Guidelines
3.3.2
Electrical Configuration with External I/Os
Figures 3-18, 3-19, and 3-20 display different configuration possibilities. Pay attention to the following points when you design your configuration. The numbers appearing in parentheses in the following points refer to the numbers in Figures 3-18 to 3-20. * * You must have a main switch (1) in accordance with VDE 0100 for your S5-100U, the sensors, and the actuators. You do not need an additional fuse (2) to connect your S5-100U and the load circuit to power if your radial lines are a maximum of 3 meters (9.84 feet) long and are inherently earth-fault proof and short-circuit proof. You need a load power supply (3) for 24 V DC load circuits. - You need a back-up capacitor (rating: 200 F per 1 A of load current) if you have nonstabilized load power supplies. If you have AC load circuits, galvanic isolation via a transformer (4) is recommended. You should ground the load circuit at one end. Provide a removable connection (5) to the ground conductor on the load power supply (terminal M) or on the isolating transformer. - You must provide earth-fault monitoring for any non-grounded load circuits. You must separately fuse (6 and 7) the load voltage for sensor circuits and for actuator circuits. You must connect the standard mounting rail of the S5-100U to the ground conductor through a capacitor (8, to suppress high-frequency noise) for a non-grounded configuration. You must have a low-resistance connection between the standard mounting rail and the cabinet's chassis ground (10) for a grounded configuration. You need a power fuse (9) to protect against a short-circuit occurring in the power supply.
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* *
* * * *
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L1 www..com L2 L3 N PE (2) (9)
(1)
(5)
(4)
PS
CPU
(10)
DI
1 2
DI
1 2
DO DO
1 2 1 2
(6) (7)
230 V AC Figure 3-18. Configuration Possibility: S5-100U with 115/230 V AC Power Supply for Programmable Controller, Sensors, and Actuators
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L1 L2 L3 N PE
(1)
(2)
(5) M L+
(3)
CPU
L+ M
DI
1 2
DI
1 2
DO DO
1 2 1 2
(10) (6) (7)
M Figure 3.19
L+ Configuration Possibility: S5-100U with 24 V DC Power Supply (with Safe Electrical Isolation According to DIN VDE 0160) for Programmable Controller, Sensors, and Actuators
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L1 L2 L3 N PE
(1)
(2) 100 K (3) M L+
(8)
1 F/ 500 V AC CPU
Install the standard mounting rail electrically isolated
L+ M
DI
1 2
DI
1 2
DO DO
1 2 1 2
(6) (7)
M
L+
Figure 3-20. Non-Grounded Operation; 24 V DC Power Supply (with Safe Electrical Isolation According to DIN VDE 0160) for Programmable Controller and I/Os
Interference voltages are discharged to the ground conductor (PE) via a capacitor. You can prevent static charges by connecting a high-ohmic resistor (approx. 100 k / W) parallel to the capacitor.
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Installation Guidelines
3.3.3
Non-Floating and Floating Configurations
The S5-100U is powered by its own control circuit. The I/Os are powered by the load circuit. The circuits can either be connected to the same grounding point (non-floating) or galvanically isolated (floating).
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Example of a Non-Floating Connection of Digital Modules A 24 V DC load circuit has the same chassis grounding as the control circuit of the CPU.
Central grounding point
PS
CPU
L+ M
Common chassis ground
M L+
Load power supply Figure 3-21. Example: Non-Floating Connection of I/Os to the S5-100U
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S5-100U
The common chassis grounding connection makes it possible for you to use reasonably priced nonfloating I/Os. These modules function according to the following principles. www..com * Input modules - The ground line, line M (control circuit chassis) is the reference potential. A voltage drop V1 on line affects the input signal level VI. Output modules - Terminal 2 (M) of the terminal block is the reference potential. A voltage drop V2 on the line raises the chassis potential of the output driver and thus reduces the resulting control voltage VCV.
*
Figure 3-22 shows a simplified connection of the S5-100U with a non-floating external I/O.
+9 V Data GND
VCV
CPU
L+ M
VI 1 2
V1
L+
24 V DC supply V2
M
Figure 3-22. Simplified Representation of a Non-Floating I/O Connection
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Installation Guidelines
When you have a non-floating configuration, you must make certain that the voltage drop on cables and does not exceed 1 V. If 1 V is exceeded, the reference potentials could change www..com and the modules could malfunction.
Warning
If you use non-floating I/O modules, you must provide an external connection between the chassis ground of the non-floating I/O module and the chassis ground of the CPU.
Example of a Floating Configuration with Digital Modules Floating configuration is required in the following situations. * * * When you need to increase interference immunity in the load circuits When load circuits cannot be interconnected When you have AC load circuits
If you have a floating configuration, the PLC's control circuit and the load circuit must be galvanically isolated. Figure 3-23 shows a simplified connection of galvanically isolated I/Os. Central grounding point
PS
CPU
L+ M
L+
M
Load power supply Figure 3-23. Simplified Representation of a Galvanically Isolated Connection of the I/Os to the S5-100U
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S5-100U
Figure 3-24 shows a simplified schematic for the connection of floating I/O modules.
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* * * *
+9 V Data GND
CPU
1L+ M
L1 N
* *
2L+ 2M
Figure 3-24. A Simplified Representation of a Floating I/O Connection
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3.4
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Wiring Arrangement, Shielding and Measures against Interference
This section describes the wiring arrangements for bus cables, signal cables, and power supply cables that guarantee the electromagnetic compatibility (EMC) of your installation.
3.4.1
Running Cables Inside and Outside a Cabinet
Dividing the lines into the following groups and running the groups separately will help you to achieve electromagnetic compatibility (EMC). Group A: Shielded bus and data lines (for programmer, OP, printer, SINEC L1, Profibus, Industrial Ethernet, etc.) Shielded analog lines Unshielded lines for DC voltage 60 V Unshielded lines for AC voltage 25 V Coaxial lines for monitors Unshielded lines for DC voltage > 60 V and 400 V Unshielded lines for AC voltage > 25 V and 400 V Unshielded lines for AC voltage > 400 V
Group B:
Group C:
You can use the following table to see the conditions which apply to the running of the various combinations of line groups.
Table 3-3. Rules for Common Running of Lines Group A Group A Group B Group C Group B Group C
Legend for table: Lines can be run in common bundles or cable ducts Lines must be run in separate bundles or cable ducts (without minimum distance) Inside cabinets, lines must be run in separate bundles or cable ducts and outside cabinets but inside buildings, lines must be run on separate cable trays with a gap of a least of 10 cm between lines.
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3.4.2
Running Cables Outside Buildings
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Run lines outside buildings where possible in metal cable supports. Connect the abutting surfaces of the cable supports galvanically with each other and ground the cable supports. When you run cables outdoors, you must observe the regulations governing lightning protection and grounding. Note the general guidelines: Lightning Protection If cables and lines for SIMATIC S5 devices are to be run outside buildings, you must take measures to ensure internal and external lightning protection. Outside buildings run your cables either In metal conduits grounded at both ends or In steel-reinforced concrete cable channels
Protect signal lines from overvoltage by using: * * Varistors or Lightning arresters filled with inert gas
Install these protective elements at the point where the cable enters the building.
Note
Lightning protection measures always require an individual assessment of the entire system. If you have any questions, please consult your local Siemens office or any company specializing in lightning protection.
Grounding Make certain that you have sufficient equipotential bonding between the devices.
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3.4.3
Equipotential Bonding
Potential differences may occur between separate sections of the system if * Programmable controllers and I/Os are connected via non-floating interface modules or * Cables are shielded at both ends but grounded via different sections of the system. Potential differences may be caused, for instance, by differences in the system input voltage. These differences must be reduced by means of equipotential bonding conductors to ensure proper functioning of the electronic components installed. Note the following for equipotential bonding: * * A low impedance of the equipotential bonding conductor makes equipotential bonding more efficient. If any shielded signal cables connected to earth/protective earth at both ends are laid between the system sections concerned, the impedance of the additional equipotential bonding conductor must not exceed 10 % of the shield impedance. The cross-section of the equipotential bonding conductor must be matched to the maximum compensating currents. The following cross-sections are recommendable: - 16 mm2 copper wire for equipotential bonding line up to 200 m (656.2 ft). - 25 mm2 copper wire for equipotential bonding line over 200 m (656.2 ft). Use equipotential bonding conductors made of copper or zinc-plated steel. Equipotential bonding conductors are to be connected to earth/protective earth via a large contact area and to be protected against corrosion. The equipotential bonding conductor should be laid in such a way as to achieve a relatively small contact area between equipotential bonding conductor and signal cables (see Figure 3-25).
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*
*
*
Signal line
Equipotential bonding conductor
Figure 3-25. Laying Equipotential Bonding Conductor and Signal Cable
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3.4.4 Shielding Cables
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Shielding is a measure to weaken (attenuate) magnetic, electric or electromagnetic interference fields. Interference currents on cable shields are discharged to ground over the shield bar which has a conductive connection to the housing. So that these interference currents do not become a source of noise in themselves, a low-resistance connection to the protective conductor is of special importance. Use only cables with shield braiding if possible. The effectiveness of the shield should be more than 80%. Avoid cables with foil shielding since the foil can easily be damaged by tension and pressure; this leads to a reduction in the shielding effect. As a rule, you should always shield cables at both ends. Only shielding at both ends provides good suppression in the high frequency range. As an exception only, you can connect the shielding at one end. However, this attenuates only the lower frequencies. Shielding at one end can be of advantage in the following cases: * * * If you cannot run an equipotential bonding conductor If you are transmitting analog signals (e.g. a few microvolts or microamps) If you are using foil shields (static shields).
Always use metallic or metalized connectors for data lines for serial connections. Secure the shield of the data line at the connector housing. Do not connect the shield to the PIN1 of the connector strip! In the case of stationary operation, you are recommended to insulate the shielded cable without interrupt and to connect it to the shield/protective ground bar.
Note
If there are potential differences between the earthing points, a compensating current can flow over the shielding that is connected at both ends. For this reason, connect an additional equipotential bonding conductor.
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Note the following when connecting the cable shield: *www..com clamps for fixing the braided shield. The clamps have to enclose the shield over Use metal cable a large area and make good contact (see Figure 3-26). * Connect the shield to a shield bar immediately at the point where the cable enters the cabinet. Route the shield to the module; do not connect it to the module.
Figure 3-26. Fixing Shielded Cables with Various Types of Cable Clamps
3.4.5
Special Measures for Interference-Free Operation
Arc Suppression Elements For Inductive Circuits Normally, inductive circuits (e.g. contactor or relay coils) energized by SIMATIC S5 do not require to be provided with external arc suppressing elements since the necessary suppressing elements are already integrated on the modules. It only becomes necessary to provide arc supressing elements for inductive circuits in the following cases: * If SIMATIC S5 output circuits can be switched off by additionaly inserted contactors (e.g. relay contactors for EMERGENCY OFF). In such a case, the integral suppressing elements on the modules become ineffective. * If the inductive circuits are not energized by SIMATIC S5. You can use free-wheeling diodes, varistors or RC elements for wiring inductive circuits.
Wiring coils activated by direct current Wiring coils activated by alternating current
with diode
with Zener diode
with varistor
with RC element
+
+
-
Figure 3-27. Wiring Coils
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Mains Connection for Programmers
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Provide a power connection for a programmer in each cabinet. The plug must be supplied from the distribution line to which the protective ground for the cabinet is connected.
Cabinet Lighting Use, for example, LINESTRA(R) lamps for cabinet lighting. Avoid the use of fluorescent lamps since these generate interference fields. If you cannot do without fluorescent lamps, you must take the measures shown in Figure 3.28.
Shielding grid over lamp
Shielded cable Metal-encased switch
Mains filter or shielded mains cable
Figure 3-28. Measures for Suppressing Interference from Fluorescent Lamps in the Cabinet
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4
Start-up and Program Tests
4.1 4.1.1 4.1.2 4.1.3 4.2 4.2.1 4.2.2 4.3 4.4 4.4.1 4.4.2 4.5 4.6 4.7 4.8 4.9 4.10
Operating Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CPU Operator Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Performing an Overall Reset on the Programmable Controller . . . . Starting Up a System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Suggestions for Configuring and Installing the Product . . . . . . . . . Procedures for Starting Up the Programmable Controller . . . . . . . Loading the Program into the Programmable Controller ........
4-1 4-1 4-1 4-2 4-3 4-3 4-4 4-5 4-7 4-7 4-8 4-8 4-9 4-10 4-10 4-11 4-11
Backing Up the Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Backing Up the Program on a Memory Submodule . . . . . . . . . . . . Function of the Back-Up Battery . . . . . . . . . . . . . . . . . . . . . . . . . Program-Dependent Signal Status Display "STATUS" Direct Signal Status Display "STATUS VAR" .........
................ ..........
Forcing Outputs, "FORCE", for CPU 103 and Higher Forcing Variables, "FORCE VAR" Search Function
........................
....................................
Program Check, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . .
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Figures
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4-1 4-2 4-3 4-4 4-5 4-6 Table 4-1
CPU Operator Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Procedure for Loading the Program Automatically . . . . . . . . . . . . . . . . . . . Procedure for Loading the Program Manually . . . . . . . . . . . . . . . . . . . . . . Procedure for Backing Up the Program on a Memory Submodule ....... "STATUS" Test Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "STATUS VAR" Test Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 4 4 4 4 4
-
1 5 6 7 9 9
Starting Up the Programable Controller
..........................
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4
4.1 4.1.1
Start-up and Program Tests
Operating Instructions CPU Operator Panel
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Battery low (yellow LED lights: battery discharged or not installed)
BATTERY OFF/ LOW
RUN
Operating mode display (green LED: RUN) Operating mode display (red LED: STOP) Operating mode switch
STOP
I O
RUN STOP COPY
ON/OFF switch
Figure 4.1 CPU Operator Panel ON/OFF Switch The ON/OFF switch turns on the CPU's voltage regulators. This switch does NOT separate the voltage regulator from the L+/M terminals. Operating Mode Switch Use the operating mode switch to select either the RUN or STOP operating mode. The CPU automatically goes into the START-UP mode during the transition from STOP to RUN (see section 7.4.2).
4.1.2 Operating Modes
STOP Operating Mode * * * * The program is not executed. The current values for timers, counters, flags, and process image I/O tables are saved when the STOP mode begins. The output modules are disabled (signal status "0"). The process image I/O tables, timers, and non-retentive flags and counters are set to "zero" during the transition from STOP to RUN.
RUN Operating Mode * * * * * The program is processed cyclically. Already started timers continue to run. The signal states for the input modules are stored. The output modules are addressed. The RUN operating mode can also be set after an OVERALL RESET, that is, when the program memory is empty.
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START-UP Operating Mode *www..com The operating system processes DB1 and accepts the parameters (see section 9.1). * * * * Either the start-up organization block OB21 or OB22 is processed (see section 7.4.2). The amount of time start-up requires is not limited since the scan time monitor is not activated. Neither time-controlled program processing nor interrupt-driven program processing is possible. The input modules and output modules are disabled during start-up.
Changing Operating Modes A change in operating mode can be caused by the following: * * * The operating mode switch - when its position is changed. A programmer - if the operating mode switch on the programmable controller is set to RUN. Malfunctions - if one occurs that causes the programmable controller to go into the STOP operating mode (see chapter 5).
4.1.3 Performing an Overall Reset on the Programmable Controller
You should perform an overall reset before you input a new program. An overall reset erases the following: * * * The programmable controller's program memory All data (flags, timers, and counters) All error IDs
Note
If you do not perform an overall reset, then the information indicated above is retained even if the program is overwritten.
Manual Reset To perform a manual overall reset, you must: 1. Set the operating mode switch to STOP. 2. Remove the battery. 3. Set the ON/OFF switch to "0". 4. Change the ON/OFF switch to "1". 5. Insert the battery. Performing an Overall Reset with the Programmer You can select the overall reset function from the programmer's menu line. Refer to the programmer manual.
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4.2
Starting Up a System
The following section contains suggestions for configuring and starting up a system containing programmable controllers.
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4.2.1
Suggestions for Configuring and Installing the Product
A programmable controller is often used as a component in a larger system. The suggestions contained in the following warning are intended to help you safely install your programmable controller.
Warning
* * Adhere to any safety and accident-prevention regulations applicable to your situation and system. If your system has a permanent power connection (stationary equipment) that is not equipped with an isolating switch and/or fuses that disconnect all poles, install either a suitable isolating switch or fuses in the building wiring system. Connect your system to a ground conductor. Before start-up, if you have units that operate using the main power supply, make sure that the voltage range setting on the equipment matches the local main power voltage. When using a 24 V supply, make sure to provide proper electric isolation between the main supply and the 24-V supply. Power supply units must meet the requirements of EN 60950 or be manufactured in accordance with DIN VDE 0551/EN 60742 and DIN VDE 0160. The requirements of electromagnetic compatibility (EMC) must also be adhered to. Fluctuations or deviations of the supply voltage from the rated value may not exceed the tolerance limit specified in the technical data. If they do, functional failures or dangerous conditions can occur in the electronic modules or equipment. Take suitable measures to make sure that programs that are interrupted by a voltage dip or power failure resume proper operation when the power is restored. Make sure that dangerous operating conditions do not occur even momentarily. If necessary, force an EMERGENCY OFF. EMERGENCY OFF devices must be in accordance with EN 60204/IEC 204 (VDE 0113) and be effective in all operating modes of the equipment. Make certain to prevent any uncontrolled or undefined restart when the EMERGENCY OFF devices are released. Install power supply and signal cables so that inductive and capacitive interference can not affect the automation functions. Install your automation system and its operative components so as to prevent unintentional operation. Automation equipment can assume an undefined state in the case of a wire break in the signal lines. To prevent this, take the proper hardware and software safety measures when linking the inputs and outputs of the automation equipment.
*
*
*
*
*
* * *
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4.2.2
Procedures for Starting Up the Programmable Controller
Table 4-1. Starting Up the Programmable Controller
Remarks Check the mechanical assembly (VDE 0100 and VDE 0160). Terminal "M" of the load power supply and the ground terminal of the programmable controller must be connected to the central grounding point (standard mounting rail). For non-floating modules, a module's "M" terminal must be connected to the programmable controller's "M" terminal. Displays Prerequisites Procedures
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System and programmable controller are off-load. * Check the mechanical configuration and wiring. (see section 3.1 and 3.2).
Set the ON/OFF switch to "0" and the operating mode switch to "STOP". * Switch on the power supply and load power supply. * Set ON/OFF switch to "1". * Connect programmer to CPU. * Reset the programmable controller (see section 4.1.3). * Set operating mode switch to RUN. * Switch on sensor power supply. * Actuate the sensors one after the other. * Switch on power supply for output modules and actuators. * Force the outputs with the "FORCE" programmer function. Program on memory submodule * Set ON/OFF switch to "0". * Plug in the memory submodule. * Set ON/OFF switch to "1". * * Test program and make any necessary corrections. * Set operating mode switch to STOP. * Switch on the load. * Set operating mode switch to RUN. * Back up the program. * Red fault LEDs on the I/O modules lights. * Red LED of the CPU lights;. yellow LED lights if the battery is low or not installed. * Green LED on the CPU lights. * Red fault LEDs on the input modules darken. * Green LEDs on the input modules light. * Red fault LEDs on the output modules darken. The switching states of the associated actuators change. * Green LEDs of the output modules light up.
The input signals in the PII can be observed with the "STATUS VAR" programmer function.
Program is loaded.
* Red LED of the CPU lights.
The system is in operation.
* Green LED of the CPU lights.
* For the CPU 102 only:
press the key simultaneously (manual loading).
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4.3
Loading the Program into the Programmable Controller
You can load a program from a connected programmer (online operation). When you load a program, it is transferred to the programmable controller's program memory. There are specific instructions in your programmer manual for doing this. You can also load your program from a memory submodule, but only valid blocks can be loaded. See section 7.5.2. The different memory submodules you can use are listed in Appendix D. Section 4.3 describes how you can load a program from a memory submodule.
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Warning
You can connect or disconnect memory submodules only in the Power OFF mode. Loading the Program Automatically Automatic loading copies the program from a memory submodule into the program memory of the CPU. You can only load valid blocks. See section 7.5.2. Figure 4-2 shows how a program can be loaded automatically.
No battery is installed (yellow LED lights).
PLC overall reset
Switch the S5-100U off.
Plug memory submodule into the CPU.
Switch the S5-100U on.
Error
Red LED flashes. CPU 100: red LED lights; CPU 102/103: red LED flickers. Perform error diagnostics (see section 5.1). Program is loaded.
Program is in the S5-100U.
The CPU 102 is in the Normal Mode.
Figure 4-2. Procedure for Loading the Program Automatically
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Loading the Program Manually
www..com Manual loading copies the program from a memory submodule into the program memory of the CPU. If a back-up battery is installed, any program in the memory is completely erased.
You can only load valid blocks. See section 7.5.2. Figure 4-3 shows how a program can be loaded manually.
Turn off the S5-100U.
Plug memory submodule into the CPU.
Press key and hold it down.
Turn on the S5-100U.
Error
Red LED flashes.
Red LED flickers; release key.
Release key.
Program is loaded
Red LED lights.
Red LED flashes.
Red LED shows steady light; program is in the S5-100U.
No valid program is in submodule.
Perform error diagnostics (see section 5.1).
The CPU 102 is in Test Mode
Figure 4-3. Procedure for Loading the Program Manually
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Start-up and Program Tests
4.4
Backing Up the Program
A program can be backed up only if the back-up battery is connected. Backing up copies a program from the program memory of the CPU to a memory submodule. Only valid blocks are backed up. As soon as you have changed the integral, default DB1 data block, it is a valid block that can be backed up. See section 7.5.2.
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4.4.1
Backing Up the Program on a Memory Submodule
You can use various EEPROM memory submodules to back up a program. Appendix D contains a list of the submodules you may use. Figure 4-4 illustrates how to back up a program on a memory submodule.
Battery low LED (yellow) lights. No Turn off the S5-100U. Insert / replace battery.
Yes
Plug EEPROM submodule into the CPU.
Turn on the S5-100U.
Press key for at least 3 s.
Error
Red LED flashes.
Red LED flickers; Release
Release key.
Program is loaded. 1)
Red LED lights.
Red LED flashes.
Red LED lights; Program backed up on EEPROM submodule.
- No / wrong submodule plugged in. - No program is in the S5-100U.
Perform error diagnostics (see section 5.1).
The CPU is in the Normal Mode.
1) Program load time:
40 s/1024 statements
Figure 4-4. Procedure for Backing Up the Program on a Memory Submodule
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4.4.2
Function of the Back-Up Battery
If the power fails or the programmable controller is turned off, the contents of the internal (retentive) memory are stored only if a back-up battery is connected. When power is recovered or when the programmable controller is turned on, the following contents are available: * * * Control program and data blocks (see section 7.3.5) Retentive flags and count values (see section 2.2.1) ISTACK contents (see section 5.3]
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Note
* Insert and replace the battery while the programmable controller is turned on. Otherwise, an OVERALL RESET is required when you turn the programmable controller on. The lithium battery in the programmable controller has a life expectancy of at least one year. The yellow LED on the operator panel lights up if the battery fails.
* *
Warning
Do not charge lithium batteries. They could explode. Dispose of used batteries properly.
4.5
Program-Dependent Signal Status Display "STATUS"
This test function displays the current signal states and the Result of Logic Operations (RLO) of the individual operands during program processing. You can use this test function to make corrections to the program.
Note
The current signal states are displayed only in the RUN operating mode.
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Cycle trigger
STATUS
= Q 2.0 1 1
ontrol ogram
Transfer data
Figure 4-5. "STATUS" Test Function Refer to your programmer manual for information about the test function on your programmer.
4.6
Direct Signal Status Display "STATUS VAR"
This test function specifies the status of the operands (inputs, outputs, flags, data words, counters, or timers) at the end of program processing. You can obtain information about inputs and outputs from the process image I/O tables of the selected operands.
Cycle trigger
Control program
Transfer data
STATUS VAR
Figure 4-6. "STATUS VAR" Test Function Refer to your programmer manual for information about the test function on your programmer.
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4.7
Forcing Outputs, "FORCE", for CPU 103 and Higher
Outputs can be set directly to a desired status even without the control program. This enables you to control the wiring and functionality of output modules. This does not change the process I/O image table, but the output disable condition is cancelled.
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Note
The programmable controller must be in the STOP operating mode. Refer to your programmer manual for information about calling up the test function on your programmer.
4.8
Forcing Variables, "FORCE VAR"
The process image I/O table of the operands is changed regardless of the programmable controller's operating mode. You can change the following variables: I, Q, F, T, C, and D. The program is processed in the RUN operating mode using the changed process variables. They can be changed again during program scanning without an acknowledgement being required. The process variables are forced asynchronously to the program scanning. Special characteristics * * You can change the I, Q, and F variables in the process I/O image table by bits, bytes, or words. For the T and C variables in KM and KH format, note the following: - For programmers with screens, you must also enter "YES" in the system commands input field in the presettings screen. - You must be careful when you force edge trigger flags. You do not want to enable a higherorder byte inadvertently because this could give you a timer or counter value you did not set. The signal status display breaks off if there is an error in the format entry or operand entry. The programmer then displays the "NO FORCING POSSIBLE" message.
*
Refer to your programmer manual for information about the test function on your programmer.
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4.9
Search Function
This function allows you to search for specific terms in the program and list them on the programmer's display panel. You can perform program changes at this point. You can have search runs in the following programmer functions: * * * INPUT OUTPUT STATUS
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Some of the items you can search for are: * * * * Statements Operands Labels Addresses (e.g., A I 0.0) (e.g., Q 3.5) (e.g., X 01); possible only in function blocks (e.g., 0006 H)
Note
Search runs are handled differently by different programmers. The respective users guides contain extensive information about search runs.
4.10
Program Check, for CPU 103 and Higher
When this programmer function is called up, program scanning is stopped at a definite point. The cursor indicates this breakpoint, which is a statement in the program. The programmable controller scans the program up to the statement selected. The current signal states and the RLO up to the statement selected are displayed (as in the "STATUS" test function). The program can be scanned section by section by shifting the breakpoint. Program scanning takes place as follows: * * All jumps in the block called are executed. Block calls are executed immediately. The program check is not resumed until control is returned to the calling block.
The following applies during the program check: * * * * The two mode LEDs are not lit. The program writes to the PIQ and reads out the PII. No process image (data cycle) is transferred. All outputs are set to zero.
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During the program check, you can execute the following additional test and programmable controller functions from the programmer: www..com * * * * Input and output (program modification possible) Direct signal status display (STATUS VAR) Forcing of outputs and variables (FORCE, FORCE VAR) Information functions (ISTACK, BSTACK)
If the function is aborted due to hardware faults or program errors, the programmable controller goes into the STOP mode and the red LED on the control panel of the CPU lights. Refer to your programmer manual for information about calling up these functions on your programmer.
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5
Diagnostics and Troubleshooting 5.1 5.2 5.2.1 5.2.2 5.2.3 5.2.4 5.3 5.3.1 5.3.2 5.4 5.5 5.6 Indication of Errors by LEDs ............................ 5- 1 5 5 5 5 5 1 1 4 5 6
CPU Malfunctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "ISTACK" Analysis Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interrupt Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Errors during Program Copying . . . . . . . . . . . . . . . . . . . . . . . . . . Explanation of the Mnemonics Used in "ISTACK" . . . . . . . . . . . . . Program Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Locating the Error Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tracing the Program with the "BSTACK" Function ............ I/O Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Last Resort ....................................
5- 8 5- 8 5 - 11 5 - 12 5 - 12 5 - 13
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Figures 5-1 5-2 5-3 5-4 5-5
Structured Program with an Illegal Statement . . . . . . . . . . . . . . . . . . . . . . Addresses in the CPU's Program Memory . . . . . . . . . . . . . . . . . . . . . . . . Calculating the Error Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tracing the Program with "BSTACK" ........................... Analyzing the Cause of a Fault in the I/Os . . . . . . . . . . . . . . . . . . . . . . . .
5 5 5 5 5
-
8 9 10 11 12
Tables 5-1 5-2 5-3 5-4 5-5 5-6 Error Indication and Error Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISTACK Output (Bytes 1 to 16) ............................... Interrupt Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Errors when Copying . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Meaning of the Remaining ISTACK Bits . . . . . . . . . . . . . . . . . . . . . . . . . . Mnemonics Used for the Interrupt Display . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 5 5 5 1 2 4 5 6 7
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Diagnostics and Troubleshooting
5
5.1
Diagnostics and Troubleshooting
Indication of Errors by LEDs
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The programmable controller's operator panel will show you if your device is not functioning correctly (see Table 5-1). Table 5-1. Error Indication and Error Analysis Error Indication CPU in STOP Red LED lights CPU in STOP Red LED flashes CPU in RUN Green LED lights Faulty operation Error Analysis CPU malfunction Use the programmer to execute an interrupt analysis (see section 5.2). Error when loading or backing up the program Use the programmer to execute an interrupt analysis (see section 5.2). Program error (see section 5.3) or I/O fault Execute a fault analysis (see section 5.4).
If both LEDs light, your programmable controller is in the START-UP operating mode.
5.2 5.2.1
CPU Malfunctions "ISTACK" Analysis Function
The interrupt stack is an internal CPU memory area where the causes of malfunctions are stored. If there is a malfunction, a bit in the respective byte of the memory area is set. Using the programmer, you can read out the contents of this memory area byte-by-byte. Calling the ISTACK The call is made through the programmer menu in the STOP operating mode. Refer to your programmer manual for the key sequence.
Note
Only ISTACK bytes 1 through 6 can be output in the RUN mode. There is no cause for an interrupt to force the CPU to go into the STOP mode. The control bits are output in bytes 1 through 6.
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Diagnostics and Troubleshooting
S5-100U
The following table shows which positions in the bit pattern are relevant for error diagnosis (grayshaded bits).
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Table 5-2. ISTACK Output (Bytes 1 to 16) 6 5 BST SCH 4 SCH TAE 3 ADR BAU 2 1 0 Abso- Syst. Dalute ta Word Addr. (SD)
Bit Byte 1 2 3 4 5 6 7 8 9 10 11
7
EA0A
SD 5
STO ZUS
STO ANZ
NEU STA
BAT PUF AF
EA0C
SD 6
KOPF NI KEIN AS SYN FEH NINEU IRRELEVANT IRRELEVANT STOPS NAU SUF TRAF ZYK NNN SYSFE STS PEU STUEB UR LAD
EA0E
SD 7
EBAC BAU ASPFA
SD 214 (UAW)
EBAA 12 13 14 15 16 ANZ1 ANZ0 OVFL OR STA TUS OR VKE VKE ERAB FKT EBA8 IRRELEVANT 4th nesting level 5th nesting level OR OR VKE VKE FKT EBA6 FKT
SD 213
6th nesting level
SD 212
SD 211
5-2
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Diagnostics and Troubleshooting
Table 5-2. ISTACK Output (Bytes 17 to 32) [continued] 7 www..com Byte 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 * Bit 6 5 4 3 2 OR OR 1 VKE VKE 0 FKT EBA4 3rd nesting level Nesting depth (0 to 6) EBA2 1st nesting level Start address of the data block (high) EBA0 Start address of the data block (low) Block stack pointer (high) EB9E Block stack pointer (low) Step address counter (high)* EB9C Step address counter (low)* Operation register (high) EB9A Operation register (low) ACCU 2 (high) EB98 ACCU 2 (low) ACCU 1 (high) EB96 ACCU 1 (low) SD 203 SD 204 SD 205 SD 206 SD 207 SD 208 OR VKE FKT SD 209 FKT SD 210 Abso- Syst. Dalute ta Word Addr. (SD)
2nd nesting level
The absolute memory address of the next statement to be processed from the faulty block is displayed. If the step address counter displays a DB1 address, then there is a DB1 parameter setting error (see section 9.1).
EWA 4NEB 812 6120-02b
5-3
Diagnostics and Troubleshooting
S5-100U
5.2.2 Interrupt Analysis
When there is an interrupt in program processing, you can use the following table to determine the www..com cause of the error. The CPU always goes into the STOP mode. Table 5-3. Interrupt Analysis ISTACK Display ASPFA and KEIN AS and NNN and SAZ=FFFF* (CPU 102) BAU Byte
10 6 9 25 and 26
Cause of Error
Error during program transfer from the PG to the PLC: Overflow of the internal program memory during compilation
Remedy
Shorten program. Compress memory.
10
When automatically loading the program: - Battery is missing or dead and there is no valid program available on the memory submodule Interruption in the power supply voltage to the CPU The program in the PLC memory is defective. Cause: * A power failure has interrupted one of the following operations. - Compress - Block transfer from the PG to the PLC or memory submodule to the PLC - PLC overall reset * Battery has been replaced while the power was off. * Statement cannot be decoded. * Nesting level is too high. * Parameter exceeds permitted limits. * * * * * Expansion module not connected I/O bus malfunction Maximum length of shift register exceeded Module unknown Module in wrong slot
Replace the battery and recreate the program, or load the program again.
NAU NINEU
10
6
Perform an overall reset and load the program again.
NNN
9
Eliminate program errors.
PEU
10
* Check the power supply in the expansion unit. * Check the connections. * Check the module slots. Set to RUN
STOPS STS STUE SYS** FEH * **
9 9
Operating mode switch on STOP * Software stop by statement (STP) * STOP requested by programmer Block stack overflow: the maximum block call nesting depth (16) has been exceeded. DB1 parameter setting error
9
Eliminate program errors. Correct DB1.
10
SAZ = STEP address counter - The ISTACK bytes 25 and 26 read "1111 1111(FF)". Relevant only for the PG 605U and for the CPU 103, version 8MA03 and higher.
5-4
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Diagnostics and Troubleshooting
Table 5-3. Interrupt Analysis (continued) ISTACK
www..com Display
Byte
9
Cause of Error
Substitution error: Function block called with an incorrect actual parameter Transfer error * Data block statement programmed with a data word number larger than the data block length * Data block statement programmed without previously opening a data block
Remedy
Change actual parameter.
SUF*
TRAF
9
Eliminate program error (see your programmer manual).
ZYK
10
Scan time exceeded: The program processing time exceeds the set monitoring time. Causes: * Program too long * Interrupts too frequent
Check the program for continuous loops or shorten program.
* Relevant for CPU 102, version 8MA02 and higher
5.2.3
Errors during Program Copying
Error message: after the key is released, the red LED continues flashing. Table 5-4. Errors when Copying ISTACK Display ASPFA Cause of Error
Loading the memory submodule into the PLC: * Program on the memory submodule is too long for the PLC's program memory. * Program on the module contains an invalid block number.
Remedy
Check the program on the memory submodule.
ASPFA
Saving from the PLC to the memory submodule: EEPROM memory submodule is defective or too small for the program in the PLC memory.
Replace the memory submodule, or use a larger EEPROM memory submodule. Shorten program.
ASPFA and KEIN AS and NNN and SAZ=FFFF* (CPU 102) *
Internal program memory overflow during compilation
SAZ = STEP Address Counter The ISTACK bytes 25 and 26 read "1111 1111(FF)"
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5-5
Diagnostics and Troubleshooting
S5-100U
5.2.4
Explanation of the Mnemonics Used in "ISTACK"
Table 5-5. Meaning of the Remaining ISTACK Bits Byte 1 Shift block. Execute shift operation. Structure address list. PLC in STOP Internal control bit for STOP/RUN change Battery backup available PLC not yet in cycle after Power ON - See bytes 9 and 10 for cause. Interrupt enable/enabling of time-controlled OB13 and interruptdriven OB3 Program contains errors. Block header cannot be interpreted. Not enough S5 statement memory available Overall reset, program defective Program contains errors. 12 Condition code bits for arithmetic, logic, and shift operations. Arithmetic overflow ID bit of OR memory Status ID of operand of last binary statement executed Result of logic operation (RLO) ID bit of first scan 13 0: O( 1: A( OR parenthesis open AND parenthesis open Explanation
www..com
ISTACK Display BST SCH SCH TAE ADR BAU STO ANZ STO ZUS BAT PUF NEU STA AF* KOPFNI KEIN AS** URLAD SYNFEH ANZ 1/ANZ 0 OV OR STATUS VKE ERAB FKT * **
3
4 5 6
relevant for CPU 103 only for CPU 102: 0 = normal mode 1 = test mode
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Diagnostics and Troubleshooting
Table 5-6. Mnemonics Used for the Interrupt Display
www..com
Mnemonics Used for the Interrupt Display
Explanation Condition codes for various operations (see section A.1.4) Illegal memory submodule Battery failure First scan 0 : O( 1 : A(
ANZ1/ANZ0 ASPFA BAU ERAB FKT KE1...KE6 KEINAS NAU NINEU NNN OR OVFL PEU
Nesting stack entry 1 to 6 entered for A( and O( Insufficient S5 statement memory available Power failure Cold restart not possible Statement cannot be interpreted in the PLC OR memory (set by command "0") Arithmetic overflow (+ or -) I/Os not ready: * First bus unit not connected * Expansion module not connected * I/O bus malfunction * Maximum shift register length exceeded * Unknown module * Module in the wrong slot STATUS of the operand of the last binary statement executed Operating mode switch on STOP Operation interrupted by a programmer STOP request or programmed STOP statements Block stack overflow: The maximum block call nesting depth of 16 has been exceeded. Substitution error Error in DB1 Transfer error for data block statements: * When accessing a data word even though no corresponding data block was opened or * When the data word number is larger than the data block length Interrupt display word Result of logic operation (RLO) Scan time exceeded: the set maximum permissible program scan time has been exceeded
STATUS STOPS STS STUE SUF SYSFEH* TRAF
UAW VKE ZYK *
Relevant only for CPU 103 version 8MA03 and higher
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Diagnostics and Troubleshooting
S5-100U
5.3 5.3.1
Program Errors Locating the Error Address
www..com
The SAZ (STEP address counter) in the ISTACK (bytes 25 and 26) contains the absolute address of the STEP 5 statement in the programmable controller before which the CPU went into the STOP mode. Use the "DIR PC" programmer function to determine the associated block start address. Example: You have entered a control program consisting of OB1, PB0 and PB7. An illegal statement has been programmed in PB7.
OB1
PB0
PB7
JU PB0 JU PB7 BE BE
L PB 0
Illegal statement
BE
Figure 5-1. Structured Program with an Illegal Statement When it reaches the illegal statement, the CPU interrupts program scanning and enters the STOP mode with the "NNN" message. The STEP address counter is at the absolute address of the next (but not yet scanned) statement in the program memory.
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Diagnostics and Troubleshooting
EE00
www..com
OB1 Header
EE09 EE0A EE0B EE0C EE0D EE0E
Absolute addresses in the CPU's internal RAM
00 02
JU PB0 BE
PB0 Header
EE17 EE18 EE19
00
i i+2
JU PB7 BE
EE2E EE2F EE30 EE31 EE32
It is not possible to localize an error in the program on the basis of the physical address of the illegal statement. The "DIR PC" function gives the absolute start addresses of all programmed blocks. The error can then be localized by comparing these two addresses.
PB7 Header
EE3B EE3C EE3D EE3E EE3F
00 02 04 L PB 0
STEP address counter Byte
25 26
EE40 EE41 EE42
Contents
EE 42
xx
BE
F5FF
Figure 5-2. Addresses in the CPU's Program Memory
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Diagnostics and Troubleshooting
S5-100U
Calculating the Address (necessary only when using the PG 605U) In order to be able to make program corrections, it is necessary to have the address of the www..com statement that led to the fault referenced to the particular block (relative address). The faulty block is found by comparing the SAZ (STEP address counter) contents and the "DIR PC" display. The relative error address gives the difference between the SAZ value and the block start address. Figure 5-3 gives you an example of how to calculate the relative error address.
ISTACK byte STEP address counter
25 EE
26 42 Block PB0 PB7 OB1
DIR PC Start Address EE18 EE3C EE0A
The absolute address EE42 is greater than the start address for PB7. The faulty statement is therefore in PB7.
Calculating the relative address:
EE42 - EE3C = 0006
"0006" is the relative address of the statement in PB7 following the statement that caused the CPU to go into the STOP mode. Figure 5-3. Calculating the Error Address
Output of an Error Statement Use the "SEARCH" programmer function to find certain program locations and to look for the relative error address. Refer to your programmer manual for additional information about this programmer function.
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Diagnostics and Troubleshooting
5.3.2
Tracing the Program with the "BSTACK" Function
Program trace with "BSTACK" is not possible on the 605U programmer.
www..com
During program processing, the following information about jump operations is entered in the block stack (BSTACK): * * The data block that was valid before program processing exited a block. The relative return address - It specifies the address where program processing will continue after the return from the called up block. The absolute return - It specifies the memory address in the program memory where program processing will continue after the return.
*
You can call up this information with the "BSTACK" programmer function in the STOP operating mode if a fault caused the CPU to go into the STOP operating mode. "BSTACK" then reports the status of the block stack at the time the interruption occurred. Example: Program scanning was interrupted at function block FB2. The CPU went into the STOP mode with the error message "TRAF" (because of incorrect DB access, e.g., DB5 is two words long and DB3 is ten words long). "BSTACK" lets you determine the path used to reach FB2 and lets you know which DB was open at the time of call up. "BSTACK" contains the three (marked) return addresses. PB1
00
xx
BE
Interrupt with the "TRAF" error message
OB1
00 JU PB1 02 04 JU PB2 06 08 JC PB3 10
PB4 PB2
00 C DB5 02 JU PB4 04 08 JC FB2 10 00
FB2
xx BE xx BE 00
PB3
2A xx BE 00 C DB3 L DW4
16 JU FB2 18 BE xx BE
Figure 5-4. Tracing the Program with "BSTACK"
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Diagnostics and Troubleshooting
S5-100U
5.4 I/O Faults
www..com
Fault
Module with fault indication (red LED) yes
no Power supply ok? yes no Module addressable via the process input image (PII) and the process output image (PIQ) (STATUS VAR, FORCE VAR) Check supply leads. no Bus connection ok?
no
Check supply leads.
Red LED lights. yes no Module power supply ok? yes Short circuit at the outputs? no no Defective fuse yes Replace fuse. Defective module yes Eliminate short circuit.
yes
- Check module (exchange). - Check program.
no
Replace bus unit.
yes Replace module with simulator module. Is a check with STATUS VAR or FORCE VAR possible? no Check connections of other bus units and interface modules. yes Replaced module is defective.
Figure 5-5. Analyzing the Cause of a Fault in the I/Os
5.5 System Parameters
The "SYSPAR" programmer function makes it possible to read out the system parameters (e.g., CPU software version) of the programmable controller (see programmer manual).
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Diagnostics and Troubleshooting
5.6
The Last Resort
The programmable controller will not go back to the RUN operating mode:
www..com
Possible cause:
The battery was installed or changed when the programmable controller was turned off. Perform an overall reset and load the program again.
Remedy:
How to perform an overall reset without a programmer 1. Set the operating mode switch to STOP. 2. Remove the battery. 3. Set the ON/OFF switch to "0". 4. Set the ON/OFF switch to "1". 5. Install a battery.
Contact your local Siemens representative if the above measures are ineffective.
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www..com
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6
Addressing 6.1 6.2 6.3 6.4 6.4.1 6.4.2 Slot Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Modules ..................................... 6- 1 6- 4 6- 5 6- 6 6- 6
Analog Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Combined Input Modules and Output Modules . . . . . . . . . . . . . . . Output Modules with Error Diagnostics . . . . . . . . . . . . . . . . . . . . Digital Input/Output Module, 16 Inputs, 16 Outputs, 24 V DC for All CPUs Version 8MA02 and Higher and for CPU 102, Version 8MA01, Revision 5 and Higher . . . . . . . . . . Function Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Structure of Process Image Input and Output Tables ....... Accessing the Process Image Input Table (PII) . . . . . . . . . . . . . . . Accessing the Process Image Output Table (PIQ) . . . . . . . . . . . . . Interrupt Process Images and Time-Controlled Program Processing in OB13 for CPU 103, Version 8MA02 and Higher . . . . Accessing the Interrupt PII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accessing the Interrupt PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAM Address Assignments ............................
6.4.3 6.5 6.5.1 6.5.2 6.6 6.6.1 6.6.2 6.7
6- 7 6- 7 6- 8 6 - 10 6 - 11
6 - 12 6 - 12 6 - 14 6 - 15
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Figures
www..com
6-1 6-2 6-3 6-4 6-5 6-6 6-7 6-8 6-9 6-10 6-11
Address Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Consecutive Numbering of Slots in a Single-Tier Configuration . . . . . . . . . Slot Numbering in a Multi-Tier Configuration . . . . . . . . . . . . . . . . . . . . . . Expanding from 14 to 18 Slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration of a Digital Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address Assignment for Analog Modules . . . . . . . . . . . . . . . . . . . . . . . . . Assignment of Process Images to the I/O Modules . . . . . . . . . . . . . . . . . . Accesses to the PII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accesses to the PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accesses to the Interrupt PII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accesses to the Interrupt PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 6 6 6 6 6 6 6 6 6 6
-
1 1 2 3 4 5 9 10 11 13 14
Tables 6-1 6-2 6-3 6-4 6-5 6-6 Error Messages for Output Modules with Error Diagnostics . . . . . . . . . . . . Address Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structure of the PII and the PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structure of the Interrupt PII and the Interrupt PIQ . . . . . . . . . . . . . . . . . . Important Addresses in the RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Data Area Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 6 6 6 6 6 7 8 12 15 16
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Addressing
6
Addressing
www..com
The inputs and the outputs have different assigned addresses so that you can access them specifically. The I/O addresses are the same as the module slot addresses. When you mount a module in a slot on a bus unit, the module is assigned a slot number and consequently a fixed byte address in one or both process image I/O tables. Connect the sensors and actuators to the terminal block. The terminal selected determines the channel number. Process image I/O tables in the CPU Address in the process image input table (PII) Address in the process image output table (PIQ)
I/O module
Control program Address in a statement
Slot number + Channel number
=
Data direction: module - CPU
Figure 6-1. Address Assignment
6.1
Slot Numbering
The programmable controller can have a maximum of four tiers. You can use up to 16 bus units (32 slots). The slots are numbered consecutively. Numbering begins with "0" at the slot beside the CPU. Whether a module is plugged in or not has no effect on the numbering.
Slot numbers
CPU
0
1
2
3
30 31
Figure 6-2. Consecutive Numbering of Slots in a Single-Tier Configuration
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Addressing
S5-100U
If the programmable controller consists of more than one tier, numbering of the expansion tiers is continued at the slot on the extreme left.
www..com
Slot numbers
26 27 28 29 30 31
18 19 20 21 22 23 24 25
8
9 10 11 12 13 14 15 16 17
CPU
0
1
2
3
4
5
6
7
Figure 6-3. Slot Numbering in a Multi-Tier Configuration
When expanding your system, always add the new bus units to the topmost tier on the right. Otherwise, the slot numbers on the right of the new bus units will be changed, requiring address changes in your control program.
Note
After every expansion, check to make certain that the addressing used in the control program is the same as that in the actual configuration.
6-2
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Addressing
Example:
Expanding from 14 to 18 slots Existing configuration
www..com
8
9 10 11 12 13
New bus units CPU 0 1 2 3 4 5 6 7
Correct expansion procedure
8
9 10 11 12 13 14 15 16 17 The new bus units are added at the right. The interface module is moved correspondingly to the right. The old slot numbers are retained. Continue numbering the new slots sequentially.
CPU 0
1
2
3
4
5
6
7
Incorrect expansion procedure 8 9 10 11 12 13 14 15 16 17
8 9 10 11 12 13
The slot numbers of the old bus units move to numbers 12 to 17. The new slots are given the numbers 8 to 11. CPU 0 1 2 3 4 5 6 7
Figure 6-4. Expanding from 14 to 18 Slots
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Addressing
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6.2
Digital Modules
Digital modules can be plugged into all slots (0 through 31). www..com Only two information states ("0" or "1", OFF or ON) per channel can be transferred from or to a digital module. The memory requirement is one bit. Each channel of a digital module is displayed by a bit. This is the reason that every bit must be assigned its own number. Use the following form for a digital address:
x
.y
Bit number (channel number) Byte number (slot number)
Figure 6-5. Configuration of a Digital Address
The "X.Y" address consists of the following two components: * * Byte Address X (Slot Number X) - The byte address is the same as the number of the slot the module is plugged into. Channel Number Y (Bit Address Y) - The channel number comes from the connection of the actuators or sensors to the terminals of the terminal block. The assignment for the channel number and the terminal number is printed on the frontplate of the module.
Example:
Address Assignment
You are connecting a 2-wire BERO proximity limit switch to an 8 x 24-V DC digital input module (6ES5 421-8MA11) at terminal 3. The other wire is routed to an L+ (positive supply voltage) terminal block (see section 3.2 for wiring). The module is plugged into slot 3. This defines the address used by the control program to evaluate the signal states of the BERO. * * * The byte address is 3 since the module is plugged into slot 3. As shown on the frontplate, channel number 1 is used. The complete address for the BERO switch is 3.1.
Note
You can address 4-channel digital modules only with channel numbers 0 through 3. The channel numbers 4 through 7 printed on the frontplate are relevant only for the ET 100U system.
6-4
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Addressing
6.3
Analog Modules
You can plug analog modules only into slots 0 through 7. Transfer of 65,536 different items of www..com information is possible per channel from or to an analog module. The memory requirement is 16 bits=2 bytes=1 word. The modules are addressed byte-by-byte or word-by-word with load or transfer operations. The programmable controller takes this increased address requirement into account when an analog module is plugged in. * * * * Eight bytes (=four words) are reserved per slot. Two bytes (=1 word) are reserved per channel. The slot addressing area is changed. The permissible address space extends from byte 64 (slot 0, channel 0) to byte 127 (slot 7, channel 3).
Slot number
0
64+65
1
72...
2
80...
3
88...
4
96...
5
6
7
Channel number
104... 112... 120...
0 1 2
CPU
66+67 68+69 70+71 ...79 ...87 ...95 ...103 ...111 ...119 ...127
3
Figure 6-6. Address Assignment for Analog Modules
Examples: 1) 2)
Bytes 88+89=analog module in slot 3, channel number 0 Channel 1 address of an analog module in slot 5? Solution: bytes 106+107
Note
Any combination of analog and digital modules is possible in slots 0 through 7.
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Addressing
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6.4
Combined Input Modules and Output Modules
With these modules it is possible to write data from the control program to the module and to read www..com in data from the module to the control program. The byte addresses in the process image input table (PII) and process image output table (PIQ) are identical. The meaning of the transferred data is usually different.
6.4.1
Output Modules with Error Diagnostics
In addition to the fault LED (red LED), the following output modules can signal errors to the CPU. 4 x 24 V DC / 0.5 A (6ES5 440-8MA12) 4 x 24 V DC / 2.0 A (6ES5 440-8MA22) 4 x 24 to 60 V DC / 0.5 A (6ES5 450-8MB11) You can read the error messages on input channels I X.0 and I X.1 (not with CPU 100, version 8MA01). The following error messages are possible. Table 6-1. Error Messages for Output Modules with Error Diagnostics Address I X.0 Type of Error Short circuit on an output channel / fuse blown or no-load voltage Defective module (output transistor shorted)
I X.1
X is the byte address (slot number) of the output module
Signal state "1" indicates an error is present. The PII is set to "0" for output modules without error diagnostics.
6-6
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Addressing
6.4.2
Digital Input/Output Module, 16 Inputs, 16 Outputs, 24 V DC for All CPUs Version 8MA02 and Higher and www..com 102, Version 8MA01, Revision 5 and Higher for CPU
Plug the module only into slots 0 through 7. This module occupies the same address space as an analog module. However, only the first two of the eight reserved bytes are used. The address consists of byte address n or n+1 and channel number Y. "n" is the start address of a slot, the first of the reserved bytes (e.g., byte 64 for slot 0). "n+1" is therefore the second of the reserved bytes. The designations "n" and "n+1" are printed on the frontplate of the module. The input and output information occupies the same addresses. The channel number is defined by the connection of the actuators and sensors to the crimp connector. The channel numbers are printed on the frontplate.
Table 6-2. Address Assignment Slot Number
Address PII (IN) and PIQ (OUT) Channel n.0 to n.7 Channel n+1.0 to n+1.7
0
64.0 to 64.7 65.0 to 65.7
1
72.0 to 72.7 73.0 to 73.7
2
80.0 to 80.7 81.0 to 81.7
3
88.0 to 88.7 89.0 to 89.7
4
96.0 to 96.7 97.0 to 97.7
5
104.0 to 104.7 105.0 to 105.7
6
112.0 to 112.7 113.0 to 113.7
7
120.0 to 120.7 121.0 to 121.7
Examples: Determining the Address 1) 2) You plugged the module into slot 4 and connected an actuator at byte n, channel 4. The address is 96.4. Address 113.3 indicates a sensor or an actuator is connected at byte n+1, channel 3. The module is plugged into slot 6.
6.4.3
Function Modules
Function modules have module-specific addressing. Some function modules are addressed like digital modules, and other function modules are addressed like analog modules. The addressing for each function module is explained in chapter 15.
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6.5
The Structure of Process Image Input and Output Tables
Information about inputs is stored in the process image input table (PII). Information about outputs www..com is stored in the process image output table (PIQ). The PII and the PIQ each have an area of 128 bytes in the RAM memory. The PII and the PIQ have identical structures. The PII and the PIQ can be divided into three address areas as shown in Table 6-3.
Table 6-3. Structure of the PII and the PIQ Byte Address in the PII and PIQ 0 to 31 32 to 63 64 to 127 Module Digital modules Unassigned address space Analog modules 0 to 7 Slot Number 0 to 31
* * *
The address space for bytes 0 through 31 is reserved for information from or to modules that are addressed like digital modules. The unassigned address space in bytes 32 to 63 can be used to store intermediate results. The address space in bytes 64 to 127 is reserved for information from or to modules that are addressed like analog modules.
6-8
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Addressing
Figure 6-7 shows a possible programmable controller configuration and storage of information in the process I/O images.
www..com Slot
0 1 2

3

4

27

28
29
30
31
CPU
AI Bit
76543210
...
AQ
DI
DE DI DQ
DQ Bit
76543210
0 1 2 3 4
0 1 2 3 4
27 31 31
Unassigned address area
Unassigned address area
Unused areas 64 65 66 67 64 65
72 79 Byte 127 Byte
PII
PIQ
127
Figure 6-7. Assignment of Process Images to the I/O Modules
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Addressing
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6.5.1
Accessing the Process Image Input Table (PII)
During a data cycle, data is read into the process image input table (PII) from input modules (see www..com section 2.2.2 - Data Cycle). This data is available to the control program for evaluation in the next program processing cycle. Access to the PII is expressed by the operand identifiers "I", "IB", or "IW" in a statement in the control program. The letter "L" identifies the "Load" operation (see chapter 8). The letter "A" identifies the "AND logic" operation (see chapter 8). PII * Bit-by-bit reading "I " Example: Reading in the signal state of channel 2 of a 4-channel digital input module in slot 2 Bit number
76543210
Byte 2
A I 2.2
* Byte-by-byte reading "IB " Example: Reading in the signal states of all channels of an 8-channel digital input module in slot 12
L IB 12
15 0
Byte 12
ACCU 1 High byte * Word-by-word reading "IW " Example: Reading in the analog value of channel 3 of a 4-channel analog input module in slot 4 Low byte
L IW 102
15 0
Byte 102 Byte 103
ACCU 1 High byte Always set to "0" Figure 6-8. Accesses to the PII Low byte
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6.5.2
Accessing the Process Image Output Table (PIQ)
www..com During a program cycle, data coming from the control program to the output modules is written into the process image output table (PIQ). The data is transferred to the output modules in the following data cycle.
Access to the PIQ is expressed by the operand identifiers "Q", "QB", or "QW" in a statement in the control program. The letter "T" identifies the "Transfer" operation (see Chapter 8). The "=" character assigns the result of a logic operation (RLO) to the operand that follows the character (see chapter 8). PIQ * Bit-by-bit writing "Q " Example: Writing the signal state to channel 6 of an 8-channel digital output module in slot 4 Bit number
76 54 32 10
=
*
Q 4.6
Byte 4
Byte-by-byte writing "QB " Example: Writing the signal states to all channels of an 8-channel digital output module in slot 29
T QB 29
15 0
Byte 29
ACCU 1 High byte * Word-by-word writing "QW " Example: Writing an analog value to channel 2 of a 4-channel analog output module in slot 6 Low byte
T QW 116
15 0
Byte 116 Byte 117
ACCU 1 High byte Low byte
Figure 6-9. Accesses to the PIQ
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6.6
Interrupt Process Images and Time-Controlled Program Processing in OB13 for CPU 103, Version 8MA02 and Higher
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In the event of a time-controlled or process interrupt, the CPU does not access the I/O modules directly. The CPU stores its information in interrupt process images. * * * The interrupt process images are used only for time-controlled or interrupt-driven program processing. The interrupt process images and the "normal" process images have identical structures. The interrupt process input image (interrupt PII) and interrupt process output image (interrupt PIQ) take up an area of 128 bytes each in the RAM.
The interrupt PII and interrupt PIQ can be divided into three address areas as shown in Table 6-4. Table 6-4. Structure of the Interrupt PII and the Interrupt PIQ Byte address in interrupt PII and interrupt PIQ 0 to 31 32 to 63 64 to 127 Module Digital modules Unassigned address space Analog modules 0 to 7 Slot number 0 to 31
Note
The interrupt process images can be accessed by byte or word operations only.
6.6.1
* *
Accessing the Interrupt PII
The interrupt PII can only be accessed in connection with time-controlled or interrupt-driven program processing. Data from inputs is read into the interrupt PII only at the beginning of time-controlled program processing. This data is available only to the time-controlled program for evaluation.
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Time-Controlled Program Processing Access to the interrupt PII is expressed by the "PB" or "PW" operand identifiers in a statement in www..com the time-controlled program. The letter "L" represents the "Load" operation (see chapter 8). Interrupt PII * Byte-by-byte reading "PB " Example: Reading in the signal states of all channels of an 8-channel digital input module in slot 21
L PY 21
15 0
Byte 21
ACCU 1 High byte Low byte
*
Word-by-word reading "PW " Example: Reading in the analog value of channel 2 of a 4-channel analog input module in slot 1
L PW 76
15 0
Byte 76 Byte 77
ACCU 1 High byte Low byte
Figure 6-10. Accesses to the Interrupt PII
Interrupt-Driven Program Processing * * * * When a process interrupt occurs, only the data of the interrupt inputs, slots 0 and 1, is read into the interrupt PII. Only this data of the interrupt PII is available to the interrrupt-driven program for evaluation. In a statement in the interrrupt-driven program, access to the interrupt PII is possible only with the following operands: PB0, PB1, and PW0. If other parameters are specified, the CPU goes into the STOP mode and the "NNN" error message is specified in the ISTACK. See section 5.2.
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6.6.2
Accessing the Interrupt PIQ
When accessing the interrupt PIQ, the following rules apply.
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* *
* *
Data can be written to the interrupt PIQ only within time-controlled or interrupt-driven program processing. Data from a time-controlled or interrupt-driven program to external outputs is written during timecontrolled or interrupt-driven program processing both to the "normal" PIQ and the interrupt PIQ. Data from the interrupt PIQ is read out to the outputs in the next interrupt output data cycle. The PIQ is copied to the interrupt PIQ after the OB1 program cycle.
Note
The interrupt output data cycle is executed only after the interrupt PIQ has been written to.
Access to the interrupt PIQ is expressed by the "PB" or "PW" operand identifiers in a statement in the time-controlled or interrrupt-driven program. The letter "T" identifies the "Transfer" operation (see chapter 8). Interrupt PIQ * Byte-by-byte writing "PB " Example: Writing signal states to all channels of an 8-channel digital output module in slot 13
T PY 13
15 0
Byte 13
ACCU 1 High byte * Low byte
Word-by-word writing "PW " Example: Writing an analog value to channel 3 of a 4-channel analog output module in slot 5
T PW 110
15 0
Byte 110 Byte 111
ACCU 1 High byte Low byte
Figure 6-11. Accesses to the Interrupt PIQ
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6.7
RAM Address Assignments
The following table gives an overview of the major addresses in the RAM of the three CPUs (in www..com hexadecimal code). Table 6-5. Important Addresses in the RAM CPU Program memory Memory submodule PII, digital PII, analog PIQ, digital PIQ, analog Timers Retentive counters Non-retentive counters Retentive flags Non-retentive flags 100 EE00 to FFFF C000 to DFFF E400 to E41F E440 to E47F E480 to E49F E4C0 to E4FF E280 to E29F E2A0 to E2AF E2B0 to E2BF E300 to E33F E340 to E37F 102* D000 to DFFF 4000 to 5FFF EF00 to EF1F EF40 to EF7F EF80 to EF9F EFC0 to EFFF EC00 to EC39 ED00 to ED0F ED10 to ED3F EE00 to EE3F EE40 to EE7F 103 8000 to CFFF 0000 to 7FFF EF00 to EF1F EF40 to EF7F EF80 to EF9F EFC0 to EFFF EC00 to ECFF ED00 to ED0F ED10 to ED3F EE00 to EE3F EE40 to EE7F
Module address list OB FB PB SB DB System data * E080 to E0FF E100 to E17F E180 to E1FF ---E200 to E27F EA00 to EBFF FC80 to FCFF FD00 to FEFF FF00 to FF7F ---FF80 to FFFF EA00 to EBFF DC00 to DDFF DE00 to DFFF E000 to E1FF E200 to E3FF E400 to E5FF EA00 to EBFF
Program memory; block address list only in TEST mode.
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The following table gives an overview of the most important system data in the system data area.
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Table 6-6. System Data Area Assignment Contents ISTACK (Interrupt STACK) Integral real-time clock First free program memory address Program memory starting address Program memory end address CPU version, software release SINEC L1 Scan monitoring time (value . 10 ms) Calling interval for OB 13 for time-controlled program processing (value . 10 ms) BSTACK (Block STACK) ISTACK (Interrupt STACK) 7.4.4 5.3.2 5.2 13 Chapter/ Section Reference 5.2 12
System data word 5 to 7 8 to 12 33 35 37 40 to 45 57 to 63 96 97 128 to 159 203 to 214
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7
Introduction to STEP 5 Writing a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Methods of Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operand Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Diagram Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Linear Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structured Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Organization Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sequence Blocks, for CPU 103 and Higher . . . . . . . . . . . . . . . . . Function Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Processing with CPU 102 . . . . . . . . . . . . . . . . . . . . . . . START-UP Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . Cyclic Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . Time-Controlled Program Processing, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interrupt-Driven Program Processing, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Processing Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Changing Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Changing Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compressing the Program Memory . . . . . . . . . . . . . . . . . . . . . . . Number Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7 7 7 1 1 3 3
7.1 7.1.1 7.1.2 7.1.3 7.2 7.2.1 7.2.2 7.3 7.3.1 7.3.2 7.3.3 7.3.4 7.3.5 7.4 7.4.1 7.4.2 7.4.3 7.4.4 7.4.5
7- 4 7- 4 7- 5 7 7 7 7 7 7 7 7 7 7 7 9 11 11 11 16 18 19 24 26
7 - 28 7 - 29 7 7 7 7 30 30 30 30
7.5 7.5.1 7.5.2 7.5.3 7.6
7 - 31
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Figures 7-1 7-2 7-3 7-4 7-5 7-6 7-7 7-8 7-9 7-10 7-11 7-12 7-13 7-14 7-15 7-16 7-17
Compatibility of STEP 5 Methods of Representation . . . . . . . . . . . . . . . . . Nesting Depth of Programmed Organization Blocks . . . . . . . . . . . . . . . . . Structure of a Block Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example of Organization Block Use . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming a Function Block Parameter, for CPU 103 and Higher . . . . . . Programming a Function Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example of Data Block Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Validity Areas of Data Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programm Scanning with CPU 102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mode Change for CPU 102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Display of the Processing Mode in the ISTACK . . . . . . . . . . . . . . . . . . . . Setting the Start-Up Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cyclic Program Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calculating the Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compressing the Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bit Assignment of a 16-Bit Fixed-Point Binary Number . . . . . . . . . . . . . . . BCD and Decimal Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-
2 6 8 10 13 16 17 17 19 21 22 24 26 27 30 31 32
Tables 7-1 7-2 7-3 7-4 7-5 7-6 Comparison of Operation Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparison of Block Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overview of Organization Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Parameter Types and Data Types with Permissible Actual Parameters, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming Possibilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparison of Number Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7- 2 7- 7 7- 9 7 - 14 7 - 18 7 - 32
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Introduction to STEP 5
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This chapter explains how to program the S5-100U. It describes how to write a program, how the program is structured, the types of blocks the program uses, and the number representation of the STEP 5 programming language.
7.1
Writing a Program
A control program specifies a series of operations that tell the programmable controller how it has to control a system. For example, a control program might be the series of operations that tell the S5-100U how to use open-loop control or closed-loop control for a specific system. You must write the program in a special programming language and according to specific rules so that the programmable controller can understand it. The programming language that has been developed for the SIMATIC S5 family is called STEP 5.
7.1.1
Methods of Representation
The following methods of representation are possible with the STEP 5 programming language. * Statement List (STL) STL represents the program as a sequence of operation mnemonics. A statement has the following format: Operation Operand
002: A I 0.1
Parameter Operand ID Relative address of the statement in a particular block The operation tells the programmable controller what to do with the operand. The parameter indicates the operand address. * * * Control System Flowchart (CSF) CSF represents logic operations with graphics symbols. Ladder Diagram (LAD) LAD graphically represents control functions with circuit diagram symbols. GRAPH 5, for CPU 103 and higher GRAPH 5 describes the structure of sequence control systems.
You cannot use CSF, LAD, or GRAPH 5 with the PG 605 programmers.
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Each method of representation has its own special characteristics. A program block that has been programmed in STL cannot necessarily be output in CSF or LAD. The three methods of graphic rewww..com presentation are not compatible. However, programs in CSF or LAD can always be converted to STL. Figure 7-1 illustrates these points in a diagram.
CSF
LAD
STL
Figure 7-1. Compatibility of STEP 5 Methods of Representation
The STEP 5 programming language has the following three operation types: * * * Basic Supplementary System
Table 7-1 provides further information about these operations. Table 7-1. Comparison of Operation Types
STEP 5 PROGRAMMING LANGUAGE
Basic Operations Supplementary Operations Only in function blocks STL System Operations
Application Methods of representation Special features
In all blocks STL, CSF, LAD
Only in function blocks STL For users with good system knowledge
Refer to Chapter 8 for a description of all operations and for programming examples.
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7.1.2
Operand Areas
The STEP 5 programming language has the following operand areas:
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I Q F D T C P K OB, PB, SB FB, DB
(inputs) (outputs) (flags) (data) (timers) (counters) (peripherals) (constants)
Interfaces from the process to the programmable controller Interfaces from the programmable controller to the process Memory for intermediate results of binary operations Memory for intermediate results of digital operations Memory for implementing timers Memory for implementing counters Interfaces from the process to the programmable controller Defined numeric values
(blocks)
Program structuring aids
Refer to Appendix A for a listing of all operations and operands.
7.1.3
Circuit Diagram Conversion
If your automation task is in the form of a circuit diagram, you must convert it to STL, CSF, or LAD.
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Example: Hard-Wired Control A signal www..com lamp (H1) is supposed to light up when a normally open contact (S1) is activated and a normally closed contact (S2) is not activated. Programmable Control The signal lamp is connected to an output (i.e., Q 1.0). The signal voltages of the two contacts are connected to two programmable controller inputs (i.e., I 0.0 and I 0.1). The S5-100U scans to see if the signal voltages are present (signal state "1" at the activated normally open contact or non-activated normally closed contact). Both signal states are combined through logic AND. The result of logic operation (RLO) is assigned to output Q 1.0 (the lamp lights).
Circuit Diagram
STL
CSF
LAD
S1
A I 0.0 I 0.1 I 0.1 = Q 1.0 I 0.0 I 0.0 I 0.1 Q 1.0
S2
A
&
Q 1.0
()
H1
7.2
Program Structure
An S5-100U program can be one of the two following types: * * Linear Structured
Sections 7.2.1 and 7.2.2 describe these program types.
7.2.1
Linear Programming
Programming individual operations in one section (block) is sufficient for handling simple automation jobs. For the S5-100U, this is organization block 1 (see section 7.3.1). The S5-100U scans this block cyclically. After the S5-100U scans the last statement, it goes back to the first statement and begins scanning again. Please note the following rules: * * When OB1 is called, five words are assigned to the block header in the program memory (see section 7.3). Normally, a statement takes up one word in the program memory. Two-word statements also exist (e.g., with the operation "Load a constant"). Count these statements twice when calculating the program length. Like all blocks, OB1 must be terminated by a Block End statement (BE).
*
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7.2.2
Structured Programming
To solve complex tasks, it is advisable to divide a program into individual, self-contained program parts (blocks). This procedure has the following advantages: * * * * * * Simple and clear programming, even for large programs Program parts can be standardized Easy alterations Simple program test Simple start-ups Subroutine techniques (block call from different locations)
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The STEP 5 programming language has the following five block types: * * * Organization Block (OB) Organization blocks manage the control program. Program Block (PB) Program blocks arrange the control program according to functional or technical aspects. Sequence Block (SB) Sequence blocks are special blocks that program sequence controls. They are handled like program blocks. (This is available for CPU 103 and higher.) Function Block (FB) Function blocks are special blocks for programming frequently recurring or especially complex program parts (e.g., reporting and arithmetic functions). You can assign parameters to them (available for CPU 103 and higher). They have an extended set of operations (e.g., jump operations within a block). Data Block (DB) Data blocks store data needed to process a control program. Actual values, limiting values, and texts are examples of data.
*
*
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Introduction to STEP 5
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The program uses block calls to exit one block and jump to another. You can therefore nest program, function, and sequence blocks randomly up to 16 levels (see section 7.3). Nesting can be up www..com to 32 levels for CPU 103 version 8MA03.
Note
When calculating the nesting depth, note that the system program in the programmable controller can call an organization block automatically under certain circumstances (e.g., OB2).
The total nesting depth is the sum of the nesting depths of call programmed organization blocks. If nesting goes beyond 16 levels (32 levels for CPU 103 version 8MA03), the CPU goes into the STOP mode with the error message "STUEB," block stack overflow (see section 5.2). Figure 7-2 illustrates the nesting principle. OB 1
.......
.......
Level 1
Level 2
Level 3
.......
Level 16
Figure 7-2. Nesting Depth of Programmed Organization Blocks
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7.3
Block Types
The following table lists the most important characteristics of the individual block types: Table 7-2. Comparison of Block Types OB1 Number CPU 100 Number CPU 102 Number CPU 103 Length (max.) CPU 100 Length (max.) CPU 102 Length (max.) CPU 103 Operations set (contents) 64 OB0 to OB63 64 OB0 to OB63 256 OB0 to OB255 4 Kbytes 4 Kbytes 8 Kbytes Basic operations PB 64 PB0 to PB63 64 PB0 to PB63 256 PB0 to PB255 4 Kbytes 4 Kbytes 8 Kbytes Basic operations 8 Kbytes Basic operations 256 SB0 to SB255 SB FB2 64 FB0 to FB63 64 FB0 to FB63 2562 FB0 to FB255 4 Kbytes 4 Kbytes 8 Kbytes Basic, supplementary, system operations STL 5 words 5 words DB3 62 DB2 to DB63 62 DB2 to DB63 254 DB2 to DB255 256 data words 256 data words 8 Kbytes Bit patterns, numbers, texts
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Representation methods Block header length 1
2 3
STL, CSF, LAD 5 words
STL, CSF, LAD 5 words
STL, CSF, LAD 5 words
The operating system calls up particular OBs automatically (see section 7.3.1 and 9.3). Function blocks are already integrated into the operating system (see section 9.2). Data blocks DB0 and DB1 are reserved.
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Block Structure Each block consists of the following parts: * * The block header that specifies the block type, number, and length - Generated by the programmer when it transforms the block The block body that has the STEP 5 program or data Synchronization pattern Block type Block number Programmer ID Library number Block length
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Absolute byte addresses (in ascending order)
Figure 7-3. Structure of a Block Header
Programming Program your blocks as follows (does not apply to data blocks): 1. Specify the block type (e.g., PB). 2. Specify the block number (e.g., 27). 3. Enter the control program statements. 4. Terminate the block with the "BE" statement.
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7.3.1
Organization Blocks
Organization blocks (OB) form the interface between the operating system and the control program. Organization blocks are handled in one of the following three ways: * * Organization block OB1 is called cyclically by the operating system. Some organization blocks are event-driven or time-controlled. They can be called in response to events or at certain times: - By a switch from STOP to RUN (OB21) - By a switch from Power OFF to Power ON (OB22 (see Table 7-3)) - By interrupts (OB2 and OB13) Some other organization blocks represent operating functions (similar to the the integral function blocks). They can be called by the control program (for CPU 103 and higher; see section 9.3).
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*
Table 7-3 provides an overview of organization blocks. Table 7-3. Overview of Organization Blocks OB No. Function CPU 100 You must program the OB. The operating system calls up the OB. OB1 Cyclic program processing OB integrated in CPU 102 CPU 103
Interrupt-driven program processing OB2 OB13 Interrupt-driven program processing Time-controlled program processing
Handling start-up procedures OB21 OB22 When starting manually (STOP to RUN) When power returns
Handling programming errors and device errors OB34 Battery failure
The OB is already programmed. You must call up the OB. OB31 OB251 Scan time triggering (resets scan time monitor) PID control algorithm
OB is ready or is supported by the operating system
You can program all organization blocks using parameters from the permissible range. CPU 100 and CPU 102 use organization blocks OB0 to OB63. CPU 103 uses OB0 to OB255. However, you must call the organization blocks from the control program.
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Figure 7-4 shows how to set up a structured control program. It also illustrates the significance of organization blocks. www..com OB21/OB22
OB1
PB1
SB1*
FB2
FB61
System program
Control program
* For CPU 103 and higher Figure 7-4. Example of Organization Block Use
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7.3.2
Program Blocks
Self-contained program parts are programmed in program blocks (PB). Special feature: Control functions can be represented graphically in program blocks. Call Block calls JU and JC activate program blocks. You can program these operations in all block types except data blocks. Block call and block end cause the RLO to be reloaded. However, the RLO can be included in the "new" block and be evaluated there.
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7.3.3
Sequence Blocks, for CPU 103 and Higher
Sequence blocks (SB) are special program blocks that process sequence controls. They are treated like program blocks.
7.3.4
Function Blocks
Frequently recurring or complex control functions are programmed in function blocks (FB). Function blocks have the following special features. * * * FBs can be assigned parameters (for CPU 103 and higher). - Actual parameters can be assigned when the block is called (for CPU 103 and higher). FBs have an extended set of operations not available to other blocks. The FB program can be written and documented in STL only.
If you are using CPU 102 version 8MA02 or higher, you have the following types of function blocks available: * * * FBs that you can program FBs that are integrated in the operating system (see section 9.2) FBs that are available as software packages (standard function blocks, see Catalog ST 57)
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Block Header Besides the block header, function blocks have organizational information that other blocks do not have. A function block's memory requirements consist of the following: * * * Block header (five words) as for other blocks Block name (five words) Block parameter for parameter assignment (three words per parameter)
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Creating a Function Block, for CPU 103 and Higher In contrast to other blocks, parameters can be assigned to FBs. To assign parameters, you must program the following block parameter information. * Block Parameter Name (formal operand) Each block parameter as a formal operand is given a designation (DES). Under this designation it is replaced by an actual parameter when the function block is called. The name can be up to four characters long and must begin with an alpha character. You can program up to 40 block parameters per function block. Block Parameter Type You can enter the following parameter types: -I input parameters -Q output parameters -D data -B blocks -T timers -C counters In graphic representation, output parameters appear to the right of the function symbol. Other parameters appear to the left. * Block Parameter Data Type You can specify the following data types: - BI for operands with a bit address - BY for operands with a byte address -W for operands with a word address -K for constants
*
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When assigning parameters, enter all block parameter specifications.
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Block header
Name NAME: EXAMPLE DES: Block parameter DES: DES: IN 1 IN 2 I I BI BI BI Data type Parameter type Block parameter Name
OUT 1 Q . . .
: A = IN 1 Control program : A = IN 2 : == OUT 1 . . . Program example
Memory assignment
Figure 7-5. Programming a Function Block Parameter, for CPU 103 and Higher
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Table 7-4.
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Block Parameter Types and Data Types with Permissible Actual Parameters, for CPU 103 and Higher Permissible Actual Parameters
I Q F IB QB FY DL DR PY IW QW FW DW PW x.y Inputs x.y Outputs x.y Flags x x x x x x x x x x x Input bytes Output bytes Flag bytes Data bytes left Data bytes right Peripheral bytes* Input words Output words Flag words Data words Peripheral words*
Parameter Type
I, Q
Data Type
BI for an operand with bit address
BY
for an operand with byte address
W
for an operand with word address
D
KM KY KH KS KT KC KF
for a binary pattern (16 digits) Constants for two absolute numbers, one byte each, each in the range from 0 to 255 for a hexadecimal pattern (maximum 4 digits) for a character (maximum 2 alphanumeric characters) for a time (BCD-coded time) with time base 1.0 to 999.3 for a count (BCD-coded) 0 to 999 for a fixed-point number in the range from -32768 to +32767 DBx OBx FBx PBx SBx Data blocks. The C DBx operation is executed. Organization blocks are called unconditionally (JU ... x). Function blocks (permissible without parameters only) are called unconditionally (JU..x). Program blocks are called unconditionally (JU..x). Sequence blocks are called unconditionally (JU..x). Timer. The time should be assigned parameters as data or be programmed as a constant in the function block. Counter. The count should be assigned parameters as data or be programmed as a constant in the function block.
B
Type designation not permitted
T
Type designation not permitted
T
C
Type designation not permitted
C
* Not permitted for integral FBs
Calling a Function Block Like other blocks, function blocks are stored under a specific number in the program memory (e.g., FB47). The numbers 240 to 255 are reserved for the integral function blocks (in CPU 103 version 8MA02 and higher). You can program function block calls in all blocks except data blocks.
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A function block call consists of the following parts: *www..com Call statement - JU FBx unconditional call (Jump Unconditional) - JC FBx call if RLO = 1 (Jump Conditional) * Parameter list (only if block parameters were defined in the FB)
Function blocks can be called only if they have been programmed. When a function block call is being programmed, the programmer requests the parameter list for the FB automatically if block parameters have been defined in the FB.
Setting Parameters for a Function Block The program in the function block specifies how the formal operands (parameters defined as "DES") are to be processed. As soon as you have programmed a call statement (for example JU FB2), the programmer displays the parameter list. The parameter list consists of the names of the parameters. Each parameter name is followed by a colon (:). You must assign actual operands to the parameters. The actual operands replace the formal operands defined in the FB when the FB is called, so that the FB operates with the actual operands. A parameter list has a maximum of 40 parameters. Example: The name (DES) of a parameter is IN1, the parameter type is I (as in input), the data type is BI (as in bit). The formal operand for the FB has the following structure: DES: IN1 I BI
Specify in the parameter list of the calling block which actual operand is to replace the formal operand in the FB call. In our example it is : I 1.0. Enter in the parameter list: IN1: I 1.0
When the FB is called, it replaces the formal operand "IN1" with the actual operand "I 1.0". Figure 7-6 provides you with a detailed example of how to set parameters for a function block. The FB call takes up two words in the internal program memory. Each parameter takes up an additional memory word. You can find the memory requirements for standard function blocks and the run times in the specifications in Catalog ST 57. The name of the function block is stored in the function block. The designations (DES) of the function block inputs and outputs that appear on the programmer during programming are also stored in the function block. Before you begin programming on the programmer, you must choose one of the following two options: * * Transfer all necessary function blocks to the program diskette (for off-line programming) Input all necessary function blocks directly into the program memory of the programmable controller
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PB 3 www..com
FB 5
NAME : EXAMPLE DES: DES: X1 X2 X3 I I BI BI
Executed program
: JU
FB5
DES:
Q BI
NAME : EXAMPLE X1 X2 X3 : I 0.0 : F 1.3 : Q 1.0
: A = X1 : A = X2 : = = X3
First call
A A = I 0.0 F 1.3 Q 1.0
Parameter list for first call
: BE
. .
: A I 0.1 : JC FB5 NAME : EXAMPLE X1 X2 X3 : I 0.3 : I 0.2 : Q 1.0
Formal operands Actual operands
Second call Parameter list for second call
A A = I 0.3 I 0.2 Q 1.0
Formal operands
Figure 7-6. Programming a Function Block
7.3.5
Data Blocks
Data blocks (DB) store data to be processed in a program. The following data types are permissible: * * * Bit pattern (representation of controlled system states) Hexadecimal, binary or decimal numbers (times, results of arithmetic operations) Alphanumeric characters (ASCII message texts)
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Programming Data Blocks
www..com Begin programming a data block by specifying a block number between 2 and 63 for CPU 100 or CPU 102, and between 2 and 255 for CPU 103. DB0 is reserved for the operating system, DB1 for setting parameters for internal functions (see section 9.1). Data is stored in this block in words.
If the information takes up less than 16 bits, the high-order bits are padded with zeros. Data input begins at data word 0 and continues in ascending order. A data block can hold up to 256 data words. You can call up or change the data word contents with load or transfer operations. Input 0000 0001 0003 : : : KH KT KF = = = A13C 100.2 +21874 Stored Values DW0 DW1 DW2 A13C 2100 5572
Figure 7-7. Example of Data Block Contents You can also create or delete data blocks in the control program (see section 8.1.8). Program Processing with Data Blocks * * * * A data block must be called in the program with the C DBx operation (x = DB number) before it can be accessed. Within a block, a data block remains valid until another data block is called. When the program jumps back into the higher-level block, the data block that was valid before the block call is again valid. After OB1, 2, 13, 21, 22 have been called by the operating system, no DB is valid. Valid DB Valid DB DB10 C DB11 DB11 DB10
When PB20 is called, the valid data area is entered into memory. When the program jumps back, this area is reopened.
PB7 C DB10
PB20
DB10 JU PB20
Figure 7-8. Validity Areas of Data Blocks The Function of DB1 DB1 is used for special functions. DB1 is already integrated into CPU 103 version 8MA03 and higher and contains (default) values that you can either accept or change (see section 9.1). DB1 is evaluated once during start-up: either after Power ON or after a transition from STOP to RUN.
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7.4
Program Processing
Some of the organization blocks (OBs) are responsible for structuring and managing the control program. These OBS can be grouped according to the following assignments: * * * * OBs for START-UP program processing One OB for cyclic program processing OBs for time-controlled program processing OBs for (process) interrupt-driven program processing
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The S5-100U has additional OBs whose functions are similar to those of integral function blocks (e.g., PID control algorithm). These OBs are described in chapter 9. Section 7.3.1 summarizes all of the OBs. Comparing Programming Possibilities for CPU 100, CPU 102, and CPU 103 Table 7-5. Programming Possibilities CPU Cyclical Interrupt-driven Time-controlled Integral FBs Graph 5 Programmable FBs CPU 100 Yes No No No No No CPU 102 Yes No No Yes (for 8MA02 and higher) No No CPU 103 Yes Yes (for 8MA02 and higher) Yes (for 8MA02 and higher) Yes Yes Yes
Beginning with section 7.4.2, you learn which special organization blocks each of the CPUs has available to perform the programming tasks described in Table 7-5. You also learn which precautions you need to take when you program.
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7.4.1
Program Processing with CPU 102
You can process the program in the following two modes: * * Normal mode Test mode
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Program processing is faster in the normal mode, but you can not use the STATUS test function. Transferring from one mode to the other is called a mode change. Test Mode: Scanning the STEP 5 program Normal Mode: The control program you have written in STEP 5 is not processed directly. What is processed is a translated or runtime-optimized form of the program generated by the programmable controller.
Cycle trigger Cycle trigger
Control program in STEP 5
Assemble (compile)
Runtimeoptimized program
Transfer data Transfer data
Test mode Figure 7-9.
Normal mode Program Scanning with CPU 102
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Special Features of the Normal Mode
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Significance of the Memory Submodule Normal mode is only possible if the memory submodule is plugged in. This submodule contains only the STEP 5 program. The CPU RAM contains the STEP 5 program and the compiled program to be processed.
Program Change You can enter, modify, or erase PBs, OBs and FBs only in the test mode. You can read out the STEP 5 program with the programmer.
Signal Status Display You can monitor and control signals states with the "STATUS VAR" and "FORCE VAR" functions. The "STATUS" function can be used only in the test mode.
Diagnostics The "BSTACK" diagnostics function cannot be activated.
Fault Analysis The ISTACK bytes 23 to 27 are not valid. Therefore, you cannot determine the point in a program where an interruption took place (programmable controller in STOP, e.g., programmed loop with timeout). However, when compiling the program, errors (e.g., illegal operations and parameters) are detected and displayed by the STEP address counter in the ISTACK. This counter points to the error in the STEP 5 program.
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Mode Change
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Load program (manual) 1. Turn off the PLC 2. Plug in memory submodule 3. Press COPY key and hold it down 4. Turn on the PLC - Red LED flickers - Red LED lights when program is loaded 5. Release COPY key
Back up program (without PG) Battery required 1. Turn off the PLC 2. Plug in EEPROM submodule 3. Turn on the PLC 4. Press COPY key for at least 3 s 5. Release it as soon as
Load program (automatic) 1. Reset the PLC 2. Turn off the PLC 3. Plug in memory submodule 4. Turn on the PLC - Red LED flickers when program loaded
the red LED starts flickering - Program is stored in EEPROM submodule and compiled in the CPU's RAM - Red LED lights
Test mode
Load program (with PG) With or without battery 1. Turn on the PLC 2. Switch PLC to STOP 3. Perform an overall reset with the PG 4. Enter the program 5. Transfer the program
Normal mode
Reset PLC (without PG) 1. Remove the battery 2. Turn off the PLC 3. Remove the memory submodule 4. Turn on the PLC
If program scanning is interrupted (fault, mode selector at STOP or Power OFF in the case of battery backup), the mode that was active prior to the interruption will be the operating mode when RUN is resumed.
Figure 7-10. Mode Change for CPU 102
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Determining the Processing Mode in the ISTACK
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Bit Byte 1 2 . . . 6 7 . . .
7
6
...
KEIN AS
Figure 7-11. Display of the Processing Mode in the ISTACK You can use a programmer to check the current processing mode in the ISTACK. The ISTACK display, byte 6, is possible in RUN and STOP (see section 5.2). KEIN AS=1 : Test mode Execution time is 70 ms/1024 binary statements. There are no limitations on the test or operator functions. KEIN AS=0: Normal mode Execution time is 7 ms/1024 binary statements. There are limited test and operator functions.
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Further Reduction in the Execution Time in Normal Mode
www..com Logic operations executed in one input byte, output byte, or flag byte require only 2 s per logic operation. Program your control according to example 2.
Example 1: STL
A AN ON O = A A AN = I I I I Q F F F Q 0.0 1.1 2.3 3.5 4.2 15.1 16.3 17.7 4.5
Example 2: Time/ s 5 6 6 6 8 5 6 6 8 56 s
A AN ON O = A A AN =
STL
I I I I Q F F F Q 0.0 0.1 0.3 0.5 4.2 15.1 15.3 15.7 4.5
Time/ s 5 2 2 2 8 5 2 2 8 36 s
Execution time
Execution time
Approx. 6 s/binary operation
Approx. 4 s/binary operation
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7.4.2
START-UP Program Processing
In the START-UP mode, the operating system of the CPU automatically calls up a start-up OB if the OB has been programmed. * * OB21 is called up for a manual cold restart. OB22 is called up for an automatic cold start after power recovery if the programmable controller was previously in the RUN mode.
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If you have programmed start-up OBs, they are processed before the cyclic program processing occurs. The start-up OB program is appropriate, for example, for a one-time presetting of certain system data. If the appropriate start-up OB is not programmed, the programmable controller jumps directly to the RUN mode. See section 4.1.2. Features of the start-up blocks (OB21, OB22): * * * * The red and green LEDs light. Timers are processed. Scan monitoring is not activated. Interrupts are not processed.
Operating mode switch set from STOP to RUN; Programmer command RUN Clear the process image I/O table, the non-retentive timers, counters, and flags. Interpret DB12
Power recovery1
Cold restart routine
Clear the process image I/O table, the non-retentive timers, counters, and flags. Interpret DB12
Processing OB21
Processing OB22
STARTUP
Enable the outputs
Read in the PII Process OB1 Read out the PIQ
RUN
1
2
This is the procedure if the programmable controller was in the RUN mode when the power went off, if the mode switch was still on RUN when the power was restored, and if the battery was inserted. If the battery was not inserted, you must insert a memory submodule containing the valid blocks. For CPU 103 version 8MA03 and higher
Figure 7-12. Setting the Start-Up Procedure
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The following two examples show you how you can program a start-up OB. Example 1: Programming OB22
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Example After power recovery, you want to be sure that the power supply voltage for the I/Os has attained its rated value before the cyclic program is processed. A time loop is therefore programmed in OB22.
AN L SP F001: A JC BE
STL
T KT T T 1 500.0 1 1
Explanation A 5 s time value is loaded in ACCU 1. Timer 1 is started. After 5 s, cyclic program processing begins in OB1.
=F001
Example 2: Programming OB21
Example After the operating mode switch causes a cold restart, flag bytes 0 to 9 are preset with "0". The other flag bytes are retained since they contain important machine functions.
L T T T T T BE
STL
KH FW FW FW FW FW 0 0 2 4 6 8
Explanation Value "0" is loaded in ACCU 1 and transferred into flag words 0, 2, 4, 6, and 8.
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7.4.3
Cyclic Program Processing
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The operating system calls OB1 cyclically. If you want to have structured programming, you should program only jump operations (block calls) in OB1. The blocks you call up, PBs, FBs, and SBs, should contain completed functional units in order to provide a clearer overview. A time monitor is triggered at the beginning of each program processing cycle (scan cycle trigger). If the scan cycle time trigger is not reset within the scan monitoring time, the CPU automatically enters the STOP mode and disables the output modules. You can set the monitoring time (see Table 6-6). You could have a control program that is so complex that it cannot be processed within 300 ms. With CPU 103 and higher, you can use OB31 (see section 9.3) to lengthen (retrigger) the scan monitoring time in the control program. Monitoring time is exceeded, for example, if you program endless loops or if there is a malfunction in the programmable controller. Figure 7-13. Cyclic Program Processing
Cycle trigger
Control program
Transfer data
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Response Time
www..com Response time tR is defined as the time between a change in the input signal and the subsequent change in the output signal.
Prerequisites for the following information: * * No interrupts are running. The programmer interface is not in use. (The load is very dependent on the function.)
The response time is influenced by the following factors: * * * * * The input module delay (see chapter 14) The program processing time (see Appendix A) The data cycle times (number of data bits x 25 s - a bus configuration of 256 data bits results in a data cycle time of approximately 8 ms) The operating system run time (up to 3% of the program cycle) The processing of the internal timers
T 0 to T15 for CPU 100 T 0 to T31 for CPU 102 T 0 to T127 for CPU 103
Calculating the maximum response time tRm: * * With tG= 2 x program processing time + 3 x data cycle time + 3 x operating system run time + delay time of the input modules
16 32 128)
Maximum processing time of the internal timers tTm tTm = number of processed timers x 32 s (number of processed timers for CPU 100:
number of processed timers for CPU 102: number of processed timers for CPU 103:
tTm = 103 s for CPU 103 version 8MA03 tTm tRm = tG ( 1 + ) + tTm. 10 ms During the transition from STOP to RUN, there is a one-time increase in the response time to about 200 ms.
Response Input module delay
1 0
I 0.0
1
Q 1.0
0
Time Data cycle Program processing A I 0.0 = Q 1.0 Data cycle
Figure 7-14. Calculating the Response Time
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7.4.4
Time-Controlled Program Processing, for CPU 103 Version 8MA02
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Time-controlled program processing can be defined as a (periodic) time signal causing the CPU to interrupt cyclic program processing to process a specific program. Once this program has been processed, the CPU returns to the interruption point in the cyclic program and resumes processing. Prerequisites for time-controlled program processing Time-controlled program processing is possible only if the following prerequisites have been fulfilled. * * * * Organization block OB13 must be programmed. The programmable controller must be set to Power ON and the RUN mode must be selected. Interrupt processing may not be disabled (by the IA - disable interrupt - operation). See section 8.2.8. The OB13 call-up interval is set to > 0.
OB13 is available for time-controlled program processing when using CPU 103 version 8MA02 and higher. You determine the intervals at which you want the operating system to process OB13. It is also possible to change the call-up intervals during cyclic program processing. Cyclical program processing continues if OB13 is not programmed. * Setting the call-up interval You can set the call-up interval in DB1 using the TFB: block ID. You can set the times from 10 ms to 655,530 ms (use 10-ms increments). The default for OB13 is 100 ms. Interrupt possibilities OB13 can interrupt the cyclical program after any STEP 5 statement. After the current STEP 5 statement is executed, you can use process interrupts to interrupt time-controlled program processing. After interrupt processing, time-controlled program processing continues until it is finished. OB13 cannot interrupt the operating system, the process interrupts (OB2), or the current timecontrolled program processing (OB13). * Disabling/enabling the call-up Use the IA command to disable, and the RA command to enable the OB13 call-up. A call-up request can be stored during a call-up disable. The default is RA. See section 8.2.8.
*
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*
Saving data OB uses scratchpad flags that are also used in the cyclic control program, then these scratchpad flags must be saved in a data block during the processing of the timecontrolled OB.
If a time-controlled www..com
Note
When processing OB13, you may not exceed the block nesting depth of 16 levels. When processing with CPU 103 (6ES5 103-8MA03), you may not exceed the block nesting depth of 32 levels.
*
Reading out the interrupt PII When OB13 is called, the signals of the input modules are read into the interrupt PII. The interrupt PII can be scanned in OB13 by means of the L PY 0 to 127 or L PW 0 to 126 load operations (load byte x or word x of the interrupt PII in ACCU 1). There is an interrupt input data cycle prior to time-controlled program processing. The interrupt data cycle time lengthens the response time of the cyclical program processing. If other operands are entered, the CPU goes in the STOP mode (see section 5.2.1). This error is indicated in ISTACK by the "NNN" error message.
*
Writing to the interrupt PIQ Data to the external I/Os can be written to the interrupt PIQ by means of transfer operations T PY 0 to 127 or T PW 0 to 126. The "normal" PIQ is written to simultaneously. After OB13 has finished, the data that has been transferred to the interrupt PIQ is output to the peripheral I/Os in an interrupt output data cycle (before "normal" program processing). The interrupt data cycle time lengthens the response time of the cyclical program processing.
Note
The interrupt output data cycle is executed only if the interrupt PIQ has been written to.
7.4.5
Interrupt-Driven Program Processing, for CPU 103 Version 8MA02 and Higher
For CPU 103 version 8MA02 and higher, interrupt-driven program processing is initiated when a signal from the process causes the CPU to interrupt the cyclic or time-controlled program processing and execute a specific program. When this program has been scanned, the CPU returns to the point of interruption in the cyclic or time-controlled program and resumes scanning at that point. Chapter 10 contains detailed information about interrupt processing.
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7.5
Processing Blocks
Earlier sections in this chapter described how to use blocks. Chapter 8 introduces all of the operations required to work with blocks. You can change any block that has been programmed. The following sections will deal only briefly with the different ways you can change blocks. Refer to the operator`s guide for your programmer for more detailed information on changing blocks.
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7.5.1
Changing Programs
You can use the following programmer functions to make program changes with any block type. * * * INPUT OUTPUT STATUS (see section 4.5)
These three programmer functions make it possible for you to make the following types of changes: * * Delete, insert, or overwrite statements. Insert or delete segments.
7.5.2
Changing Blocks
Program changes refer to changing the contents of a block. You can also delete or overwrite a complete block. When you delete a block, it is not deleted from the program memory but simply becomes invalid. You cannot enter new information in the memory location of an invalid block. This may cause new blocks not to be accepted. If a new block is not accepted, then the PG transmits the "no space available" error message. You can make more space by compressing the programmable controller memory.
7.5.3
Compressing the Program Memory
Figure 7-15 illustrates what takes place in the program memory during a COMPRESS operation. Internally, one block is shifted per cycle. Program memory RAM Valid blocks Invalid Compress Input not possible PB Available memory space Figure 7-15. Compressing the Program Memory Input possible PB Program memory RAM
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You can use the COMPRESS programmer function to clean up internal program memory. If there is a power failure during the compress operation when a block is being shifted and block shifting can not be completed, the CPU remains in the STOP mode. The "NINEU" error message appears. Both the"BSTSCH" and the "SCHTAE" bits are set in the ISTACK. Remedy: Overall reset.
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7.6
Number Representation
With STEP 5 you can work with numbers in the following five representations: * * * * * Decimal numbers from -32768 to +32767 (KF) Hexadecimal numbers from 0000 to FFFF (KH) BCD-coded numbers (4 tetrads) from 0000 to 9999 Bit patterns (KM) Constant byte (two-byte representation) from 0 to 255 for each byte (KY)
Number Formats The programmable controller is designed to process binary signal states (only "0" and "1"). Therefore the programmable controller represents all numbers internally as 16-bit binary numbers or as bit patterns. Four bits can be combined into a tetrad (BCD) to shorten the binary code representation. The value of these tetrads can be displayed in hexadecimal representation. Example: 16-bit binary coded number and shortened hexadecimal representation
Word no. Byte no. Bit no. Binary code representation Meaning
n n (high byte) n+ 1 (low byte)
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 0 0 0 1 1 1 1 1 0 1 1 0 0 0 1 1
215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 1 F 6 3
Hexadecimal representation
Figure 7-16. Bit Assignment of a 16-Bit Fixed-Point Binary Number
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You can work with binary-coded decimals to program timers and counters in the decimal system. BCD tetrads are defined in the range of 0 to 9. Example: 12-bit timer or counter value in BCD and decimal formats
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Word No. Byte No. Bit No. BCD No. Meaning Decimal format n (high byte)
n n+ 1 (low byte)
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 0 0 0 0 1 0 0 1 0 0 1 1 0 0 0 1
215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 0 9 3 1
Figure 7-17. BCD and Decimal Formats
Table 7-6. Binary 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
Comparison of Number Formats BCD 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001 0001 0001 0001 0001 0001 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 0000 0001 0010 0011 0100 0101 Hexadecimal 0 1 2 3 4 5 6 7 8 9 A B C D E F
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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You can use the "LC" operation to convert a binary number to a BCD number for timers and counters. www..com Example: Comparing a count in counter 1 with decimal number 499 The comparison value must be stored in the accunulator by means of a load operation. Use the "LKF + 499" statement so that you do not have to convert the value 499 into other numerical systems (binary or hexadecimal) for the input. The number 1F3H is then stored in the accumulator. The current count must also be loaded into the accumulator.
Incorrect Method: If you use the "LCC1" statement, the current count will be loaded in BCD. The "!=F" comparison operation results in a "not equal to" condition since the comparison uses different formats.
Correct Method: The formats are identical if the "LC1" statement is input.
High Byte 0000000111110011 L KF+499 0000010010011001 LC C 1
Low Byte
0000000111110011 L KF+499 0000000111110011 L C1
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8
STEP 5 Operations Basic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Boolean Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Set/Reset Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . Timer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Counter Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparison Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Arithmetic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Call Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supplementary Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load Operation, for CPU 103 and Higher . . . . . . . . . . . . . . . . . . . Enable Operation, for CPU 103 and Higher . . . . . . . . . . . . . . . . . Bit Test Operations, for CPU 103 and Higher . . . . . . . . . . . . . . . . Digital Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shift Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conversion Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Decrement/Increment, for CPU 103 and Higher . . . . . . . . . . . . . . Disable/Enable Interrupt, for CPU 103 Version 8MA02 and Higher . "DO" Operation, for CPU 103 and Higher .................. Jump Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Substitution Operations, for CPU 103 and Higher . . . . . . . . . . . . . System Operations, for CPU 103 and Higher . . . . . . . . . . . . . . . . Set Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . Arithmetic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Condition Code Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sample Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Momentary-Contact Relay/Edge Evaluation . . . . . . . . . . . . . . . . . Binary Scaler/Binary Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clock/Clock-Pulse Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1 2 7 10 15 25 30 31 33 38 39 40 41 42 44 48 50 52 53 54 56 58 64 64 64 67 68
8.1 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 8.1.6 8.1.7 8.1.8 8.1.9 8.2 8.2.1 8.2.2 8.2.3 8.2.4 8.2.5 8.2.6 8.2.7 8.2.8 8.2.9 8.2.10 8.2.11 8.3 8.3.1 8.3.2 8.3.3 8.3.4 8.4 8.5 8.5.1 8.5.2 8.5.3
8 - 69 8 8 8 8 71 71 71 73
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Figures
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8-1 8-2 8-3 8-4 8-5 8-6 Tables
Accumulator Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Execution of the Load Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transferring a Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output of the Current Time (Example) . . . . . . . . . . . . . . . . . . . . . . . . . . Outputting the Current Counter Status (Example) . . . . . . . . . . . . . . . . . . Executing a "DO" Operation ................................
8 8 8 8 8 8
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10 12 12 18 27 55
Basic Operations 8-1 Overview of Boolean Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 Overview of the Set/Reset Operations . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3 Overview of Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . 8-4 Overview of Timer Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5 Overview of Counter Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6 Overview of Comparison Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7 Overview of Arithmetic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8 Overview of Block Call Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9 Other Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supplementary Operations 8-10 Load Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-11 Enable Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 Overview of Bit Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13 Effect of "TB" and "TBN" on the RLO ......................... 8-14 Overview of Digital Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15 Overview of Shift Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16 Overview of Conversion Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17 Decrement/Increment Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-18 Disable/Enable Interrupt Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-19 Overview of the "DO" Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-20 Overview of Jump Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21 Overview of Binary Logic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-22 Overview of Set/Reset Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-23 Overview of Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . 8-24 Overview of Timer and Counter Operations . . . . . . . . . . . . . . . . . . . . . . 8-25 "DO" Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-26 Overview of Set Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Operations 8-27 Overview of Load and Transfer Operations . . . . . . . . . . . . . . . . . . . . . . 8-28 Overview of the "ADD" Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-29 The "TAK" and "STS" Operations ............................ 8-30 Condition Code Settings for Comparison Operations . . . . . . . . . . . . . . . . 8-31 Condition Code Settings for Fixed-Point Arithmetic Operations . . . . . . . . . 8-32 Condition Code Settings for Digital Logic Operations . . . . . . . . . . . . . . . 8-33 Condition Code Settings for Shift Operations . . . . . . . . . . . . . . . . . . . . . 8-34 Condition Code Settings for Conversion Operations . . . . . . . . . . . . . . . .
8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
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8
*
STEP 5 Operations
Basic Operations include functions that can be executed in organization, program, sequence, and function blocks. Except for the addition (+F), subtraction (-F), and organizational operations, the basic operations can be input and output in the statement list (STL), control system flowchart (CSF), or ladder diagram (LAD) methods of representation. Supplementary Operations include complex functions such as substitution statements, test functions, and shift and conversion operations. They can be input and output in STL form only. System Operations access the operating system directly. Only an experienced programmer should use them. System operations can be input and output in STL form only.
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The STEP 5 programming language has the following three operation types:
* *
8.1
Basic Operations
Sections 8.1.1 through 8.1.9 use examples to describe the basic operations.
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8-1
STEP 5 Operations
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8.1.1
Boolean Logic Operations
Table 8-1 provides an overview of Boolean logic operations. Examples follow the table. Table 8-1. Overview of Boolean Logic Operations Operation O Operand Meaning
Combine AND operations through logic OR Combine the result of the next AND logic operation (RLO) with the previous RLO through logic OR. Combine expression enclosed in parentheses through logic AND Combine the RLO of the expression enclosed in parentheses with the previous RLO through logic AND. Combine expression enclosed in parentheses through logic OR Combine the RLO of the expression enclosed in parentheses with the previous RLO through logic OR. Close parenthesis Conclude the expression enclosed in parentheses. Scan operand for "1" and combine with RLO through logic AND The result is "1" when the operand in question carries signal state "1". Otherwise the scan results in "0". Combine this result with the RLO in the processor through logic AND1. Scan operand for "1" and combine with RLO through logic OR The result is "1" when the operand in question has signal state "1". Otherwise the scan results in "0". Combine this result with the RLO in the processor through logic OR1. Scan operand for "0" and combine with RLO through logic AND The result is "1" when the operand in question has signal state "0". Otherwise the scan results in "0". Combine this result with the RLO in the processor through logic AND1. Scan operand for "0" and combine with RLO through logic OR The result is "1" when the operand in question has signal state "0". Otherwise the scan results in "0". Combine this result with the RLO in the processor through logic OR1.
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A(
O(
) A
O
AN
ON
ID I Q F T C
1
Parameter
CPU 100 0.0 to 127.7 0.0 to 127.7 0.0 to 127.7 0 to 15 0 to 15
CPU 102 0.0 to 127.7 0.0 to 127.7 0.0 to 127.7 0 to 31 0 to 31
CPU 103 0.0 to 127.7 0.0 to 127.7 0.0 to 255.7 0 to 127 0 to 127
If the scan follows an RLO limiting operation directly (first scan), the scan result is reloaded as a new RLO.
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AND Operation
www..com The AND operation scans to see if various conditions are satisfied simultaneously.
Example Output Q 1.0 is "1" when all three inputs are "1". The output is "0" if at least one input is "0". The number of scans and the sequence of the logic statements are at random.
Circuit Diagram
I 0. 0 I 0.1 I 0.2 Q 1.0
STL
A A A = I I I Q 0.0 0.1 0.2 1.0 I 0.0 I 0.1 I 0.2
CSF
I 0.1 & Q 1.0
LAD
I 0.0
I 0.2
Q 1.0
OR Operation The OR operation scans to see if one of two (or more) conditions has been satisfied. Example Output Q 1.0 is "1" when at least one of the inputs is "1". Output Q 1.0 is "0" when all inputs are "0" simultaneously. The number of scans and the sequence of their programming are optional. Circuit Diagram
I 0.0
I 0.1
I 0.2
Q 1.0
STL
O O O = I I I Q 0.0 0.1 0.2 1.0
CSF
I 0.0 I 0.0 I 0.1 I 0.2
>=1
LAD
Q 1.0
I 0.1 Q 1.0
I 0.2
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STEP 5 Operations
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AND before OR Operation
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Example Output Q 1.0 is "1" when at least one AND condition has been satisfied. Output Q 1.0 is "0" when neither of the two AND conditions has been satisfied.
Circuit Diagram
I 0.0
I 0.2
I 0.1
I 0.3
Q 1.0
STL
A A O A A = I I I I Q 0.0 01 I 0.1 0.2 0.3 1.0 I 0. 0 &
CSF
LAD
I 0.0
>=1
I 0.1
Q 1.0
I 0.2 & I 0.3 Q 1.0
I 0.2
I 0.3
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STEP 5 Operations
OR before AND Operation
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Example Output Q 1.0 is "1" when one of the following conditions has been satisfied: * Input I 0.0 is "1". * Input I 0.1 and either input I 0.2 or I 0.3 is "1".
I 0.0
Circuit Diagram
I 0.2
I 0.3
I 0.1
Output Q 1.0 is "0" when none of the AND conditions has been satisfied.
Q 1.0
STL
O O A A( O O ) = I I I I Q 0.0 0.1 0.2 0.3 1.0
CSF
LAD
I 0.0 I 0.1 I 0.2 &
>=1
I 0.0
Q 1.0
I 0.2
>=1
I 0.1
I 0.3 I 0.3 Q 1.0
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8-5
STEP 5 Operations
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OR before AND Operation
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Example Output Q 1.0 is "1" when both OR conditions have been satisfied. Output Q 1.0 is "0" when at least one OR condition has not been satisfied.
Circuit Diagram
I 0.0
I 0.1
I 0.2
I 0.3
Q 1.0
STL
A( O O ) A( O O ) = I I 0.0 0.1 I 0.0
CSF
LAD
>=1
I 0.1
&
I 0.0
I 0.2
Q 1.0
I 0.1 I I Q 0.2 0.3 1.0 I 0.2
>=1
I 0.3
I 0.3
Q 1.0
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8.1.2
Set/Reset Operations
Set/reset operations store the result of logic operation (RLO) formed in the processor. The stored RLO represents the signal state of the addressed operand. Storage can be dynamic (assignment) or static (set and reset). Table 8-2 provides an overview of the set/reset operations. Examples follow the table. Table 8-2. Overview of the Set/Reset Operations Operation S Operand Meaning Set The first time the program is scanned with RLO = "1", signal state "1" is assigned to the addressed operand. An RLO change does not affect this status. Reset The first time the program is scanned with RLO = "1", signal state "0" is assigned to the addressed operand. An RLO change does not affect this status. Assign Every time the program is scanned, the current RLO is assigned to the addressed operand. ID I Q F Parameter CPU 100 0.0 to 127.7 0.0 to 127.7 0.0 to 127.7 CPU 102 0.0 to 127.7 0.0 to 127.7 0.0 to 127.7 CPU 103 0.0 to 127.7 0.0 to 127.7 0.0 to 255.7
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R
=
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8-7
STEP 5 Operations
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Flip-Flop for a Latching Signal Output (reset dominant)
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Example A "1" at input I 0.1 sets flip-flop Q 1.0 (signal state "1"). If the signal state at input I 0.1 changes to "0", the state of output Q 1.0 is maintained, i.e., the signal is latched. A "1" at input I 0.0 resets the flip-flop (signal state "0"). When the "SET" signal (input I 0.1) and the "RESET" signal (input I 0.0) are applied at the same time, the scanning operation that was programmed last (in this case A I 0.0) is in effect during processing of the rest of the program. In this example, resetting output Q 1.0 has priority. STL
A S A R NOP I Q I Q 0 0.1 1.0 0.0 1.0
Circuit Diagram
I 0.0
I 0.1
Q 1.0
CSF
LAD
I 0.1 Q 1.0 I 0.1 S I 0.0
Q 1.0 S
*
I 0.0
R
Q
R
Q
*
NOP 0
"NOP 0" is necessary if the program is to be represented in LAD or CSF form on programmers with a screen. During programming in LAD and CSF, such "NOP 0" operations are allotted automatically.
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RS Flip-Flop with Flags (set dominant)
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Example A "1" at input I 0.0 sets flip-flop F 1.7 (signal state "1"). If the signal state at input I 0.0 changes to "0", the state of flag F 1.7 is maintained, i.e., the signal is latched. A "1" at input 0.1 resets the flip-flop (signal state "0"). If the signal state at input I 0.1 changes to "0", flag F 1.7 retains signal state "0". If both inputs have a "1" signal state, the flip-flop is set (set dominant). The signal state of the flag is scanned and transferred to output Q 1.0. STL
A R A S A = I F I F F Q 0.1 1.7 0.0 1.7 1.7 1.0
Circuit Diagram
I 0.0
I 0.1
F 1.7
CSF
F 1.7 I 0.1 R I 0.0 S I 0.0 S Q Q 1.0
LAD
F 1.7 R Q 1.0 Q
I 0.1
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8-9
STEP 5 Operations
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8.1.3
Load and Transfer Operations
Use load and transfer operations to do the following tasks. * * * Exchange information between various operand areas Prepare time and count values for further processing Load constants for program processing
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Information flows indirectly via accumulators (ACCU 1 and ACCU 2). The accumulators are special registers in the programmable controller that serve as temporary storage. They are each 16 bits long. The accumulators are structured as shown in Figure 8-1. ACCU 2
15 8 7 0 15
ACCU 1
8 7 0
High byte
Low byte
High byte
Low byte
Figure 8-1. Accumulator Structure
You can load and transfer permissible operands in bytes or words. For exchange in bytes, information is stored right-justified, i.e., in the low byte. The remaining bits are set to zero. You can use various operations to process the information in the two accumulators. Load and transfer operations are executed independently of condition codes. Execution of these operations does not affect the condition codes. You can program load and transfer operations graphically only in combination with timer or counter operations; otherwise you can represent them only in STL form. Table 8-3 provides an overview of the load and transfer operations. Examples follow the table.
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Table 8-3. Overview of Load and Transfer Operations
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tion L
Operand
Meaning Load The operand contents are copied into ACCU 1 regardless of the RLO. The RLO is not affected. Transfer The contents of ACCU 1 are assigned to an operand regardless of the RLO. The RLO is not affected.
T
ID IB IW QB QW FY FW DR DL DW T1 C1 PY PW KM1 KH1 KF1 KY1 KB1 KS1
KT1 KC1 LD
Parameter CPU 100 0 to 127 0 to 126 0 to 127 0 to 126 0 to 127 0 to 126 0 to 255 0 to 255 0 to 255 0 to 15 0 to 15 --------random bit pattern (16 bits) 0 to FFFF -32768 to+32767 0 to 255 per byte 0 to 255 any 2 alphanumeric characters 0.0 to 999.3 0 to 999
CPU 102 0 to 127 0 to 126 0 to 127 0 to 126 0 to 127 0 to 126 0 to 255 0 to 255 0 to 255 0 to 31 0 to 31 --------random bit pattern (16 bits) 0 to FFFF -32768 to +32767 0 to 255 per byte 0 to 255 any 2 alphanumeric characters 0.0 to 999.3 0 to 999
CPU 103 0 to 127 0 to 126 0 to 127 0 to 126 0 to 255 0 to 254 0 to 255 0 to 255 0 to 255 0 to 127 0 to 127 0 to 127 0 to 126 random bit pattern (16 bits) 0 to FFFF -32768 to +32767 0 to 255 per byte 0 to 255 any 2 alphanumeric characters 0.0 to 999.3 0 to 999
Load in BCD Binary times and counts are loaded into ACCU 1 in BCD code regardless of the RLO. ID T C Parameter CPU 100 0 to 15 0 to 15 CPU 102 0 to 31 0 to 31 CPU 103 0 to 127 0 to 127
1 These operands cannot be used for transfer.
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STEP 5 Operations
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Load Operation
www..com During loading, information is copied from a memory area, e.g., from the PII, into ACCU 1. The previous contents of ACCU 1 are shifted to ACCU 2. The original contents of ACCU 2 are lost.
Example:
Two consecutive bytes (IB7 and IB8) are loaded from the PII into the accumulator. Loading does not change the PII (see Figure 8-2). Information from the PII
Lost information
ACCU 2 Byte d Byte c
ACCU 1 Byte b Byte a
L IB7 Byte d Byte c Byte b Byte a 0 IB7 L IB8 Byte b Byte a 0 IB7 0 IB8 IB IB7
Figure 8-2. Execution of the Load Operation
Transfer Operation During transfer, information from ACCU 1 is copied into the addressed memory area, e.g., into the PIQ. This transfer does not affect the contents of ACCU 1. Example: Figure 8-3 shows how byte a, the low byte in ACCU 1, is transferred to QB5.
ACCU 2 Byte d Byte c
ACCU 1 Byte b Byte a T QB5
Information in the PIQ
Lost information
Byte d
Byte c
Byte b
Byte a
Byte a
Previous value of QB5
Figure 8-3. Transferring a Byte
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STEP 5 Operations
Loading and Transferring a Time (See also Timer and Counter Operations)
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Example During graphic input, QW62 is assigned to output BI of a timer. The programmer automatically stores the corresponding load and transfer operation in the control program. Thus the contents of the memory location addressed with T 10 are loaded into ACCU 1. Afterwards, the contents of the accumulator are transferred to the process image addressed with QW62. In this example, you can see timer T 10 at QW62 in binary code. Outputs BI and DE are digital outputs. The time at output BI is in binary code. The time at output DE is in BCD code with time base. STL
A L SP I IW T 0.0 22 10 10 62
Representation
T 10
Load
QW62
Transfer
CSF
LAD
T 10 1
I 0.0 T 10 I 0.0 IW22 1 TV R BI DE Q QW62 IW22 TV R
NOP 0 L T T QW NOP 0 NOP 0
BI DE Q
QW62
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STEP 5 Operations
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Loading and Transferring a Time (Coded)
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Example The contents of the memory location addressed with T 10 are loaded into the accumulator in BCD code. Then a transfer operation transfers the accumulator contents to the process image memory location addressed by QW50. A coding operation is possible only indirectly for the graphic representation forms LAD and CSF by assigning an address to output DE of a timer or counter location. However, this operation can be entered with a separate statement with STL.
Representation
T 10
Load
Transfer QW50
STL
A L SP I IW T 0.0 22 10
CSF
LAD
T 10 I 0.0 IW22 1 TV R BI DE Q QW50
I0.0 1
T 10
NOP 0 NOP 0 LD T T QW NOP 0
IW22
TV R BI DE Q QW50
10 50
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8.1.4
Timer Operations
The program uses timer operations to implement and monitor chronological sequences. Table 8-4 provides an overview of timer operations. Examples follow the table. Table 8-4. Overview of Timer Operations Operation SP Operand Meaning Pulse Timer The timer is started on the leading edge of the RLO. When the RLO is "0", the timer is set to "0". Scans result in signal state "1" as long as the timer is running. Extended Pulse Timer The timer is started on the leading edge of the RLO. When the RLO is "0", the timer is not affected. Scans result in signal state "1" as long as the timer is running. On-Delay Timer The timer is started on the leading edge of the RLO. When the RLO is "0", the timer is set to "0". Scans result in signal state "1" when the timer has run out and the RLO is still pending at the input. Stored On-Delay Timer The timer is started on the leading edge of the RLO. When the RLO is "0", the timer is not affected. Scans result in signal state "1" when the timer has run out. The signal state becomes "0" when the timer is reset with the "R" operation. Off-Delay Timer The timer is started on the trailing edge of the RLO. When the RLO is "1", the timer is set to its initial value. Scans result in signal state "1" as long as the RLO at the input is "1" or the timer is still running. Reset Timer The timer is reset to its initial value as long as the RLO is "1". When the RLO is "0", the timer is not affected. Scans result in signal state "0" as long as the timer is reset or has not been started yet. ID T Parameter CPU 100 0 to 15 CPU 102 0 to 31 CPU 103 0 to 127
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SE
SD
SS
SF
R
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8-15
STEP 5 Operations
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Loading a Time
www..com Timer operations call internal timers. When a timer operation is started, the word in ACCU 1 is used as a time value. You must therefore first specify time values in the accumulator.
You can load a timer with any of the following data types: KT DW IW QW FW constant time value or data word input word output word flag word
These data types must be in BCD code.
Loading a Constant Time Value The following example shows how you can load a time value of 40 s. Operation Operand
L KT
40.2
Coded time base (0 to 3) Time (0 to 999)
Key for Time Base Base Factor 0 0.01 s 1 0.1 s 2 1s 3 10 s
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Example: KT 40.2 corresponds to 40 x 1 s. Tolerance:
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The time tolerance is equivalent to the time base. Examples Possible settings for the time 40 s Operand KT 400.1 KT 40.2 KT 4.3 400 x 0.1 s 40 4 x 1s x 10 s Time Interval - 0.1 s - 1s - 10 s 39.9 s to 40 s 39 s to 40 s 30 s to 40 s
Note
Always use the smallest time base possible.
Loading a Time as an Input, Output, Flag, or Data Word Load Statement: L DW 2
The time 638 s is stored in data word DW2 in BCD code. Bits 14 and 15 are insignificant for the time value.
15 0 Bit
11
1
0
0
1
1
0
0
0
1
1
1
0
0
0
DW2
Three-digit time value (in BCD code) Time base Key for Time Base: Base Factor 00 0.01 s 01 0.1 s 10 1s 11 10 s
You can also use the control program to write to data word DW2. Example: Store the value 270 x 100 ms in data word DW2 of data block DB3. C L T DB 3 KT 270.1 DW2
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STEP 5 Operations
S5-100U
Output of the Current Time 1 You can use a load operation to put the current time into ACCU 1 and process it further from there (see Figure 8-4). Use the "Load in BCD" operation for digital display output. Current time in T1
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L T1
LD T1
ACCU 1
Binary time value
Time base
Three-digit time value in BCD code
indicates bit positions occupied by "0". Figure 8-4. Output of the Current Time (Example)
1
The current time is the time value in the addressed timer.
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STEP 5 Operations
Starting a timer
www..com In the programmable controller, timers run asynchronously to program scanning. The time that has been set can run out during a program scanning cycle. It is evaluated by the next time scan. In the worst case, an entire program scanning cycle can go by before this evaluation. Consequently, timers should not activate themselves.
Example: Schematic Representation Signal from timer 17 0 1 Explanation
Program
The schematic shows the "nth + 1" processing cycle since timer T 17* was started. Although the timer ran out shortly after the statement "= Q 1.0", output Q 1.0 remains set. The change is not considered until the next program scanning cycle.
L
KT 100.0 17
SP T
A =
T Q
17 1.0
1s - n * tp
n: tp:
number of program scanning cycles program scan time
* KT 100.0 is equal to 1 s.
The following rules apply to timers: * * * * Except for "Reset timer", all timer operations are started only when there is an edge change. The RLO alternates between "0" and "1". After being started, the loaded time is decremented in units corresponding to the time base until it reaches zero. If there is an edge change while the timer is running, the timer is reset to its initial value and restarted. The signal state of a timer can be scanned with Boolean logic operations.
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Pulse Example:
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Output Q 1.0 is set when the signal state at input I 0.0 changes from "0" to "1". However, the output should not remain set longer than 5 s. Timing Diagram Signal states Circuit Diagram
I 0.0 1 0 1 0 Q 1.0 I 0.0 T1 Q 1.0
Time in s
5 T 1:
Time relay with transitional NO contact LAD
STL
A L SP NOP 0 NOP 0 NOP 0 A = T Q 1 1.0 I KT T 0.0 500.0 1
CSF
T1 I 0.0 KT 500.0 1 TV R BI DE Q Q 1.0
I 0.0 1 KT 500.0 TV R
T1
BI DE Q Q 1.0
Note
The time tolerance is equivalent to the time base. Always use the smallest time base possible.
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STEP 5 Operations
Extended pulse Example:
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Output Q 1.0 is set for a specific time when the signal at input I 0.0 changes to "1". The time is indicated in IW16. Timing Diagram Signal states
1 0 1 0 I 0.0 I 0.0
Circuit Diagram
Q 1.0 T2
Time
t t Q 1.0
T 2: Time relay with pulse shaper STL
A L I IW 0.0 16 2 I 0.0 IW16 1 TV
CSF
LAD
T2 I 0.0 V BI DE IW16 1 TV
T2 V BI DE Q 1.0 R Q Q 1.0
SE T NOP 0 NOP 0 NOP 0 A T = Q
2 1.0
R
Q
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On-Delay Example:
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Output Q 1.0 is set 9 s after input I 0.0 and remains set as long as the input carries signal "1". Timing Diagram Circuit Diagram
Signal states
I 0.0 1 0 1 0 Q 1.0 I 0.0
Time in s
9 9
T3 Q 1.0
STL
A L SD NOP 0 NOP 0 NOP 0 A = T Q 3 1.0 I KT T 0.0 900.0 3
CSF
LAD
T3 I 0.0 I 0.0 KT 900.0 T TV 0 BI DE R Q Q 1.0 R KT 900.0 T TV
T3 0 BI DE Q Q 1.0
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STEP 5 Operations
Stored On-Delay and Reset Example:
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Output Q 1.0 is set 5 s after I 0.0. Further changes in the signal state at input I 0.0 do not affect the output. Input I 0.1 resets timer T 4 to its initial value and sets output Q 1.0 to zero. Timing Diagram Circuit Diagram
Signal states
1 0 1 0 1 0 I 0.1 Q 1.0 H1
I 0.1
I 0.0
I 0.0
H1
T4 Q 1.0 H1
5
5
Time in s
H 1: Auxiliary relay STL
A L SS I KT T 0.0 500.0 4 0.1 4
CSF
LAD
T4 I 0.0 I 0.0 KT 500.0 T TV s BI DE I 0.1 R Q Q 1.0 KT 500.0 I 0.1 R T TV
T4 s BI DE Q Q 1.0
A I R T NOP 0 NOP 0 A T = Q
4 1.0
Note
The time tolerance is equivalent to the time base.
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Off-Delay Example:
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When input I 0.0 is reset, output Q 1.0 is set to zero after a certain delay (t). The value in FW14 specifies the delay time. Timing Diagram Circuit Diagram
Signal states
I 0.0 1 0 1 0 Q 1.0 I 0.0
Time in s
t t
T5 Q 1.0
STL
A L I FW 0.0 14 5 I 0.0 FW14 0 TV
CSF
LAD
T5 I 0.0 T BI DE FW14 0 TV
T5 T BI DE Q 1.0 R Q Q 1.0
SF T NOP 0 NOP 0 NOP 0 A T = Q
5 1.0
R
Q
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STEP 5 Operations
8.1.5
Counter Operations
The programmable controller uses counter operations to handle counting jobs. Counters can count up and down. The counting range is from 0 to 999 (three decades). Table 8-5 provides an overview of the counter operations. Examples follow the table. Table 8-5. Overview of Counter Operations Operation S R CU Operand Meaning Set Counter The counter is set on the leading edge of the RLO. Reset Counter The counter is set to zero as long as the RLO is "1". Count Up The count is incremented by 1 on the leading edge of the RLO. When the RLO is "0", the count is not affected. Count Down The count is decremented by 1 on the leading edge of the RLO. When the RLO is "0", the count is not affected. ID C Parameter CPU 100 0 to 15 CPU 102 0 to 31 CPU 103 0 to 127
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CD
Loading a Count Counter operations call internal counters. When a counter is set, the word in ACCU 1 is used as a count. You must therefore first store counts in the accumulator. You can load a count with any of the following data types: KC DW IW QW FW constant count or data word input word output word flag word
The data for these words must be in BCD code.
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STEP 5 Operations
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Loading a Constant Count
www..com The following example shows how the count 38 is loaded.
Operation Operand
L KC
38
Count (0 to 999)
Loading a Count as an Input, Output, Flag, or Data Word Load statement: L DW 3
The count 410 is stored in data word DW3 in BCD code. Bits 12 to 15 are insignificant for the count.
15
11
0
Bit
0
1
0
0
0
0
0
1
0
0
0
0
DW3
Three-digit count (in BCD code)
Scanning the Counter Use Boolean logic operations to scan the counter status (e.g., A Cx). As long as the count is not zero, the scan result is signal state "1".
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STEP 5 Operations
Outputting the Current Counter Status
www..com You can use a load operation to put the current counter status into ACCU 1 and process it further from there. The "Load in BCD" operation outputs a digital display (see Figure 8-5).
Current Counter Status in C2
L C2
LD C2
ACCU 1
Binary count
Three-digit count in BCD code
indicates bit positions occupied by "0". Figure 8-5. Outputting the Current Counter Status (Example)
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STEP 5 Operations
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Setting a Counter "S" and Counting Down "CD" Example:
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When input I 0.1 is switched on (set), counter 1 is set to count 7. Output Q 1.0 is now "1". Every time input I 0.0 is switched on (count down), the count is decremented by 1. The output is set to "0" when the count is "0". Timing Diagram Circuit Diagram
I 0.1 1 0 1 0 7 0 1 0 Q 1.0 I 0.0 KC 7 I 0.1 C1 I 0.0 IIII 0 CQ R S CI
Binary 16 bits
Time
Q 1.0 S C1 S C1
Count
STL
A CD NOP A L S NOP NOP NOP A = I C 0 I KC C 0 0 0 C Q 0.0 1 I 0.0 0.1 7 1 KC 7 CV R 1 1.0 CD CU I 0.1 S
CSF
LAD
C1
I 0.0 CD I 0.1 KC 7 CU S BI DE Q Q 1.0 CV R
C1
BI DE Q Q 1.0
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STEP 5 Operations
Resetting a Counter "R" and Counting Up "CU" Example:
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When input I 0.0 is switched on, the count in counter 1 is incremented by 1. As long as a second input (I 0.1) is "1", the count is reset to "0". The A C 1 operation results in signal state "1" at output Q 1.0 as long as the count is not "0". Timing Diagram Circuit Diagram
1 0 1 0 2 0 1 0
I 0.0
I 0.1
I 0.1 C1 I 0.0 Q 1.0
R
S
CI
IIII CQ 0
Binary 16 bits
Time
R C1 Q 1.0
STL
A CU NOP NOP NOP A R NOP NOP A = I C 0 0 0 I C 0 0 C Q 0.1 1 I 0.1 1 1.0 0.0 1
CSF
LAD
C1 I 0.0 CU CD S CV R BI DE Q Q 1.0
I 0.0 CU CD S CV I 0.1 R
C1
BI DE Q Q 1.0
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8.1.6 Comparison Operations
Comparison operations compare the contents of the two accumulators. The comparison does not change the accumulators' contents. Table 8-6 provides an overview of the comparison operations. An example follows the table. Table 8-6. Overview of Comparison Operations Operation != F Operand Meaning Compare for "equal to" The contents of the two accumulators are interpreted as bit patterns and scanned to see if they are equal. Compare for "not equal to" The contents of the two accumulators are interpreted as bit patterns and compared to see if they are not equal. Compare for "greater than" The contents of the two accumulators are interpreted as fixed-point numbers. They are compared to see if the operand in ACCU 2 is greater than the operand in ACCU 1. Compare for "greater than or equal to" The contents of the two accumulators are interpreted as fixed-point numbers. They are compared to see if the operand in ACCU 2 is greater than or equal to the operand in ACCU 1. Compare for "less than" The contents of the two accumulators are interpreted as fixed-point numbers. They are compared to see if the operand in ACCU 2 is less than the operand in ACCU 1. Compare for "less than or equal to" The contents of the two accumulators are interpreted as fixed-point numbers. They are compared to see if the operand in ACCU 2 is less than or equal to the operand in ACCU 1.
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><
F
>
F
>=
F
<
F
<=
F
Processing Comparison Operations To compare two operands, load them consecutively into the two accumulators. Execution of the operations is independent of the RLO. The result is binary and is available as RLO for further program processing. If the comparison is satisfied, the RLO is "1". Otherwise it is "0". Executing the comparison operations sets the condition codes (see section 8.4).
Note
When using comparison operations, make sure the operands have the same number format.
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STEP 5 Operations
Example:
Q 1.0 www..comis
The values of input bytes IB19 and IB20 are compared. If they are equal, output set. STL
L L IB IB Q 19 20 1.0 IB19 C1 !=
=
Circuit Diagram
IB19 IB20
CSF/LAD
C1
C2
!=F =
F
IB20
C2
Q
Q 1.0
Q 1.0
8.1.7
Arithmetic Operations
Arithmetic operations interpret the contents of the accumulators as fixed-point numbers and manipulate them. The result is stored in ACCU 1. Table 8-7 provides an overview of the arithmetic operations. An example follows the table. Table 8-7. Overview of Arithmetic Operations Operation +F -F Operand Meaning Addition The contents of both accumulators are added. Subtraction The contents of ACCU 1 are subtracted from the contents of ACCU 2.
CPU 102 and higher have integral function blocks for multiplication and division (see section 9.2).
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Processing an Arithmetic Operation
www..com Before an arithmetic operation is executed, both operands must be loaded into the accumulators.
Note
When using arithmetic operations, make sure the operands have the same number format.
Arithmetic operations are executed independently of the RLO. The result is available in ACCU 1 for further processing. The contents of ACCU 2 are not changed. These operations do not affect the RLO. The condition codes are set according to the results. STL
L L C3 C1
Explanation The value of counter 3 is loaded into ACCU 1. The value of counter 1 is loaded into ACCU 1. The previous contents of ACCU 1 are shifted to ACCU 2. The contents of the two accumulators are interpreted as 16-bit fixed-point numbers and added.
+F
T
QW12
The result, contents of ACCU 1, is transferred to output word QW12.
Numeric Example
15 0
876 + 668 = 1544
0000001101101100
ACCU 2
+F
0000001010011100
ACCU 1
0000011000001000
ACCU 1
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8.1.8
Block Call Operations
www..com Block call operations
specify the sequence of a structured program. Table 8-8 provides an overview of the block call operations. Examples follow the table. Table 8-8. Overview of Block Call Operations Operation JU Operand Meaning Jump unconditionally Program scanning continues in a different block regardless of the RLO. The RLO is not affected. Jump conditionally Program scanning jumps to a different block when the RLO is "1". Otherwise program scanning continues in the same block. The RLO is set to "1". ID OB PB FB SB C Parameter CPU 100 0 to 63 0 to 63 0 to 63 CPU 102 0 to 63 0 to 63 0 to 63 CPU 103 0 to 255 0 to 255 0 to 255 0 to 255
JC
Call a data block A data block is activated regardless of the RLO. Program scanning is not interrupted. The RLO is not affected. Generate and delete a data block* An area is set up in the RAM to store data regardless of the RLO. ID DB Parameter CPU 100 2 to 63** CPU 102 2 to 63** CPU 103 2 to 255**
G
BE
Block end The current block is terminated regardless of the RLO. Program scanning continues in the block in which the call originated. The RLO is "carried along" but not affected. BE is always the last statement in a block. Block end, unconditional The current block is terminated regardless of the RLO. Program scanning continues in the block in which the call originated. The RLO is "carried along" but not affected. Block end, conditional When the RLO is "1", the current block is terminated. Program scanning continues in the block in which the call originated. During the block change, the RLO remains "1". If the RLO is "0", the operation is not executed. The RLO is set to "1" and linear program scanning continues.
BEU
BEC
* **
The length of the DB must be loaded into ACCU 1 before execution of the operation. A length of 0 makes the DB invalid. Data blocks DB0 and DB1 are reserved for special functions.
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Unconditional Block Call "JU"
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One block is called within another block, regardless of conditions. Example: A special function has been programmed in FB26. It is called at several locations in the program, e.g., in PB63, and processed. STL
. . . . . FB 26 .
Program Sequence
PB63 FB26
Explanation The "JU FB26" statement in program block PB63 calls function block FB26.
JU JU FB26
Conditional Block Call "JC" One block is called within another block when the previous condition has been satisfied (RLO = "1"). Example: A special function has been programmed in FB63. It is called and processed under certain conditions, e.g., in PB10. STL
. . S A JC JC FB63 . F I FB . 1.0 0.0 63
Program Sequence
PB10 FB63
Explanation The "JC FB63" statement in program block PB10 calls function block FB63 if input I 0.0 is "1".
A
I 0.0
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Call a Data Block "C DB"
www..com Data blocks are always called unconditionally. All data processed following the call refers to the data block that has been called. This operation cannot generate new data blocks. Blocks that are called must be programmed or created before program scanning.
Example:
Program block PB3 needs information that has been programmed as data word DW1 in data block DB10. Other data, e.g., the result of an arithmetic operation, is stored as data word DW3 in data block DB20. STL
C L DB 10 DW 1 . . . . C DB 20 DW 3
Program Sequence
PB3 C DB10 L DW1 DB10 DW1
Explanation The information from data word DW1 in data block DB10 is loaded into the accumulator. The contents of ACCU 1 are stored in data word DW3 of data block DB20.
C DB20 T DW3
DB20 DW3
T
Generating and Deleting a Data Block The "G DB x" statement does not call a data block. Instead, it generates a new block. If you want to use the data in this data block, call it with the "C DB" statement. Before the "G DB" statement, indicate in ACCU 1 the number of data words the block is to have (see the example below). If you specify zero as the data block length, the data block in question is deleted, i.e., it is removed from the address list. It is considered nonexistent.
Note
The block is stored in memory and is designated as invalid until the programmable controller memory is compressed (see section 7.5.3).
If you try to set up a data block that already exists, the "G DB x" statement is not executed. A data block can be a maximum of 256 data words (DW0 to 255) in length.
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Generating a Data Block
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Example Generate a data block with 128 data words without the aid of a programmer.
L G
STL
KF + 127 DB 5
Explanation The constant fixed-point number +127 is loaded into ACCU 1. At the same time, the old contents of ACCU 1 are shifted to ACCU 2. Data block 5 is generated with a length of 128 data words (0000) in the RAM of the PLC and entered in the block address list. The next time the "G DB5" operation is processed, it has no effect if the contents of ACCU 1 are not 0.
Deleting a Data Block Example Delete a data block that is no longer needed.
L G
STL
KF + 0 DB 5
Explanation The constant fixed-point number +0 is loaded into ACCU 1. At the same time, the old contents of ACCU 1 are shifted to ACCU 2. Data block 5, which must be in the RAM of the PLC, is declared invalid and removed from the block address list.
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STEP 5 Operations
Block End "BE"
www..com The "BE" operation terminates a block. Data blocks do not need to be terminated. "BE" is always the last statement in a block. In structured programming, program scanning jumps back to the block where the call for the current block was made. Boolean logic operations cannot be continued in a higher-order block.
Example:
Program block PB3 is terminated by the "BE" statement. STL
. . . . . . BE BE
Program Sequence
OB1 PB3
Explanation The "BE" statement terminates program block PB3 and causes program scanning to return to organization block OB1.
JU PB3
Unconditional Block End "BEU" The "BEU" operation causes a return within a block. However, jump operations can bypass the "BEU" operation in function blocks (see sections 8.2.10 and 8.3.4). Binary logic operations cannot be continued in a higher-order block. Example: Scanning of function block FB21 is terminated regardless of the RLO. STL
. . . . JC= BEU . . . . BE BE
Program Sequence
PB8 FB21
Explanation The "BEU" statement causes program scanning to leave function block FB21 and return to program block PB8.
JC= JU FB21 BEU
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Conditional Block End "BEC"
www..com The "BEC" operation causes a return within a block if the previous condition has been satisfied (RLO = 1). Otherwise, linear program scanning is continued with RLO "1".
Example:
Scanning of program block FB20 is terminated if the RLO = "1". STL
. . . . I . . . .
Program Sequence
PB7 FB20
Explanation The "BEC" statement causes program scanning to return to program block PB7 from function block FB20 if input I 0.0 is "1".
A A I 0.0 JU FB20 BEC BEC
0.0
8.1.9
Other Operations
Table 8-9 lists other basic operations. Explanations follow the table. Table 8-9. Other Operations Operation STP Operand Meaning Stop at the end of program scanning (in OB1) Current program scanning is terminated. The PIQ is read out. Then the PLC goes into the STOP mode. "No" Operation Sixteen bits in the RAM are set to "0". "No" Operation Sixteen bits in the RAM are set to "1". Display Generation Operation "BLD" means a display generation operation for the programmer. ID Parameter 130, 131, 132, 133, 255
NOP 0 NOP 1 BLD
Note
These operations can be programmed in STL form only.
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STEP 5 Operations
STOP Operation
www..com The "STP" operation puts the programmable controller into the STOP mode. This can be desirable for time-critical system circumstances or when a programmable controller error occurs.
After the statement is processed, the control program is scanned to the end, regardless of the RLO. Afterwards the programmable controller goes into the STOP mode with the error ID "STS". You can restart the programmable controller with the mode selector (STOP to RUN) or with a programmer. "NOP" (No Operations) The "NOP" operations reserve or overwrite memory locations. Display Generation Operations "BLD" display generation operations divide program parts into segments within a block. "NOP" operations and display generation operations are significant only for the programmer when representing the STEP 5 program. The programmable controller does not execute any operation when these statements are processed.
8.2
Supplementary Operations
Supplementary operations extend the operations set. However, compared to basic operations, which can be programmed in all blocks, supplementary operations have the following limitations. * * They can be programmed in function blocks only. They can be represented in STL form only.
The following sections describe the supplementary operations.
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8.2.1
Load Operation, for CPU 103 and Higher
As with the basic load operations, the supplementary load operation copies information into the accumulator. Table 8-10 explains the load operation. An example follows the table. Table 8-10. Load Operation Operation L Operand Meaning Load A word from the system data is loaded into ACCU 1 regardless of the RLO. ID RS Parameter 0 to 255
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Example In order to set parameters for SINEC L1 bus operation via the system data, the programmer and slave numbers from SD57 should be input into ACCU 1.
... L ...
STL
Explanation
RS
57
Load ACCU 1 with the programmer and slave numbers.
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8.2.2
Enable Operation, for CPU 103 and Higher
You can use the enable operation (FR) to execute the following operations even without an edge change. * * * Start a timer Set a counter Count up and down
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Table 8-11 presents the enable operation. An example follows the table. Table 8-11. Enable Operation Operation FR Operand Meaning Enable a Timer/Counter Timers and counters are enabled on the leading edge of the RLO. This operation restarts a timer, sets a counter, or causes a counter to count up or down when the RLO "1" is pending at the "Start" operation. ID T C Parameter 0 to 127 0 to 127
Example Input I 0.0 starts a timer T 2 as an extended pulse (pulse width 50 s). This timer sets output Q 1.0 for the duration of the pulse. . . . . If output Q 1.1 is reset repeatedly, the timer should also be restarted repeatedly.
A FR BE A L SE A =
STL
I KT T T Q . . . . Q T 1.1 2 0.0 500.1 2 2 1.0
Explanation
Start a timer T 2 as an extended pulse. Output Q 1.0 is set for 50 s.
If output Q 1.1 is set (positive edge change of the RLO) during the time in which input I 0.0 is set, timer T 2 is restarted. Output Q 1.0 therefore remains set at the restarted time or is reset. If input I 0.0 is not set during the edge change of output Q 1.1, the timer is not restarted.
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8.2.3
Bit Test Operations, for CPU 103 and Higher
Bit test operations scan digital operands bit by bit and affect them. Bit test operations must always be at the beginning of a logic operation. Table 8-12 provides an overview of these operations. Table 8-12. Overview of Bit Operations Operation TB Operand Meaning Test a bit for signal state "1" A single bit is scanned regardless of the RLO. The RLO is affected according to the bit's signal state (see Table 8-13). Test a bit for signal state "0" A single bit is scanned regardless of the RLO. The RLO is affected according to the bit's signal state (see Table 8-13). Set a bit unconditionally The addressed bit is set to "1" regardless of the RLO. The RLO is not affected. Reset a bit unconditionally The addressed bit is set to "0" regardless of the RLO. The RLO is not affected. ID T C D RS1
1
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TBN
SU
RU
Parameter 0.0 to 127.15 0.0 to 127.15 0.0 to 255.15 0.0 to 255.15
RS applies only to TB and TBN
Table 8-13 shows how the RLO is formed during the bit test operations "TB" and "TBN". example for applying the bit operations follows the table. Table 8-13. Effect of "TB" and "TBN" on the RLO Operation Signal state of the bit in the operand indicated Result of logic operation 0 0 TB 1 1 0 1 TBN 1 0
An
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STEP 5 Operations
Example
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STL
C A CU A L S O O R LD T DB I C I KC C I F C C DW 10 0.0 10 0.1 000 10 0.2 5.2 10 10 12
Explanation Call data block 10. Input I 0.1 loads the count of counter 10 with the constant 0. With each positive edge change at I 0.0, the counter is incremented by 1. The counter is reset by either input I 0.2 or flag F 5.2. The current count of the counter is stored in data word DW12 in BCD code. As long as bit 8 of data word DW12 is zero, program processing jumps to function block FB5. This is the case for the first, third, fifth etc. batch of 100 pieces. As long as bit 8 of data word DW12 is "1", program scanning jumps to function block FB 6. This is the case for the second, fourth, sixth, etc. batch of 100 pieces. When data bit 11 of data word DW12 becomes "1" (the count is then 800), flag F 5.2 is set conditionally. Input I 0.4 loads the count of counter 20 with the constant 0. The count is incremented by 1 with each positive edge change at input I 0.3. If the count has reached 256 = 100H (bit 8 is "1"), program scanning jumps to the label "FULL". Otherwise the block is terminated.
A photoelectric barrier that counts piece goods is installed at input I 0.0. After every 100 pieces, the program is to jump to FB5 or FB6. After 800 pieces, counter 10 is to be reset automatically and start counting again.
TBN JC
D FB
12.8 5
TB JC
D FB
12.8 6
TB =
D F
12.11 5.2
A photoelectric barrier that counts piece goods is installed at input I 0.3. After every 256 pieces, the counter is supposed to be reset and start counting again.
:A :CU :A :L :S
I C I KC C
0.3 2 0.4 000 20 20.8 FULL
:TB C :JC = :BEU FULL:RU C :BE
20.8
Bit 8 of counter C 20 is set to "0" unconditionally. Then the count is again 000H.
Note
Times and counts are stored in the timer/counter word in hexadecimal notation in the 10 least significant bits (bits 0 to 9). The time base is stored in bits 12 and 13 of the timer word.
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8.2.4
Digital Logic Operations
Digital logic operations combine the contents of both accumulators logically bit by bit. Table 8-14 provides an overview of these digital logic operations. Examples follow the table. Table 8-14. Overview of Digital Logic Operations Operation AW OW XOW Operand Meaning Combine bit by bit through logic AND Combine bit by bit through logic OR Combine bit by bit through logic EXCLUSIVE OR
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Processing a Digital Logic Operation A digital logic operation is executed regardless of the RLO. It also does not affect the RLO. However, it sets condition codes according to the result of the arithmetic operation (see section 8.4).
Note
Make sure both operands have the same number format. Then load them into the accumulators before executing the operation.
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The result of the arithmetic operation is available in ACCU 1 for further processing. The contents of ACCU 2 are not affected. www..com STL
L L IW 92 KH 00FF
Explanation Load input word IW92 into ACCU 1. Load a constant into ACCU 1. The previous contents of ACCU 1 are shifted to ACCU 2. Combine the contents of both accumulators bit by bit through logic AND.
AW T QW 82
Transfer the resulting contents from ACCU 1 to output word QW82. Numeric Example IW92
15 0
ACCU 2
0111000110011100
KH 00FF ACCU 1
AND
Set the 8 high-order bits in input word IW92 to "0". Compare both words bit by bit. If corresponding bits are both "1", the result bit is set to "1".
0000000011111111
Result ACCU 1
0000000010011100
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STL
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L L IW 36 KH 00FF
Explanation Load input word IW36 into ACCU 1. Load a constant into ACCU 1. The previous contents of ACCU 1 are shifted to ACCU 2. Combine the contents of both accumulators bit by bit through logic OR.
OW T IW 36
Transfer the result (contents of ACCU 1) to input word IW36. Numeric Example IW36 Set the 8 low-order bits in input word IW36 to "1". Compare both words bit by bit. If either of the corresponding bits is "1", a "1" is set in the result word.
15
0
ACCU 2
1110010011000110
KH 00FF ACCU 1
OR
0000000011111111
Result ACCU 1
1110010011111111
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Explanation Load input word IW70 into ACCU 1. Load input word IW6 into ACCU 1. The previous contents of ACCU 1 are shifted to ACCU 2. Combine the contents of both accumulators bit by bit through logic EXCLUSIVE OR.
L L
IW 70 IW 6
XOW
T
QW 86
Transfer the result (contents of ACCU 1) to output word QW86.
Numeric Example IW70 Check to see if input words IW70 and IW6 are equal. The result bit is set to "1" only if corresponding bits in ACCU 1 and ACCU 2 are unequal.
15
0
ACCU 2
0001101101101100
IW6 ACCU 1
X-OR
1001100111000110
Result ACCU 1
1000001010101010
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8.2.5
Shift Operations
Shift operations shift a bit pattern in ACCU 1. The contents of ACCU 2 are not affected. Shifting multiplies or divides the contents of ACCU 1 by powers of two. Table 8-15 provides an overview of the shift operations. Examples follow the table. Table 8-15. Overview of Shift Operations Operation SLW SRW Operand Meaning Shift to the left. The bit pattern in ACCU 1 is shifted to the left. Shift to the right. The bit pattern in ACCU 1 is shifted to the right. Parameter 0 to 15
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Processing a Shift Operation Execution of shift operations is unconditional. The RLO is not affected. However, shift operations set condition codes. Consequently, the status of the last bit that is shifted out can be scanned with jump functions. The shift statement parameter indicates the number of bit positions by which the contents of ACCU 1 are to be shifted to the left (SLW) or to the right (SRW). Bit positions vacated during shifting are assigned zeros. The contents of the bits that are shifted out of ACCU 1 are lost. Following execution of the operation, the state of bit 20 (SRW) or bit 215 (SLW) has an influence on the CC1 bit, which can then be evaluated. A shift operation with parameter "0" is handled like a "NOP" operation. The central processor processes the next STEP 5 statement with no further reaction. Before executing a shift operation, load the operand to be processed into ACCU 1. The altered operand is available there for further processing.
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STL
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L SLW 3 T DW 3 DW 2
Explanation Load the contents of data word DW2 into ACCU 1. Shift the bit pattern in ACCU 1 three positions to the left. Transfer the result (contents of ACCU 1) to data word DW3. Numeric Example 46410 (DW2) The value 46410 is stored in data word DW2. Multiply this value by 23=8. Do so by shifting the bit pattern of DW2 in ACCU 1 three positions to the left.
15
0
ACCU 1
0000000111010000
SLW 3
15
371210
0
ACCU 1
0000111010000000
STL
L SRW 4 T QW 126 IW 124
Explanation Load the value of input word IW124 into ACCU 1. Shift the bit pattern in ACCU 1 four positions to the right. Transfer the result (contents of ACCU 1) to output word QW126. Numeric Example 35210 (IW124) The value 35210 is stored in IW124. Shift the corresponding bit pattern in ACCU 1 four positions to the right to divide the value 35210 by 24 = 16.
15
0
ACCU 1
0000000101100000
SRW 4
15
2210
0
ACCU 1
0000000000010110
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8.2.6
Conversion Operations
Conversion operations convert the values in ACCU 1. Table 8-16 provides an overview of the conversion operations. Examples follow the table. Table 8-16. Overview of Conversion Operations Operation CFW Operand Meaning One's complement The contents of ACCU 1 are inverted bit by bit. Two's complement The contents of ACCU 1 are inverted bit by bit. Afterwards the word 0001H is added.
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CSW
Processing Conversion Operations Execution of these operations does not depend on the RLO nor does it affect the RLO. The "CSW" operation sets the condition codes (see section 8.4). STL
L CFW T QW 20 DW 12
Explanation Load the contents of data word DW12 into ACCU 1. Invert all bits in ACCU 1. Transfer the new contents of ACCU 1 to output word QW20. Numeric Example DW12 In a system, normally open contacts have been replaced by normally closed contacts. If the information in data word DW12 is to maintain its previous effect, DW12 must be inverted.
15
0
ACCU 1
0111000110011100
CFW
15 0
ACCU 1
1000111001100011
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STL
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L CSW T DW 100 IW 12
Explanation Load the contents of input word IW12 into ACCU 1. Invert all bits and add a "1". Transfer the altered word to data word DW100. Numeric Example Form the negative value of the value in input word IW12.
15
IW12
0
ACCU 1
0101100111000101
CSW
15
+1
0
ACCU 1
1010011000111011
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8.2.7
Decrement/Increment, for CPU 103 and Higher
The decrement/increment operations change the data loaded into ACCU 1. Table 8-17 provides an overview of the decrement/increment operations. An example follows the table. Table 8-17. Decrement/Increment Operations Operation D Operand Meaning Decrement Decrement the contents of the accumulator. Increment Increment the contents of the accumulator. The contents of ACCU 1 are either decremented or incremented by the number indicated in the parameter. Execution of the operation is unconditional and is limited to the right-hand byte (without carry). Parameter 0 to 255
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I
Processing Execution of the decrement and increment operations is independent of the RLO and does not affect the RLO or the condition codes. The parameter indicates the value by which the contents of ACCU 1 are to be changed. The operations refer to decimal values; however, the result is stored in ACCU 1 in binary form. Changes relate only to the low byte in the accumulator. Example Increment the hexadecimal constant 1010H by 16 and store the result in data word DW8.
C L I
STL
DB KH 16 6 1010
Explanation Call data block DB6. Load hexadecimal constant 1010H into ACCU 1. Increment the low byte of ACCU 1 by 16. The result, 1020H, is located in ACCU 1. Transfer the contents of ACCU 1 (1020H) to data word DW8. Since the incrementation result is still in ACCU 1, you can decrement by 33 directly. The result would be FFFH. However, since the high byte of ACCU 1 is not decremented along with the low byte, the result in ACCU 1 is 10FFH. The contents of ACCU 1 are transferred to DW9 (10FFH).
In addition, decrement the incrementation result by 33 and store the new result in data word DW9.
T
DW
8
D
33
T
DW
9
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8.2.8
Disable/Enable Interrupt, for CPU 103 Version 8MA02 and Higher
The disable/enable interrupt operations affect interrupt-driven and time-controlled program scanning. They prevent process or time interrupts from interfering with the processing of a sequence of statements or blocks. Table 8-18 lists the disable/enable interrupt operations. An example follows the table. Table 8-18. Disable/Enable Interrupt Operations Operation IA RA Operand Disable interrupt Enable interrupt Meaning
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Processing Execution of the disable/enable interrupt operations does not depend on the RLO. These operations do not affect the RLO or the condition codes. After the "IA" statement is processed, no more interrupts are executed. The "RA" statement cancels the effect of "IA".
Example Disable interrupt processing in a specific program section and then enable it again.
STL
. . . . . = IA A I . . . FB . . . RA . . . 0.0 Q 1.0
Explanation
Disable interrupt.
JU
3
If an interrupt occurs, the program section between the "IA" and "RA" is scanned without interruption. Enable interrupt. Interrupts that occurred in the meantime are processed after the "RA" operation.
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8.2.9
"DO" Operation, for CPU 103 and Higher
Use the "DO" operation to process STEP 5 statements as indexed operations. This allows you to change the parameter of an operand during control program processing (see Table 8-19). Table 8-19. Operation DO ID FW DW "DO" Statements "DO flag word or data word x" is a two-word statement that is unaffected by the RLO. "DO" consists of the following two statements: * * The first statement contains the "DO" operation and a flag word or data word. The second statement defines the operation and the operand identifier you want the control program to process. You must enter 0 or 0.0 as the parameter. Operand Overview of the "DO" Operation Meaning Processing a flag word or data word Parameter 0 to 254 0 to 255
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The control program works with the parameter that is stored in the flag word or data word. This parameter is the one called up in the first statement. If you want to index binary operations, inputs, outputs, or flags, you input the bit address in the high byte of this word. You input the byte address in the low byte. In any other instance, the high byte must be "0". You can combine the following operations with the "DO" statement: Operations A1, AN, O, ON S, R, = FR T, RT, SF T, SD T, SP T, SS T, SE T, FR C, RC, SC, CD C, CU C L, LD, T JU=, JC=JZ=, JN=, JP=, JM=, JO= SLW, SRW D, I C DB, JU, JC, TNB
1
Explanations Boolean logic operations Set/reset operations Timer operations Counter operations Load and transfer operations Jump operations Shift operations Decrement and increment Block calls
In combination with "DO FW," the "A I" operation becomes the "A Q" operation if the byte address in the data word or flag word is higher than 127.
!
Caution
Damage to the system. Performing operations that are not listed in Table 8-20 will damage your system. Perform only those operations that are listed in Table 8-20.
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Figure 8-6 shows how the contents of a data word determine the parameter of the next statement.
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DB6 :C
FBx DB . . . :DO DW :A I :DO DW :FR T 6
Actual program :C DB . . . . :A I . :FR T 6
DW 12 DW 13
KH = 0108 KH = 0001
12 0.0 13 0
8.1 1
Figure 8-6. Executing a "DO" Operation
The following example illustrates how new parameters are generated in every program scan. Example Set the contents of data words DW20 to DW100 to signal state "0". The index register for the parameter for the data words is DW1.
F1 :C :L :T :L :DO :T
STL
DB 202 KB 20 DW 1 KH 0 DW 1 DW 0
Explanation Call data block DB202. Load constant number 20 in ACCU 1. Transfer contents from ACCU 1 to data word DW1. Load hex constant 0 in ACCU 1. DO data word DW1. Transfer the contents from ACCU 1 to the data word whose address is stored in data word DW1. Load data word DW1 in ACCU 1. Load constant number 1 in ACCU 1. Data word DW1 is shifted to ACCU 2. ACCU 2 und ACCU 1 are added, and the result is stored in ACCU 1 (data word address is higher). Transfer contents of ACCU 1 to data word DW1 (new data word address). The constant number 100 is loaded in ACCU 1 and the new data word address is shifted to ACCU 2. Compare the ACCUs for less than or equal to: ACCU 2 ACCU 1. Jump conditionally to label F1, if ACCU 2 ACCU 1.
:L :L
DW 1 KB 1
:+F
:T :L
DW 1 KB 100
:<=F :JC = F 1
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8.2.10 Jump Operations
Table 8.20 provides an overview of the jump operations. An example follows the table. Table 8-20. Overview of Jump Operations Operation JU = Operand Meaning Jump unconditionally The unconditional jump is executed independently of conditions. Jump conditionally The conditional jump is executed if the RLO is "1". If the RLO is "0", the statement is not executed and the RLO is set to "1". Jump if the result is "zero" The jump is executed only if CC 1 = 0 and CC 0 = 0 The RLO is not changed. Jump if the result is "not zero" The jump is executed only if CC 1 CC 0 The RLO is not changed. Jump if the result is positive The jump is executed only if CC 1 = 1 and CC 0 = 0 The RLO is not changed. Jump if the result is negative The jump is executed only if CC 1 = 0 and CC 0 = 1 The RLO is not changed. Jump on overflow The jump is executed if an overflow occurs. Otherwise the jump is not executed. The RLO is not changed.
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JC=
JZ =
JN =
JP =
JM =
JO =
ID Jump label (up to 4 characters)
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Processing Jump Operations
www..com A symbolic jump destination (jump label) must always be entered next to a jump operation. This jump label can have up to four characters. The first character must be a letter of the alphabet.
When programming, please be aware of the following items: * The absolute jump displacement cannot exceed +127 or - 128 words in the program memory. Some statements take up two words (e.g., "Load a constant"). For long jumps, insert an intermediate destination. Jumps can be executed only within a block. Jumping over segment boundaries ("BLD 255") is not permitted. Jump labels can be set only at the start of a series of scans for CPU 102. Example If no bit of input word IW1 is set, program scanning jumps to the label "AN 1". If input word IW1 and output word QW3 do not agree, program processing jumps back to the label "AN 0". Otherwise input word IW1 and data word DW12 are compared. If input word IW1 is greater than or less than data word DW12, program scanning jumps to the "DEST" label.
AN0
* * *
STL
:L :L :+F :JZ= :A IW 1 KH 0000 AN 1 I 0.0 . . . . . . IW 1 QW 3
Explanation Load input word IW1 into ACCU 1. If the contents of ACCU 1 equal zero1, jump to the label "AN 1". Otherwise process the next statement (I 0.0).
AN1
:L :L :XOW
:JN = AN 0 :L :L :>< IW 1 DW12 F
:JC = DEST . . . . . DEST :A I 0.1 . .
Compare input word IW1 and output word QW3. If they are not equal, set individual bits in ACCU 1. If the contents of ACCU 1 are not zero, jump to the label "AN 0". Otherwise process the next statements. Compare input word IW1 and data word DW12. If they are not equal, set RLO to "1". If the RLO = "1", jump to the "DEST" label. If the RLO = "0", process the next statement.
1
The "L..." statement does not affect the condition codes. An addition (+F) is executed with the constant 0000H so that the "JZ" operation can evaluate the contents of the accumulator.
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8.2.11 Substitution Operations, for CPU 103 and Higher
If you plan to process a program with various operands and without a lot of changes, it is advisable to assign parameters to individual operands (see section 7.3.4). If you have to change the operands, you only need to reassign the parameters in the function block call. These parameters are processed in the program as "formal operands". Special operations are necessary for this processing. However, these special operations are no different in their effect than operations without substitution. A brief description of these operations and examples follows. Binary Logic Operations Table 8-21 provides an overview of binary logic operations.
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Table 8-21. Overview of Binary Logic Operations Operation A = Operand Meaning AND operation Scan a formal operand for "1". AND operation Scan a formal operand for "0". OR operation Scan a formal operand for "1". OR operation Scan a formal operand for "0". Actual operands permitted Inputs, outputs, and flags addressed in binary form Timers and counters Parameter type I, Q, F Data type BI
AN = O =
ON =
Formal operand
T, C
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Set/Reset Operations
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Table 8-22 provides an overview of the set/reset operations. An example follows the table. Table 8-22. Overview of Set/Reset Operations Operation S = Operand Meaning Set a formal operand (binary). Reset a formal operand (binary). Assign The RLO is assigned to a formal operand. Actual operands permitted Inputs, outputs, and flags addressed in binary form Parameter type I, Q, F Data type BI
RB = = =
Formal operand
Example: FB30 is assigned parameters in OB1. Call in OB1
:JU FB 30 NAME ON 1 ON 2 ON 3 VAL1 OFF1 OFF2 MOT5 :COMBINE : I 0.0 : I 0.1 : : : : : : I 0.2 I 0.3 Q 1.0 Q 1.1 Q 1.2 BE :A :AN :O :S := :A :A :ON :RB := :BE
Program in FB30
=ON 1 =ON 2 =ON 3 =MOT 5 =OFF 1 =VAL 1 =ON 2 =ON 3 =MOT 5 =OFF 2
Executed Program
:A :AN :O :S := :A :A :ON :R := :BE I I I Q Q I I I Q Q 0.0 0.1 0.2 1.2 1.0 0.3 0.1 0.2 1.2 1.1
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Load and Transfer Operations
www..com Table 8-23 lists the various load and transfer operations. An example follows the table.
Table 8-23. Overview of Load and Transfer Operations Operation L LD = = Operand Load a formal operand. Load a formal operand in BCD code. Load the bit pattern of a formal operand. Transfer to a formal operand. Actual operands permitted Inputs, outputs, and flags addressed in binary form Data Timers and counters Timers and counters Bit pattern Inputs, outputs, data (DW, DR, DL) and flags addressed in binary form Parameter type I, Q, F PW*, PY* DW, DR, DL T, C T, C D I, Q DW, DR, DL F, PW*, PY* KF, KH, KM, KY, KS, KT, KC BY, W Data type BY, W Meaning
LW = T = Formal operand For L =
For LD For LW
= =
For T
=
* Not for integral function blocks Example: FB34 is assigned parameters in PB1. Call in PB1
:JU FB 34 :LOAD/TRAN : : : : : : I 0.0 I 0.1 FW 10 KC 140 C7 QW 4 :A :L :S :A :LW :S :A :CU :CU :LD :T :A :R :R :LW :LD :!=F :R :BE
Program in FB34
=I 0 =L1 C =I 1 =LW1 C I C C =LC1 =T1 I C C =LW2 =LC1 C
Executed Program
:A :L :S :A :L :S :A :CU :CU :LD :T :A :R :R :L :LD :!=F :R :BE I FW C I KC C I C C C QW I C C KC C C 0.0 10 6 0.1 140 7 0.2 6 7 7 4 0.3 6 7 160 7 7
NAME I0 I1 L1 LW1 : LC1 T1 LW2 :
6
7 0.2 6 7
: KC 160 :BE
0.3 6 7
7
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Timer and Counter Operations
www..com Table 8-24 provides an overview of timer and counter operations. Examples follow the table.
Table 8-24. Overview of Timer and Counter Operations Operation FR = Operand Meaning Enable a formal operand for a cold restart. (For a description, see "FT" or "FC", according to the formal operand). Reset a formal operand (digital). Start a pulse timer specified as a formal operand using the value stored in the accumulator. Start an on-delay timer specified as a formal operand using the value stored in the accumulator. Start an extended pulse timer specified as a formal operand using the value stored in the accumulator or set a counter specified as a formal operand using the count specified in the accumulator. Start a stored on-delay timer specified as a formal operand using the value stored in the accumulator or start the count up of a counter specified as a formal operand. Start an off-delay timer specified as a formal operand using the value stored in the accumulator or start the count down of a counter specified as a formal operand. Actual operands permitted Timers and counters1
1
RD = SP SD = =
SEC =
SSU =
SFD =
Formal operand
Parameter type T, C1
Data type
"SP" and "SD" do not apply to counters.
Specifying Times and Counts As with the basic operations, you can specify a time or count as a formal operand. In this case, you must distinguish as follows whether the value is located in an operand word or is specified as a constant. * * Operand words can be of parameter type "I" or "Q" and of data type "W". Use the "L=" operation to load them into the accumulator. Constants can be of parameter type "D" and of data type "KT" or "KC". Use "LW=" to load these formal operands into the accumulator.
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The following examples show how to work with timer and counter operations: Example 1:
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Function Block Call
:JU NAME I5 I6 TIM5 TIM6 OFF6 FB 32
Program in Function Block (FB32)
:AN :A :L :SFD :A :AN :L :SSU :A :O := :A :RD :RD :BE =I 5 =I 6 KT =TIM5 =I 5 =I 6 KT =TIM6 =TIM5 =TIM6 =OFF6 I =TIM5 =TIM6 005.2
Executed Program
:AN :A :L :SF :A :AN :L :SS :A :O := :A :R :R :BE I I KT T I I KT T T T Q I T T 0.0 0.1 5.2 5 0.0 0.1 5.2 6 5 6 1.0 0.2 5 6
:TIME : I 0.0 : I 0.1 : : : :BE T5 T6 Q 1.0
005.2
0.2
Example 2: Function Block Call
:JU FB 33 :COUNT : I 0.0 : : : : :BE I 0.1 I 0.2 C5 Q 1.0
Program in Function Block (FB33)
:A =I 2 KC =CNT5 =I 3 =CNT5 =I 4 =CNT5 =CNT5 =OFF3 I =CNT5 017 :L :SEC :A :SSU :A :SFD :A := :A :RD :BE
Executed Program
:A :L :S :A :CU :A :CD :A := :A :R :BE I KC C I C I C C Q I C 0.0 017 5 0.1 5 0.2 5 5 1.0 0.3 5
NAME I2 I3 I4 CNT5 OFF3
0.3
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"DO" Operation
www..com Table 8-25 and the example that follows explain the processing operation.
Table 8-25. "DO" Operation Operation DO = Operand Meaning Process formal operand The substituted blocks are called unconditionally. Parameter type B Data type
Formal operands
Actual operands permitted DB, PB, SB, FB1
1
As actual operands, function blocks cannot have block parameters.
Example: Function Block Call
STL :JU NAME :DO D5 : DW2 D6 DW1 Q4 MOT5 : : : : : :BE FB 35 DB 5 DW 2 DB 6 DW 1 QW 4 FB 36 :DO :L :DO :T :T :DO :BE =D5 =DW2 =D6 =DW1 =Q4 =MOT5 :C :L :C :T :T :JU :BE DB DW DB DW QW FB 5 2 6 1 4 36
Program in Function Block FB35
Executed Program
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8.3
System Operations, for CPU 103 and Higher
System operations and supplementary operations have the following limitations: * * You can program them only in function blocks. You can program them only in the STL method of representation.
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Since system operations access system data, only users with system knowledge should use them. If you want to program system operations, you must select "SYS: OPS. Y" in the programmer presets menu.
8.3.1
Set Operations
Like the supplementary bit operations, these set operations can change individual bits. Table 8-26 provides an overview of the set operations. Table 8-26. Overview of Set Operations Operation SU RU ID RS Operand Meaning Set bit unconditionally A specific bit is set to "1" in the system data area. Reset bit unconditionally A specific bit is set to "0" in the system data area. Parameter 0.0 to 255.15
Processing Set Operations Execution of set operations does not depend on the RLO.
8.3.2
Load and Transfer Operations
Use these load and transfer operations to address the entire program memory of the programmable controller. They are used mainly for data exchange between the accumulator and memory locations that cannot be addressed by operands. Table 8-27 provides an overview of the load and transfer operations.
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Table 8-27. Overview of Load and Transfer Operations
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Operation LIR
Operand
Meaning Load the register indirectly The contents of a memory word are loaded into the specified register (ACCU 1, 2). The address is in ACCU 1. Transfer the register indirectly The contents of the indicated register are transferred to a memory location. The address is in ACCU 1. Parameter 0 (for ACCU 1), 2 (for ACCU 2)
TIR
TNB
Transfer a data field (byte-by-byte) A memory area is transferred in the program memory as a field. End address destination area: ACCU 1 End address source area: ACCU 2 Transfer A word is transferred to the system data area. ID RS Parameter 0 to 255
T
Loading and Transferring Register Contents Both accumulators can be addressed as registers. Each register is 16 bits wide. Since the "LIR" and "TIR" operations transmit data by words, the registers are addressed in pairs. Loading and transferring register contents are independent of the RLO. The processor goes to ACCU 1 to get the address of the memory location referenced during data exchange. Consequently, make sure that the desired address is stored in ACCU 1 before this system operation is processed. STL
. . L LIR KH 0 6100
Explanation
Load the address 6100H into ACCU 1. Load the information from the memory location with the address 6100H into ACCU 1.
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Processing a Field Transfer A field transfer is processed independently of the RLO. The parameter indicates the length of the data field (in bytes) that is to be transferred. The field can be up to 255 bytes long. The address of the source field is in ACCU 2. The address of the destination field is in ACCU 1. The higher address of each field must be specified because a field transfer takes place by decrementing. The bytes in the destination field are overwritten during the transfer. Example Transfer a 12-byte data field from address F0A2H to address EE90H. Representation
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EE85 Destination EE90 . . . F097 Source F0A2 . . .
TNB
STL
:L :L KH KH F0A2 EE90
Explanation Load the end address of the source field into ACCU 1. Load the end adress of the destination field into ACCU 1. The source address is shifted to ACCU 2. Transfer the data field to the destination field.
:TNB
12
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Transferring to the System Data Area
www..com Example: Set the scan monitoring time to 100 ms after each mode change from "STOP" to "RUN". You can program this time in multiples of 10 ms in system data word 96. The following function block can be called from OB21, for example.
STL
FB 11 L T BE KF RS +10 96
Explanation Block number and type Load ACCU 1 with the factor 10. Transfer this value to system data word 96.
!
Caution
The TIR, TRS and TNB operations are memory-changing operations with which you can access the user memory and the system data area. These accesses are not monitored by the operating system. Improper use of the operations can lead to changes in the program and to a programmable controller crash.
8.3.3
Arithmetic Operations
An arithmetic operation changes the contents of ACCU 1 by a specified value. The parameter represents this value as a positive or negative decimal number. Table 8-28 shows the essential features of the "ADD" operation. An example follows the table. Table 8-28. Overview of the "ADD" Operation Operation ADD ID BF KF Operand Meaning Add a constant Add byte or word constants. Parameter -128 to -32768 to +127 +32767
Processing An arithmetic operation is executed independently of the RLO. It does not affect the RLO or the condition codes. You can subtract by entering a negative parameter. Even if the result cannot be represented by 16 bits, no carry is made to ACCU 2, i.e., the contents of ACCU 2 are not changed.
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Example
L ADD T ADD T
STL
KH BF FW KF FW 1020 -33 28 256 30
Explanation The constant 1020H is loaded into ACCU 1. The constant -330D is added to the ACCU contents. The new ACCU contents (0FFFH) are stored in flag word FW28. The constant 2560D is added to the last result. The new ACCU contents (10FFH) are stored in flag word FW30.
Decrement the constant 1020H by 33 and store the result in flag word FW28. Afterwards add the constant 256 to the result and store the sum in flag word FW30.
8.3.4
Other Operations
Table 8-29 provides an overview of the remaining system operations. Table 8-29. The "TAK" and "STS" Operations Operation TAK Operand Meaning Swap accumulator contents Swap the contents of ACCU 1 and ACCU 2 regardless of the RLO. The RLO and the condition codes are not affected. Stop immediately The PLC goes into the STOP mode regardless of the RLO.
STS
Processing the "STS" Operation When the "STS" operation is executed, the programmable controller goes into the STOP mode immediately. Program processing is terminated at this point. The STOP state can only be cancelled manually (with the mode selector) or with the programmer function "PC START".
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8.4
Condition Code Generation
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The processor of the programmable controller has the following three condition codes: * CC 0 * CC 1 * OV (overflow) The following operations affect the condition codes. * Comparison operations * Arithmetic operations * Shift operations * Some conversion operations The state of the condition codes represents a condition for the various jump operations. Condition Code Generation for Comparison Operations Execution of comparison operations sets condition codes CC 0 and CC 1 (see Table 8-30). The overflow condition code is not affected. Comparison operations do affect the RLO. When a comparison is satisfied, the RLO is 1. This allows you to use the "JC" conditional jump operation after a comparison operation. Table 8-30. Condition Code Settings for Comparison Operations Contents of ACCU 2 as Compared to Contents of ACCU 1 Equal to Less than Greater than Condition Codes CC 1 0 0 1 CC 0 0 1 0 OV JZ JN, JM JN, JP Possible Jump Operations
Condition Code Generation for Arithmetic Operations Execution of arithmetic operations sets all condition codes according to the result of the arithmetic operation (see Table 8-31). Table 8-31. Condition Code Settings for Fixed-Point Arithmetic Operations Result after Arithmetic Operation is Executed < - 32768 - 32768 to - 1 0 +1 to +32767 > +32767 (-) 65536* Condition Codes CC 1 1 0 0 1 0 0 CC 0 0 1 0 0 1 0 OV 1 0 0 0 1 1 JN, JP, JO JN, JM JZ JN, JP JN, JM, JO JZ, JO Possible Jump Operations
* This number is the result of the calculation -32768 - 32768
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Condition Code Generation for Digital Logic Operations
www..com Digital logic operations set CC 0 and CC 1. They do not affect the overflow condition code (see Table 8-32). The setting depends on the contents of the ACCU after the operation has been processed.
Table 8-32. Condition Code Settings for Digital Logic Operations Contents of the ACCU Zero (KH = 0000) Not zero Condition Codes CC 1 0 1 CC 0 0 0 OV Possible Jump Operations JZ JN, JP
Condition Code Generation for Shift Operations Execution of shift operations sets CC 0 and CC 1. It does not affect the overflow condition code (see Table 8-33). Code setting depends on the state of the last bit shifted out. Table 8-33. Condition Code Settings for Shift Operations Value of the Last Bit Shifted Out "0" "1" Condition Codes CC 1 0 1 CC 0 0 0 OV JZ JN, JP Possible Jump Operations
Condition Code Generation for Conversion Operations The formation of the two's complement (CSW) sets all condition codes (see Table 8-34). The state of the condition codes is based on the result of the conversion function. Table 8-34. Condition Code Settings for Conversion Operations Result after Arithmetic Operation is Executed - 32768 * - 32767 to - 1 0 +1 to +32767 Condition Codes CC 1 0 0 0 1 CC 0 1 1 0 0 OV 1 0 0 0 Possible Jump Operations JN, JM, JO JN, JM JZ JN, JP
* This number is the result of the conversion of KH = 8000.
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8.5
Sample Programs
Sections 8.5.1 through 8.5.3 provide a few sample programs that you can enter and test in all three methods of representation on a programmer.
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8.5.1
Momentary-Contact Relay/Edge Evaluation
Example Circuit Diagram
On each leading edge of the signal at input I 0.0, the AND condition "A I 0.0 and AN F 64.0" is satisfied; the RLO is "1". This sets flags F 64.0 and F 2.0 ("edge flags"). In the next processing cycle, the AND condition "A I 0.0 and AN F 64.0" is not satisfied since flag F 64.0 has already been set. Flag 2.0 is reset. Therefore, flag F 2.0 is "1" for only one program run. When input I 0.0 is switched off, flag F 64.0 is reset. This resetting prepares the way for evaluation of the next leading edge of the signal at input I 0.0.
I 0.0 F 64.0
I 0.0
F 2.0
F 2.0
STL
A AN = S AN R NOP I F F F I F 0 0.0 64.0 2.0 64.0 0.0 64.0 I 0.0 &
CSF
LAD
I 0.0 F 2.0 F 64.0 S I 0.0
F 64.0
F 2.0 (#)
F 64.0 S
F 64.0
(#)
R I 0.0 R Q
Q
8.5.2
Binary Scaler/Binary Divider
This section describes how to program a binary scaler. Example: The binary scaler (output Q 1.0) changes its state each time I 0.0 changes its signal state from "0" to "1" (leading edge). Therefore, half the input frequency appears at the output of the flip-flop.
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Timing Diagram
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Circuit Diagram
Signal states
I 0.0 1 0 1 0 Q 1.0 I 0.0 Q 1.0
Time STL
I 0.0 & I 0.0 F 1.0 F 1.0 F 1.1 F 1.1 S S I 0.0 R Q I 0.0 RQ F 1.1 & F 1.1 Q 1.0 F Q F Q 1.1 1.0 2.0 1.0 2.0 1.0 F 1.1 Q 1.0 F 2.0 F 1.1 & Q 1.0 S F 2.0 R Q F 2.0 RQ Q 1.0 F 2.0 F 2.0 Q 1.0 F 2.0 F 1.0 F 1.1 F 1.0 F 1.1
CSF
LAD
A AN = *** A S
I F F F F
0.0 1.0 1.1 1.1 1.0 0.0 1.0
()
AN I R F NOP 0 *** A A = *** A AN AN S F Q F
1.1 1.0 2.0
()
Q 1.0 S
A F R Q NOP 0 ***
Note
Output in CSF or LAD is possible only if you enter the segment boundaries "***" when programming in STL.
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8.5.3
Clock/Clock-Pulse Generator
This subsection describes how to program a clock-pulse generator. Example: A clock-pulse generator can be implemented using a self-clocking timer that is followed in the circuit by a binary scaler. Flag F 2.0 restarts timer T 7 each time it runs down, i.e., flag F 2.0 is "1" for one cycle each time the timer runs down. The pulses of flag F 2.0 applied to the binary scaler result in a pulse train with pulse duty factor 1:1 at output Q 1.0. The period of this pulse train is twice as long as the time value of the self-clocking timer. Timing Diagram Signal states 1 0 1 0 Q 1.0
Q 1.0
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Circuit Diagram
F 2.0
G
F 2.0 F 3.0
Time T T
STL
AN L SD NOP NOP NOP A = *** A AN S A A R NOP *** AN A S AN AN R NOP F KT T 0 0 0 T F F F Q F F Q 0 F Q F F Q F 0 2.0 010.1 7 F 2.0 KT 10.1 7 2.0
CSF
LAD
T7 T TV BI DE R
Q
F 2.0 0 KT 10.1 F 2.0 R T TV
T7 0 BI DE F 2.0 Q Q 1.0 S
()
Q 1.0 2.0 3.0 1.0 2.0 3.0 1.0 F 2.0 F 3.0 F 2.0 F 3.0 F 3.0 F 2.0 2.0 1.0 3.0 2.0 1.0 3.0 Q 1.0 F 2.0 Q 1.0 & & S F 2.0 Q 1.0 F 3.0 S RQ F 2.0 Q 1.0 RQ & & S F 2.0 F 3.0
RQ
F 2.0
F 3.0 RQ
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9
Integrated Blocks and Their Functions Assigning Internal Functions to DB1, for CPU 103 Version 8MA03 and Higher . . . . . . . . . . . . . . . . . . . . Configuration and Default Settings for DB1 . . . . . . . . . . . . . . . . . . Setting the Address for the Parameter Error Code in DB1 . . . . . . . . Assigning Parameters in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Rules for Setting Parameters in DB1 . . . . . . . . . . . . . . . . . . . . . . . How to Recognize and Correct Parameter Errors . . . . . . . . . . . . . . Transferring DB1 Parameters to the Programmable Controller . . . . . Reference Guide for Setting Parameters in DB1 . . . . . . . . . . . . . . . Defining System Characteristics in DB1 .................... Integrated Function Blocks, for CPU 102 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . Code Converter : B4 - FB240 .......................... Code Converter : 16 - FB241 .......................... Multiplier : 16 - FB242 ............................... Divider : 16 - FB243 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Value Conditioning Modules FB250 and FB251 . . . . . . . . . . Integrated Organization Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Time Triggering OB31, for CPU 103 and Higher . . . . . . . . . . . Battery Failure OB34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OB251 PID Algorithm, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . .
9.1 9.1.1 9.1.2 9.1.3 9.1.4 9.1.5 9.1.6 9.1.7 9.1.8 9.2 9.2.1 9.2.2 9.2.3 9.2.4 9.2.5 9.3 9.3.1 9.3.2 9.3.3
9 9 9 9 9 9 9 9 9
-1 -1 -2 -4 -4 -6 -9 - 10 - 11
9 9 9 9 9 9 9 9 9 9
-
11 12 12 13 13 14
- 14 - 14 - 14 - 15
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9-1 9-2 9-3 9-4 9-5 9-6 9-7 9-8 9-9
DB1 with Default Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inputting the Address for the Parameter Error Code . . . . . . . . . . . . . . . . . . Parameter Error Codes and Their Meaning . . . . . . . . . . . . . . . . . . . . . . . . Erroneous Parameter Assignment in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . Inputting the System Data Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calling Up the OB251 PID Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram of the PID Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Principle of Interval Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Process Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 9 9 9 9 9 9 9 9
-
1 3 7 8 11 15 16 21 22
Tables 9-1 9-2 9-3 9-4 9-5 9-6 9-7 9-8 Parameter Blocks and Their IDs ............................... Call and Parameter Assignments of FB240 . . . . . . . . . . . . . . . . . . . . . . . . Call and Parameter Assignments of FB241 . . . . . . . . . . . . . . . . . . . . . . . . Call and Parameter Assignments of FB242 . . . . . . . . . . . . . . . . . . . . . . . . Call and Parameter Assignments of FB243 . . . . . . . . . . . . . . . . . . . . . . . . Legend for the Block Diagram of the PID Controller . . . . . . . . . . . . . . . . . . Description of the Control Bits in Control Word "STEU" ............... Structure of the Controller DB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 9 9 9 9 9 9 2 12 12 13 13 16 17 19
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9
9.1
Integrated Blocks and Their Functions
Assigning Internal Functions to DB1, for CPU 103 Version 8MA03 and Higher
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You can program the following CPU functions: * * * * * Using the integral real-time clock (see chapter 12) Exchanging data via SINEC L1 (see chapter 13) Changing polling interval for time-controlled program processing (OB 13) (see chapter 7) Assigning system parameters (see chapter 9) Setting the address for the parameter error code (see chapter 9)
To assign parameters to these functions, you must configure data block 1 (DB1).
9.1.1
Configuration and Default Settings for DB1
To make it easier for you to assign parameters, data block 1 is already integrated in the CPU with default parameters. After performing an overall reset, you can load the default DB1 from the programmable controller into your programmer and display it on the screen (see Figure 9-1). The character string "DB1" must remain before the parameter blocks and be followed by at least one filler (such as a blank space or a comma).
0: 12: 24: 36: 48: 60: 72: 84: 96: 108: 120: 132: KS KS KS KS KS KS KS KS KS KS KS KS = 'DB1 SL1: SLN 1 SF '; = 'DB2 DW0 EF DB3 DW0 '; = ' KBE MB100 KBS MB101 '; = 'PGN 1 ; #CLP: CF 0 '; = 'CLK DB5 DW0 STW '; = 'MW102 STP Y SAV Y '; = 'OHE N SET 4 01.04.92 '; = '12:10:00 TIS 4 '; = '01.04. 13:00:00 OHS '; = '000000:00:00 # ; SDP: WD'; = ' 500 ; TFB: OB13 100 '; = ' ; END ';
Figure 9-1. DB1 with Default Parameters
This preset DB1 has one parameter block for each function. Each parameter block begins with a block ID (shown in Figure 9-1 in the shaded background). The block ID is followed by a colon. The individual parameters for each function are contained in these parameter blocks. Each parameter block begins with a block ID followed by a colon. This colon must be followed by at least one filler (such as a blank space or a comma). A semicolon must be at the end of each parameter block with at least one filler between the semicolon and the next block ID.
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Integrated Blocks and Their Functions
S5-100U
The parameter blocks listed in Table 9-1 are used for the S5-100U.
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Table 9-1. Parameter Blocks and Their IDs Explanation/Default Setting Start ID
Block ID
'DB1 '; 'SL1: ';
SINEC L1: Parameter block for SINEC L1 configuration / (see chapter 13) Clock-Parameters: Parameter block for integral time clock/ clock function not activated (see chapter 12)
System-Dependent Parameter: Parameter block for system specifications / default setting for cycle time monitoring is 500 ms (see section 9.1.8)
'CLP: ':
'SDP: ';
'TFB: ';
Timer Function Blocks: Parameter block for time-controlled program processing: OB13 is called up every 100 ms. (see chapter 7) Error ReTurn: Address for parameter error code / no default setting (see section 9.1.2) END block ID for DB1
'ERT: ';
'END ';
The sequence of the parameters in DB1 is not fixed. A semicolon must be at the end of each parameter block with at least one filler between the semicolon and the next block ID. The structure of the following parameter blocks is described here in detail. * * ERT: SDP: (Error code position) (System specifications)
The parameter blocks that are not discussed here are explained in the chapters that describe their functions.
9.1.2
Setting the Address for the Parameter Error Code in DB1
For the following reasons, we recommend that you use this example when you start setting your parameters: * Parameter block "ERT:" is the only block with no default parameters in DB1. You must therefore enter all the parameters. We will explain the rules for assigning parameters step by step, so that you can learn the rules quickly. The correctly input "ERT:" parameter block makes it easy for you to correct parameter setting errors; therefore, you should complete this block in DB1 before you change or add other parameters. The error parameter block is only important during the start-up phase. You should erase it during "normal" operation because it takes up a lot of memory space.
*
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To help find parameter errors more easily and to help correct them, you can ask the programmable controller to output error messages in a coded form. All you have to do is to tell the programmable www..com controller where it should store the error code. Make this input in parameter block "ERT:" of DB1. The error code can be stored in either of the following locations: * * In flagwords In data words in a data block
How to Proceed: 1. Perform an overall reset on the programmable controller. 2. Display DB1 on the programmer. 3. Position the cursor on the E of the "END" ID at the end of the default DB1. 4. Enter the characters that are highlighted in Figure 9-2. DB1
0: 12: 24: 36: 48: 60: 72: 84: 96: 108: 120: 132: KS KS KS KS KS KS KS KS KS KS KS KS = 'DB1 SL1: SLN 1 = 'DB2 DW0 EF DB3 = = = = SF '; DW0 '; '; '; '; ';
Explanation
' KBE MB100 KBS MB101 'PGN 1 ; #CLP: CF 0 'CLK DB5 DW0 STW 'MW102 STP Y SAV Y
= 'OHE N SET 4 01.04.92 '; = '12:10:00 TIS 4 '; = '01.04. 13:00:00 OHS '; = '000000:00:00 # ; SDP: WD'; = ' 500 ; TFB: OB13 100 '; = ' ; ERT: ERR MW1 ; END ';
The parameter error code is stored in flag word MW1 after start-up.
Figure 9-2. Inputting the Address for the Parameter Error Code 5. Use the following check list to make sure your entries are correct. - Is the block ID "ERT:" terminated by a colon? ............................ - Is at least 1 filler (a blank space in Figure 9-2) added after the colon? . . . . . . . . . . . . - Is the parameter name (ERR) entered correctly? . . . . . . . . . . . . . . . . . . . . . . . . . . . - Does at least 1 filler (a blank space) follow the parameter name? . . . . . . . . . . . . . . . - Is the argument (MW1) entered correctly? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - Does at least 1 filler (a blank space) follow the argument? . . . . . . . . . . . . . . . . . . . . - Does a semicolon (;) indicate the block end? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - Does DB1 end with the end ID "END" followed by a space? .................. 6. Transfer the changed DB1 to the programmable controller. 7. Switch the programmable controller from STOP to RUN. - The programmable controller accepts the changed DB1. If you did not store the parameter block "ERT:" in DB1, you can localize the error in the ISTACK if there was an incorrect parameter setting. However, you will not know what type of error is present. The same applies if you made an error when you input the parameter block "ERT:"
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9.1.3 Assigning Parameters in DB1
As discussed in section 9.1.2, you use the following steps to change or expand the preset values of www..com DB1: 1. Display the default DB1, with its parameter block "ERT:" on the programmer. 2. Position the cursor on the desired parameter block. 3. Change or expand the parameters. (for an explanation and possible parameter values see section 9.1.7) 4. Transfer the changed DB1 to the programmable controller. 5. Switch the programmable controller from STOP to RUN. Changed DB1 parameters are accepted.
Note
If the CPU recognizes an error in DB1, then it remains in the STOP mode (red LED lights up) even after a switch from STOP to RUN.
9.1.4
Rules for Setting Parameters in DB1
DB1 consists of the following: A start ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . One or more parameter blocks . . . . . . . . . . . . . . . . . . . . DB1 e.g.: CLP:STW FW102
A parameter block consists of: A block ID . . . . . . . . . . . . . . . . . . . . . . . . . One or more parameters .............. e.g.: e.g.: CLP: STW FW 102
A parameter consists of: A parameter name . . . . . . . . . . . One or more arguments . . . . . . . e.g.: e.g.: STW FW 102
A block end ID . . . . . . . . . . . . . . . . . . . . . . . . . A block end symbol ..............................
: ; (Semicolon) : END
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In the following section are the rules for changing or expanding entire parameter blocks. Follow these steps or the CPU will not understand what you have entered. 1. Enter the start ID "DB1", followed by a filler. - DB1 must begin with the start ID "DB1". Do not separate the three characters from each other. After the start ID, there must be at least one filler. Use a blank space or a comma as a filler. 2. Enter the block ID for the parameter block, followed by a filler. - The start ID and filler are followed by the block ID for the parameter block. The sequence of the parameter blocks in DB1 is random. The block ID identifies a block and its corresponding parameter. The block ID "SL1", for example, stands for the SINEC-L1 parameter. You must enter a colon immediately after the block ID. If the colon is missing, then the CPU skips this block and displays an error message. You must add at least one filler after the colon of a block ID. 3. Enter the parameter name, followed by a filler. - The parameter name comes next. Parameter names are names for single parameters within a parameter block. Within a block, the first four characters of a parameter name must be different from each other. After the parameter name, you must add at least one filler. 4. Enter the argument that is attached to the parameter name, followed by a filler. - At least one argument is attached to each parameter name. An argument is either a number or a STEP 5 operand that you must enter. If several arguments belong to a parameter name, then every argument must be followed by at least one filler (even the last one). 5. Enter a semicolon (; ) to identify the block end, followed by a filler. - After the semicolon, you must enter at least one filler. Leaving out the semicolon leads to misinterpretation in the CPU. 6. Enter additional parameter blocks after the semicolon. - (Use steps 2 through 5 to create additional parameter blocks.) 7. Enter the end ID "END". - This identifies the end of DB1. If you forget to enter an end ID, this leads to errors in the CPU.
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Integrated Blocks and Their Functions
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The preceding steps present the minimal requirements for setting the parameters. Beyond that, there are additional rules that make it easier for you to assign parameters. For example: * *
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You have the ability to add comments. You can expand the German mnemonics used as parameter names by using plain English text.
Comments can be added anywhere a filler is allowed. The comment symbol is the pound (#) sign. The comment symbol must be placed at the beginning and at the end of your comment. The text between two comment symbols may not contain an additional #. Example: #Comment# . At least one filler must follow the comment. If you wish to change the default settings in parameter blocks SL1: or CLP:, you must first of all overwrite the two comment characters (#) with blanks. If you fail to do this, the changes are ignored. If you wish to retain the default settings for one of the two parameter blocks, you must place it between comment characters (overwrite blanks with "#"). In order to make it easier to read parameter names, you can add as many characters as you wish if you add an underscore (_) after the abbreviated parameter name. Example: SF becomes SF_SENDMAILBOX. At the end of the input, you must add at least one filler. There is a rule of thumb that will help you check DB1. You should include at least one filler in the following instances: * * After the start ID Before and after the block ID, parameter name, argument, and semicolon
9.1.5
How to Recognize and Correct Parameter Errors
If an error occurs while assigning parameters and the programmable controller does not go to the "RUN" mode, you have two possibilities for recognizing errors: * * By using a parameter error code By using the analysis function "ISTACK"
Both possibilities are described below. Scanning the Parameter Error Code If you have entered a start address for the parameter error code in parameter block "ERT:" of DB1 (see section 9.1.2), then you can retrieve the cause of the error, and the error location information at this address. The entire error code occupies 10 data words or 20 flag bytes. In the following examples and tables, we assume that the error code is stored in a data block starting with data word 0. The error code occupies DW0 through DW9. In the "Flag" operand area, this corresponds to FW0 through FW19.
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Example:
You entered the start address DB3 DW0 in parameter block "ERT:". The parameters set in DB1 have already been transferred to the programmable controller. Then you continue to set parameters in DB1. While attempting to transfer the changed DB1 www..com parameters to the programmable controller, you find out that the programmable controller remains in the STOP mode. You suspect that the reason for this is a parameter error. To find the error, display DB3 on the programmer. The entire contents of DB3 appear on the screen. DW0 through DW9 contain the code for the parameter error. In the following figure, you see how your screen could look. Below the screen display is a complete list of parameter error codes and their meanings.
0: 1: 2: 3: 4: 5: 6: 7: 8: 9: 10:
KH= KH= KH= KH= KH= KH= KH= KH= KH= KH=
0603 0000 0000 0000 0000 0000 0000 0000 0000 0000
Screen display with parameter error codes
CO DE
Cause of the error (which error occurred?) No error Start or end ID is missing Comment not closed off correctly Before END; semicolon missing in front of END Syntax error - block ID Syntax error - parameter Syntax error - argument Range exceeded in an argument Parameter combination is not allowed Not defined Not defined DB is not present Not enough space in DB Error inputting weekday Error in the date Error in inputting time Irregular time format in parameter blocks (24h/12h mode) DL DR Location of error (in which parameter block did the error occur?) Error cannot be assigned to any block SL1: CLP: SINEC L1 Clock parameter
00 01 02 03 04 05 06
00 01 02 03 06
09 07 11 08 09 10 11 12 13 14 15
TFB: SDP:
Timer function block System data parameter
99 F0 . . . FF
ERT:
Error return
Error can not be assigned to any block
Figure 9-3. Parameter Error Codes and Their Meaning
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Locating Parameter Errors in "ISTACK" If the CPU recognizes an error in DB1 in the initial start-up, then the CPU remains in the STOP www..com mode and stores a message in "ISTACK" describing where the error happened. The "ISTACK" contains the absolute error address as well as the relative error address. The STEP Address Counter (SAC) in the ISTACK points either to the address that contains the incorrect input or in front of the address that contains the incorrect input. These are byte addresses. Example: Your inputs into DB1 are as follows. The position shaded contains an error.
0: 12: 24: 36: 48: 60: 72: 84: 96: 108: 120: 132: KS KS KS KS KS KS KS KS KS KS KS KS = 'DB1 SL1: SLN 40 = 'DB2 DW0 EF DB3 SF DW0 '; '; '; '; ';
= ' KBE MB100 KBS MB101 = 'PGN 1 ; #CLP: CF 0 = 'CLK DB5 DW0 STW
The decimal numbers in front of each input line represent the word address for the first character that can be entered for that respective line. Each word consists of two characters (2 bytes).
= 'MW102 STP Y SAV Y '; = 'OHE N SET 4 01.04.92 '; = '12:10:00 TIS 4 '; = '01.04. 13:00:00 OHS '; = '000000:00:00 # ; SDP: WD'; = ' 500 ; TFB: OB13 100 '; = ' ; END ';
Figure 9-4. Erroneous Parameter Assignment in DB1 The error causes ISTACK to display the following addresses. * * The absolute (error) address: The relative (error) address: 82F2H 000CH (absolute SAC) (relative SAC)
So that you can locate the error in DB1 exactly, you must convert the relative byte address that is displayed in hexadecimal format into a decimal word address. Decimal format is required because the programmer displays a DB in words.
000CH
=
12D Decimal byte address
12D
:
2D =
6D Decimal word address
Hexadecimal byte address
The information displayed in the chart above shows that the error occurred after address 0 and before address 12. In Figure 9-4, argument 40 occupies address 6; the "40" is an incorrect entry. The error is due to a range violation.
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9.1.6
Transferring DB1 Parameters to the Programmable Controller
Unlike other data blocks, DB1 is processed only one time. This occurs when a cold restart is www..com performed on the programmable controller. This was done so that DB1 could handle certain special functions. One such special function is the assignment of parameters in the programmable controller with the help of DB1. Setting parameters means that you enter parameters in DB1 for those internal functions that your programmable controller should work with. The programmable controller's operating system accepts these inputs into DB1 only when there is a cold restart. You must perform a cold restart anytime you make changes to DB1. You can perform a cold restart by switching from Power OFF to Power ON or from STOP to RUN. The programmable controller accepts the parameters from DB1 and stores them in the system data area.
Note
The CPU remains in the STOP mode if a parameter assignment error is found during start-up. The red LED lights up on the operator panel and ISTACK displays a DB1 addressing error.
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9.1.7
Reference Guide for Setting Parameters in DB1
Argument Meaning SINEC L1 (SL1) Slave number Location of Send Mailbox Location of Receive Mailbox Location of Coordination Byte "Receive" Location of Coordination Byte "Send" Programmer bus number y=0 to 255 System-Dependent-Parameter (SDP) p Block ID: TFB:
OB13
www..com Parameter
Block ID: SL1:
SLN SF EF KBE KBS PGN
p DBx DWy DBxDWy MBy MBy p x=2 to 255 Block ID:SDP:
p=1 to 3
WD
Number of timers being processed(Watch-Dog-Timer) Timer-Funktions-Baustein (TFB)
p=1 to 2550
p
Intervals (ms) at which OB13 is called up and is processed ClockParameters (CP) Inputting the correction factor (Correction Factor) Location of the clock data (CLocK Data) Location of the status word (STatus Word) Updating the clock during STOP (SToP) Saving the clock time after the last change from RUN to STOP or Power OFF (SAVe) Enabling the operating hours counter (Operation Hour counter Enable) Setting the clock time and date Setting the prompting time (TImer Set) Setting the operating hours counter (Operation Hour counter Set)
p=- 400 to 400 v=0 to 126 x=2 to 255 y=0 to 255 z=0 to 254 j/J=ja(yes) y/Y=yes n/N=no
p=0 to 655350 (State in 10-ms steps) Block ID: CLP:
CF CLK STW STP SAV OHE SET TIS OHS
p DBxDWy,MWz,EWv or AWv DBxDWy,MWz,EWv or AWv J/Y/N J/Y/N J/Y/N wd dd.mm.jj hh:mn:ss1 AM/PM2 wd dd.mm. hh:mn:ss1 AM/PM2 hhhhhh:mn:ss1
wd dd mm yy hh mn ss hhhhhh
1 2
=1 to 7 (weekday = Sun..Sat) =01 to 31 (day) =01 to 12 (month) =0 to 99 (year) =00 to 23 (hours) =00 to 59 (minutes) =00 to 59 (seconds) =0 to 999999 (hours)
If an argument such as seconds, for example, is not to be entered, input XX. The clock continues to run with the updated data. The TIS parameter block does not acknowledge this argument.. If you input AM or PM after the clock time, the clock runs in the 12-hour mode. If you omit this argument, the clock runs in the 24-hour mode. You must use the same time mode in the SET and TIS parameter blocks.
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9.1.8
Defining System Characteristics in DB1
Each cyclical program processing triggers the beginning of a monitoring period. If the cycle trigger www..com is not retriggered during the monitoring period, the programmable controller is forced into the STOP mode and disables the output modules. The default for the monitoring time is set to 500 ms in DB1. You can increase the cycle time monitoring in the parameter block SDP. Example: You wish to increase the monitoring time to 700 ms since your user program is very large. How to Proceed: 1. Display DB1 on the programmer. 2. Change the parameter block "SDP" as shown in Figure 9.5. Position the cursor on the arguments for the parameter Overwrite the arguments
3. Transfer the changed DB1 to the programmable controller. 4. Switch the programmable controller from STOP to RUN. The programmable controller now accepts the changed parameters.
0: 12: 24: 36: 48: 60: 72: 84: 96: 108: 120: 132: KS KS KS KS KS KS KS KS KS KS KS KS = 'DB1 SL1: SLN 1 = 'DB2 DW0 EF DB3 SF '; DW0 '; '; '; ';
= ' KBE MB100 KBS MB101 = 'PGN 1 ; #CLP: CF 0 = 'CLK DB5 DW0 STW
= 'MW102 STP Y SAV Y '; = 'OHE N SET 4 01.04.92 '; = '12:10:00 TIS 4 '; = '01.04. 13:00:00 OHS '; = '000000:00:00 # ; SDP: WD'; = ' 700 ; TFB: OB13 100 '; = ' ; END ';
Figure 9.5. Inputting the System Data Parameter You can also set the cycle monitoring time in OB31 (see section 9.3.1).
9.2
Integrated Function Blocks, for CPU 102 Version 8MA02 and Higher
Some standard function blocks are integrated in your S5-100U. You can call up these blocks in your control program with the commands "JU FB" or "JC FB x". The character "x" stands for the block number. Overview:
Block No. Block name Call length (in words) Processing time (in ms) FB240 FB241 COD:B4 COD:16 5 6 FB242 MUL:16 7 FB243 DIV:16 10 FB250 RLG:AI 10 FB251 RLG:AQ 9
< 0.6
< 1.0
< 0.9
< 2.1
2.4
4.8
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9.2.1 Code Converter : B4 - FB240 Use function block FB240 to convert a number in BCD (4 tetrads) with sign to a fixed-point binary www..com number (16 bits). You must change a two-tetrad number to a four-tetrad number before you convert it. * If a tetrad is not in the BCD defined range, then FB240 displays the value "0". An error bit message does not follow. Table 9-2. Call and Parameter Assignments of FB240 Parameter BCD SBCD DUAL Meaning BCD number Sign of the BCD number Fixed-point number (KF) Type IW I BI QW Assignment 0 to 9999 "1" for "-" "0" for "+" 16 bits "0" or "1" STL
: JU FB240 NAME BCD SBCD DUAL : COD:B4 : : :
9.2.2
Code Converter : 16
- FB241-
Use function block FB 241 to convert a fixed-point binary number (16 bits) to a number in BCD code with additional consideration of the sign. An eight-bit binary number must be transferred to a 16-bit word before conversion. Table 9-3. Call and Parameter Assignments of FB241 Parameter DUAL SBCD BCD2 BCD1 Meaning Binary number Sign of the BCD number BCD number 4th and 5th tetrads BCD number tetrads 0 to 3 Type
I
Assignment -32768 to+32767 "1" for "-" "0" for "+" 2 tetrads 4 tetrads
NAME DUAL SBCD BCD2 BCD1
STL
: JU FB241 : COD:16 : : : :
W
I BI Q BY QW
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9.2.3
Multiplier : 16 - FB242 -
Use function block FB 242 to multiply one fixed-point binary number (16 bits) by another. The prowww..com duct is represented by two fixed-point binary numbers (16 bits each). The result is also scanned for zero. An eight-bit number must be transferred to a 16-bit word prior to multiplication. Table 9-4. Call and Parameter Assignments of FB242 Parameter Z1 Z2 Z3=0 Z32 Z31 Meaning Multiplier Multiplicand Scan for zero Product high-word Product low-word Type
I I
Assignment -32768 to+32767 -32768 to+32767 "0" : product is zero 16 Bits 16 Bits
NAME Z1 Z2 Z3=0 Z32 Z31
STL
: JU FB242 : MUL:16 : : : : :
W W
Q BI QW QW
9.2.4
Divider : 16
- FB243 -
Use function block FB 243 to divide one fixed-point binary number (16 bits) by another. The result (quotient and remainder) is represented by two fixed-point binary numbers (16 bits each). The divisor and the result are also scanned for zero. An eight-bit number must be transferred to a 16-bit word prior to division. Table 9-5. Call and Parameter Assignments of FB243 Parameter Z1 Z2 OV FEH Z3=0 Z4=0 Z3 Z4 Scan for zero Scan for zero Quotient Remainder Explanation Dividend Divisor Overflow bit Type IW IW Q BI Q BI Q BI Q BI QW QW Assignment -32768 to+32767 -32768 to+32767 "1" : overflow "1" : division by zero "0": quotient is zero "0": remainder is zero 16 bits 16 bits
NAME Z1 Z2 OV FEH Z3=0 Z4=0 Z3 Z4
STL
: JU FB243 : DIV:16 : : : : : : : :
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9.2.5
Analog Value Conditioning Modules FB250 and FB251
Function block FB250 reads in an analog value from an analog input module and outputs a value XA www..com in the scale range specified by the user. Function block FB251 allows you to output analog values to analog output modules. Values from the range between the "UGR" (lower limit) parameters and the "OGR" (upper limit) parameters are converted to the nominal range of the selected module. You will find more information on the following topics in section 11.6: * * * Calling up and setting parameters in FB250. Calling up and setting parameters in FB251. An example of analog value processing with FB250 and FB251.
9.3
Integrated Organization Blocks
9.3.1 Scan Time Triggering OB31, for CPU 103 and Higher
A scan time monitor monitors the program scan time. If program scanning takes longer than the specified scan monitoring time, the CPU goes into the STOP mode. This can happen when one of the following errors occurs: * * The control program is too long. The program enters a continuous loop.
You can retrigger the scan time monitor at any point in the control program by calling up OB31. Calling up this block restarts the scan time monitor. Call up OB31 * * Prerequisite: SYSTEM COMMANDS "YES" has been specified on the programmer. JU OB31 can be programmed at any point in the control program.
Programming One statement in OB31 is sufficient, e.g. "BE" to make the retriggering effective. Other statements are also possible.
9.3.2 Battery Failure OB34
The CPU constantly checks the status of the battery in the power supply. If a battery fails (BAU), OB34 is processed before every cycle until the battery is replaced. You can program the reaction of the programmable controller to battery failure in OB34. If OB34 is not programmed, there is no reaction.
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9.3.3
OB251 PID Algorithm, for CPU 103 Version 8MA02 and Higher
A PID algorithm is integrated in the operating system of the S5-100U. OB251 helps you use this www..com algorithm to meet your needs. Before calling up OB251, you must first open a data block called the controller DB. It contains the controller parameters and other controller specific data. The PID algorithm must be called up periodically to generate the manipulated variable. The more closely the scan time is maintained, the more accurately the controller fulfills its task. The control parameters specified in the controller DB must be adapted to the scan time. You should always call OB251 from the time OB (OB13). You can set time OBs at a call up interval ranging between 10 ms and 655,350 ms. The PID algorithm requires no more than 1.7 ms to process.
OB13 Time-Controlled Processing
C JU . . . . . BE DB OB N 251
DBN Controller Data Block OB251 PID Control Algorithm
DW 1 . . . . . . 49
DW
Figure 9-6. Calling Up the OB251 PID Algorithm The continuous action controller is designed for controlled systems such as those present in process engineering for controlling pressure, temperature, or flow rate. The "R" variable sets the proportional element of the PID controller. If proportional action is required, most controller designs use the value R = 1. The individual Proportional action, Integral action, and Derivative action elements can be deactivated via their parameters (R, TI, and TD) by presetting the pertinent data words to zero. This enables you to implement all required controller structures without difficulty, e.g., PI, PD, or PID controllers. You can forward the system deviation XW or, using the XZ input, any disturbance variable or the inverted actual value X to the derivative action element. Specify a negative K value for a reverse acting controller. When the manipulated information (dY or Y) is at a limit, the integral action component is automatically deactivated in order not to impair the dynamic response of the controller. The switch settings in the block diagram are implemented by setting the respective bits in control word "STEU".
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Z
www..com
0 W R -+ 0 1 XW TD XZ + + + dY + Zk-Zk-1 1 0
STEU Bit 5
BGOG
STEU Bit 2
X
TI
K
+ 1 0
0 1
Summing unit
Y + + dY
OG
Limiter
0 1 0
YA, dYA
UG Manual function STEU Bit 0 STEU Bit 3 STEU Bit 4
STEU Bit 1
YH, dYH
BGUG
Figure 9-7. Block Diagram of the PID Controller
Table 9-6. Legend for the Block Diagram of the PID Controller Designation
K R TA TN TV TI TD W STEU YH, dYH Z XW X XZ Y, dY BGOG BGUG YA, dYA Proportional coefficient: R parameter (usually 1000) Scan time Integral-action time Derivative-action time Constant TI Constant TD Setpoint Control word Output value: Disturbance variable System deviation Actual value Substitute value for system deviation Manipulated variable, manipulated increments Upper limit of the manipulated variable Lower limit of the manipulated variable Output word : YA dYA Control Word Bit 3=1 Control Word Bit 3=0 YH dYH Control Word Bit 3=0 Control Word Bit 3=1 TI=Scan time TA/Integral action time TN TD=Derivative action time TV/Scan time TA
Explanation
K>0 K<0 direct acting reverse acting
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Table 9-7. Description of the Control Bits in Control Word "STEU" Control www..com Name Bit
0 AUTO
Signal State
0
Description
Manual mode The following variables are updated in Manual mode: 1) XK, XWK-1 and PWK-1 2) XZK, XZK-1 and PZK-1, when STEU bit 1=1 3) ZK and ZK-1, when STEU bit 5=0 Variable dDK-1 is set to 0: The algorithm is not computed. Automatic mode XWk is forwarded to the derivative action element. The XZ input is ignored. A variable other than XWk is forwarded to the derivative action element . Normal controller processing When the controller is called up (OB251), all variables (DW18 to DW 48 ) with the exception of K, R, TI, TD, BGOG, BGUG, YHk and Wk are reset in the controller DB. The controller is deactivated. Positioning algorithm Correction rate algorithm When GESCHW=0: Following the transfer to Manual mode, the specified manipulated variable value YA is adjusted exponentially to the manual value in four sampling steps. Additional manual values are then forwarded immediately to the controller output. When GESCHW=1: The manual values are forwarded immediately to the controller output. The limiting values are in force in Manual mode. When GESCHW=0: The manipulated variable last output is retained. When GESCHW=1: Correction increment dYK is set to zero. With feedforward control No feedforward control These bits are not assigned. The PID algorithm uses these bits as auxiliary flags.
1 1 XZ EIN 0 1
2
REG AUS
0 1
3
GESCHW
0 1 0
4
HANDART
1
5
NO Z
0 1
6 and 7 8 to 15
-
The control program can be supplied with fixed values or parameters. Parameters are input via the assigned data words. The controller is based on a PID algorithm. Its output signal can be either a manipulated variable (positioning algorithm) or a manipulated variable modification (correction rate algorithm).
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Correction Rate Algorithm The relevant correction increment dYk is computed at instant t= k www..com formula: *
*
TA according to the following
Without feedforward control (D11.5=1); XW is forwarded to the differentiator (D11.1=0) dYk = K[(XWk - XWk-1) R+TI * XWk+ (TD (XWk - 2XWk-1 + XWk-2) + dDk-1)] = K (dPWkR + dIk + dDk) * With feedforward control (D11.5=0); XW is forwarded to the differentiator (D11.1=0) dYk = K[(XWk - XWk-1) R+TI * XWk+ (TD (XWk - 2XWk-1 + XWk-2) + dDk-1)]+(Zk-Zk-1) = K (dPWkR + dIk + dDk)+dZk Without feedforward control (D11.5=1); XZ is forwarded to the differentiator (D11.1=1) dYk = K[(XWk - XWk-1) R+TI * XWk+ (TD (XZk - 2XZk-1 + XZk-2) + dDk-1)] = K (dPWkR + dIk + dDk) With feedforward control (D11.5=0); XZ is forwarded to the differentiator (D11.1=1) dYk = K[(XWk - XWk-1) R+TI * XWk+ (TD (XZk - 2XZk-1 + XZk-2) + dDk-1)]+(Zk-Zk-1) = K (dPWkR + dIk + dDk)+dZk * *
P element
I element
D element XWk PWk QWk
Z element = = = = = = = = = = = =
k:
kth element
When XWk is applied:
W k - Xk XWk - XWk-1 PWk - PWk-1 XWk-2XWk-1+XWk-2 XZk - XZk-1 PZk - PZk-1 XZk-2XZk-1+XZk-2 (XWk- XWk-1)R TI*XWk (TD*QWk+dDk-1) when XW is applied (TD*QZk+dDk-1) when XZ is applied Zk - Zk-1
When XZ is applied:
PZk QZk
The result is:
dPWk dIk dDk dZk
Positioning Algorithm The formula used to compute the correction rate algorithm is also used to compute the positioning algorithm. In contrast to the correction rate algorithm, however, the sum of all correction increments computed (in DW 48), rather than the correction increment dYk is output at sampling instant tk.
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At instant tk , manipulated variable Yk is computed as follows:
m=k
www..com dY Y=
k
m
m=0
Initializing the PID Algorithm OB251's interface to its environment is the controller DB. All data needed to compute the next manipulated variable value is stored in this DB. Each controller has its own controller data block. The controller-specific data are initialized in a data block that must comprise at least 49 data words. The CPU goes to STOP with a transfer error (TRAF) if no DB is open or if the DB is too short.
!
Caution
Make sure that the right controller DB is open before calling control algorithm OB251. Table 9-8. Structure of the Controller DB
Data Word
1
Name
K
Comments
Proportional coefficient (-32 768 to + 32 767) for controllers without a derivative-action element Proportional coefficient (- 1500 to +1500) for controllers with a derivative-action element* K is greater than zero when the control is direct acting, and less than zero when the control is reverse acting; the specified value is multiplied by a factor of 0.001**. R parameter (- 32 768 to + 32 767) for controllers without aderivative-action element R parameter (- 1500 to + 1500) for controllers with a derivativeaction element* Normally 1 for controllers with P element; the specified value is multiplied with a factor of 0.001** Constant TI (0 to 9999) TI=
Sampling interval TA Integral-action time
3
R
5
TI
The specified value is multiplied by a factor of 0.001 3 Constant TD (0 to 999) TD= 9 11 12 14 16 * W STEU YH BGOG BGUG
Derivative-action time TV Sampling interval TA
Setpoint (- 2047 to +2047) Control word (bit pattern) Value for Manual operation (- 2047 to +2047) Upper limit value (- 2047 to +2047) Lower limit value (- 2047 to +2047)
**
It is possible to have larger gains, if sudden incremental changes to the system deviation are small enough. This is the reason you have to divide larger deviations into smaller ones such as adding the setpoint via a ramp function. The factor 0.001 is an approximate value. The exact value of the factor is 1/1024 or 0.000976.
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Table 9-8. Structure of the Controller DB (continued)
www..com
Data Word
22 24 29 48
Name
X Z XZ YA Actual value (- 2047 to +2047)
Comments
Disturbance variable (- 2047 to +2047) Derivative time (- 2047 to +2047) Output variable (- 2047 to +2047)
All parameters (with the exception of the control word STEU) must be specified as 16-bit fixed point numbers.
!
Caution
The PID algorithm uses the data words that are not listed in Table 9-8 as auxiliary flags.
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Initialization and Call Up of the PID Controller in a STEP 5 Program Several different PID controllers can be implemented by calling up OB251 repeatedly. A data block www..com must be initialized prior to each OB251 call up. These DBs serve as data interface between the controllers and the user.
Note
Important controller data are stored in the high-order byte of control word DW11 (DL11). Therefore make sure that only T DR 11/SU D11.0 to D11.7 or RU D 11.0 to D11.7 operations are used to modify user-specific bits in the control word.
Selecting the Sampling Interval In order to be able to use the known analog method of consideration for digital control loops, do not select a sampling interval that is too large. Experience has shown that a TA sampling interval of approximately 1/10 of the time constant TRK, dom* produces a control result comparable to the equivalent analog result. Dominant system time constant TRK, dom determines the step response of the closed control loop. TA = 1/10 * TRK, dom In order to ensure the constancy of the sampling interval, OB251 must always be called up in the service routine for time interrupts (OB13).
x = t = = TA TRK,dom= Control variable Time Sampling interval Dominant system time constant of the closed control loop Reference variable / Setpoint Control deviation
x
TRK,dom
xd w
w xd
= =
t TA
Figure 9-8. Principle of Interval Sampling
* TRK, dom = dominant system time constant of the closed control loop
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Example for the Use of the PID Controller Algorithm: A PID controller is supposed to keep an annealing furnace at a constant temperature. www..com The temperature setpoint is entered via a potentiometer. The setpoints and actual values are acquired using an analog input module and forwarded to the controller. The computed manipulated variable is then output via an analog output module. The controller mode is set in input byte 0 (see control word DW11 in the controller DB). You must use the well-known controller design procedure to determine how to tune the controller for each controlled system.
IB32
+ Channel0 Channel1
Control byte (DR11) W X PID control algorithm OB251 with controller DB (call in OB13) Analog input module (e.g. 6ES5 460) Y
Channel 0
Manipulated variable
S5-100U
Setpoint adjuster
Analog output module (e.g. 6ES5 470)
Actual value
= =
Controlled system
Temperature sensor Annealing furnace Final control element
Transducer
Fuel gas flow
Figure 9-9. Process Schematic
The analog signals of the setpoint and actual values are converted into corresponding digital values in each sampling interval (set in OB13). OB251 uses these values to compute the new digital manipulated variable, from which, in turn, the analog output module generates a corresponding analog signal. This signal is then forwarded to the controlled system.
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Calling the Controller in the Program:
www..com OB 13 STL
Description
: NAME : JU FB 10 : CONTROLLER 1 : : : : : : : : : BE
PROCESS CONTROLLER THE CONTROLLER'S SAMPLING INTERVAL DEPENDS ON THE TIME BASE USED TO CALL OB13 (SET IN DB1). THE DECODING TIME OF THE ONBOARD ANALOG INPUTS MUST BE TAKEN INTO ACCOUNT WHEN SELECTING THE SAMPLING INTERVAL.
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FB10
STL
Description
NAME :CONTROLLER 1 www..com : :C DB 30 : : : : : :L PY 0 :T FY 10 :T DR 11 : : :
SELECT CONTROLLER'S DB ********************************** READ CONTROLLER'S CONTROL BITS ********************************** READ CONTROLLER'S CONTROL BITS AND STORE IN DR11 NOTE CAREFULLY: DR11 CONTAINS IMPORTANT CONTROL DATA FOR OB251 THE CONTROL BITS MUST THEREFORE BE TRANSFERRED WITH T DR11 TO PREVENT CORRUPTING DL11 ******************************** READ ACTUAL VALUE AND SETPOINT ********************************
:
: : : : : : : : :A :R : AN :S
F F F F
12.0 12.0 12.1 12.1
FLAG 0 (FOR UNUSED FUNCTIONS IN FB 250) FLAG 1
NAME BG KNKT OGR UGR EINZ XA FB BU
: : JU FB250 : RLG: AI : : : : : : : : : KF KY KF KF F DW F F +8 0,6 +2047 - 2047 12.0 22 12.2 12.3
READ ACTUAL VALUE MODULE ADDRESS CHANNEL NO. 0, FIXED-POINT BIPOLAR UPPER LIMIT FOR ACTUAL VALUE LOWER LIMIT FOR ACTUAL VALUE NO SELECTIVE SAMPLING STORE SCALED ACTUAL VAL. IN CONTR. DB ERROR BIT RANGE VIOLATION
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FB10 (continued) STL
: www..com : JU NAME : RLG: BG : KNKT : OGR : UGR : EINZ : XA : FB : BU : : :A : JC :L :T : FB250 AI KF KY KF KF F DW F F F +8 1,6 +2047 - 2047 12.0 9 13.1 13.2 10.0
Explanation READ SETPOINT MODULE ADDRESS CHANNEL NO. 1, FIXED-POINT BIPOLAR UPPER LIMIT FOR SETPOINT LOWER LIMIT FOR SETPOINT NO SELECTIVE SAMPLING STORE SCALED SETPOINT IN CONTR. DB ERROR BIT RANGE VIOLATION IN MANUAL MODE, THE SETPOINT IS SET TO THE ACTUAL VALUE TO FORCE THE CONTROLLER TO REACT TO A SYSTEM DEVIATION, IF ANY, WITH A P STEP ON TRANSFER TO AUTOMATIC MODE ******************** CALL CONTROLLER ******************** ********************************** OUTPUT MANIPULATED VALUE **********************************
=WEIT DW 22 DW 9
:
: WEIT : : : : : : : : : NAME XE BG KNKT OGR UGR FEH BU : JU FB251 : RLG:AQ : DW 48 : : : : : : : : BE KF KY KF KF F F +8 0,1 +2047 - 2047 13.5 13.6 JU OB251
MODULE ADDRESS CHANNEL 0, FIXED-POINT BIPOLAR UPPER LIMIT FOR ACTUATING SIGNAL LOWER LIMIT FOR ACTUATING SIGNAL ERROR BIT WHEN LIMITING VAL. DEFINED MANIPULATED VARIABLE Y TO ANALOG OUTPUT RANGE VIOLATION
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Integrated Blocks and Their Functions
S5-100U
DB 30
STL
0000; +01000; 0000; +01000; 0000; +00010; 0000; +00010; 0000; +00000; 0000; 00000000 00100000; +00500; 0000; +02000; 0000; -02000; 0000; 0000; 0000; 0000; 0000; +00000; 0000; +00000; 0000; 0000; 0000; 0000; +00000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; 0000; +00000; 0000;
Explanation K PARAMETER (HERE=1), FACTOR 0.001 (VALUE RANGE: - 32768 TO 32767) R PARAMETER (HERE=1), FACTOR 0.001 (VALUE RANGE: - 32768 TO 32767) TI=TA/TN (HERE=0.01), FACTOR 0.001 (VALUE RANGE: 0 TO 9999) TD=TV/TA (HERE=10), FACTOR 1 (VALUE RANGE: 0 TO 999) SETPOINT W, FACTOR 1 (VALUE RANGE: - 2047 TO 2047) CONTROL WORD MANUAL VALUE YH, FACTOR 1 (VALUE RANGE: - 2047 TO 2047) UPPER CONT. LIMIT BGOG, FACTOR 1 (VALUE RANGE: - 2047 TO 2047) LOWER CONT. LIMIT BGUG, FACTOR 1 (VALUE RANGE: - 2047 TO 2047)
0: KH www..com = 1: KF = 2: KH = 3: KF = 4: KH = 5: KF = 6: KH = 7: KF = 8: KH = 9: KF = 10: KH = 11: KM = 12: KF = 13: KH = 14: KF = 15: KH = 16: KF = 17: KH = 18: KH = 19: KH = 20: KH = 21: KH = 22: KF = 23: KH = 24: KF = 25: KH = 26: KH = 27: KH = 28: KH = 29: KF = 30: KH = 31: KH = 32: KH = 33: KH = 34: KH = 35: KH = 36: KH = 37: KH = 38: KH = 39: KH = 40: KH = 41: KH = 42: KH = 43: KH = 44: KH = 45: KH = 46: KH = 47: KH = 48: KF = 49: KH = 50:
ACTUAL VALUE X, FACTOR 1 (VALUE RANGE: - 2047 TO 2047) DISTURBANCE VARIABLE Z, FACTOR 1 (VALUE RANGE: - 2047 TO 2047)
FEEDFORWARD XZ FOR DIFF., FACTOR 1, (- 2047 TO 2047)
CONTROLLER OUTPUT Y, FACTOR 1 (VALUE RANGE: - 2047 TO 2047)
9-26
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10
Interrupt Processing 10.1 10.2 Interrupt Processing with OB2, for CPU 103 Version 8MA02 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calculating Interrupt Reaction Times . . . . . . . . . . . . . . . . . . . . . . .
10 - 1 10 - 5
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Figures
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10-1 10-2 10-3 Tables 10-1
Possible Configuration of the Programmable Controller with Bus Units Having Interrupt Capability . . . . . . . . . . . . . . . . . . . . . . . . Program Interruptions by Process Interrupts . . . . . . . . . . . . . . . . . . . . . . . Accessing the Process Image Tables from OB2 ...................
10 - 1 10 - 2 10 - 4
Additional Reaction Times
...................................
10 - 5
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Interrupt Processing
10
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Interrupt Processing, for CPU 103 Version 8MA02 and Higher
Interrupt-driven program processing starts when a signal from the CPU causes the programmable controller to interrupt cyclic or time-controlled program scanning in order to process a specific program. Once this program has been scanned, the CPU returns to the point of interruption in the cyclic or time-controlled program and resumes processing at that point. Prerequisites for Interrupt-Driven Program Processing Interrupt-driven program processing is possible only if the following conditions are met: * * The bus unit with interrupt capability is directly adjacent to the CPU (slots 0 and 1). Four-channel digital input modules or comparator modules must be mounted on the bus unit to transfer process interrupts. - You may plug other modules in, but these modules will have no interrupt handling capability. * * * The programmable controller is in the Power ON state and in the RUN operating mode. Interrupt processing is not disabled by an IA operation in your program. See section 8.2.8. OB2 has been programmed.
Slot 0

1

2

3

CPU
4 DI
8 DI
4 DI
8 DI
Bus unit with interrupt capability (but acts only like a "normal" bus unit)
Interrupts are handled only by this module
Bus unit with interrupt capability
Figure 10-1.
Possible Configuration of the Programmable Controller with Bus Units Having Interrupt Capability
10.1
Interrupt Processing with OB2, for CPU 103 Version 8MA02 and Higher
For interrupt-driven processing, OB2 must have been programmed. OB2 is called up by a process interrupt and interrupts in turn the cyclic or time-controlled program scanning. Other blocks can be called from OB2. After the interrupt-driven program has been processed, the CPU resumes cyclic or time-controlled program scanning.
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10-1
Interrupt Processing
S5-100U
Triggering an Interrupt
www..com Interrupts can only be triggered by four-channel digital input modules and comparator modules that are plugged into slots 0 and 1 on a bus unit with interrupt capability.
Interrupts are triggered by a change in the signal state (0 1=positive edge; 1 0=negative edge) at the respective interrupt input. Then the programmable controller automatically branches to OB2. If you have not programmed OB2, either the cyclic or time-controlled program resumes immediately after the interrupt. The cyclically processed program can be interrupted after every STEP 5 statement. The processing of integral FBs can be interrupted at certain points (see section 9.2). The data cycle (see section 2.2.2) can be interrupted after each data packet consisting of four data bits and a check bit.
Cyclic or time-controlled program processing
Interrupt-driven program processing
...
A I 0.2 INTERRUPT! S Q 14.0
Interrupt PII OB2 L PY2
...
BE
. . .
BE Interrupt PIQ
Figure 10-2. Program Interruptions by Process Interrupts Use the IA command to disable interrupt processing. Use the RA command to enable interrupt processing. The default setting is RA (see section 8.2.8).
Note
Even for interrupt processing, you may not exceed the general block nesting depth of 16 levels.
Interrupt Priorities
If a second interrupt is triggered during an interrupt processing, the second interrupts is processed at the end of the first interrupt processing.
Note
If both a positive and negative pulse edge occur at an interrupt input while the IA operation is valid (disable interrupt), it is no longer possible to determine the channel that has triggered the interrupt. But after an RA operation, OB2 is still called up.
10-2
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Interrupt Processing
Reading Out the Interrupt PII
If a process interrupt occurs, only the signal states of the interrupt inputs in slots 0 and 1 are read out to the interrupt PII. This data in the interrupt PII is the only data provided to the interrupt-driven program for evaluation. The interrupt PII can be scanned in OB2 by means of the following load operations: Overview:
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Operation
L L L
Operand
PY 0 PY 1 PW 0
Description Load byte 0 of the interrupt PII into ACCU 1 Load byte 1 of the interrupt PII into ACCU 1 Load word 0 of the interrupt PII into ACCU 1
If you enter other parameters, the CPU goes into the STOP mode and enters the "NNN" error message in the ISTACK (see section 5.2). When data is read into the interrupt PII, the normal PII is not written to simultaneously.
Writing to the Interrupt PIQ
Data from time-controlled or interrupt-driven programs to I/O modules are written to the interrupt PIQ and simultaneously to the "normal" PIQ. After OB2 is finished, the data that has been transferred to the interrupt PIQ is output to the peripheral I/Os in an interrupt output data cycle (before "normal" program processing). After the OB1 program cycle, the PIQ is copied to the interrupt PIQ. The interrupt output data cycle is executed only if the interrupt PIQ has been written to. Use transfer statements to write data for I/O modules to the interrupt PIQ. When data is written to the interrupt PIQ, data is written simultaneously to the normal PIQ. Overview:
Operation
T T
Operand
PY 0 to 127 PW 0 to 126
Description Transfer contents of ACCU 1 into the interrupt PIQ Transfer contents of ACCU 1 into the interrupt PIQ
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Interrupt Processing
S5-100U
Possibilities of Accessing Process I/O Image Tables
www..com The following figure shows how data transfer between the process I/O image tables and ACCU 1 takes place when using various load and transfer statements in OB2.
PII T IBX/T IW X L IBX/L IW X ACCU 1 T QBX/T QW X T PYX/T PW X
Interrupt PII L PYX/L PY1/L PW0
PIQ
X=byte or word address
Interrupt PIQ
Figure 10-3. Accessing the Process Image Tables from OB2
Example of How OB2 Can Be Programmed
Binary statements can access only the normal PII and PIQ. In order to determine the channel that triggered an interrupt, transfer the I/O byte or word, for example, to a flag byte or word and then evaluate using binary statements.
Example Two sensors are connected on channels 0 and 1 on a four-channel digital input module on slot 0. Branch to FB12 if sensor 1 (channel 0) triggers an interrupt.
STL OB2
L PY 0 T FY 0 A F 0.0 AN I 0.0 O AN F 0.0 A I 0.0 JC FB 12 ...
Explanation Load byte 0 of the interrupt PII into ACCU 1 and transfer it to flag byte 0. Did a positive edge occur on channel 0? OR Did a negative edge occur on channel 0? If a pulse edge has occurred, a branch is made to FB12.
Caution
Be sure to save the flags (in a data block, for example) if these flags are to be overwritten during interrupt processing and are needed again in the cycle.
10-4
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Interrupt Processing
10.2
Calculating Interrupt Reaction Times
The total reaction time is is the sum of the following times: * * * Signal delay of the module triggering the interrupt (= time from the input signal change triggering the interrupt to the activation of the interrupt line) Interrupt reaction time of the CPU Execution time of the interrupt program (= sum of all STEP 5 statements in the interrupt evaluation program)
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Calculate the interrupt reaction times as follows: CPU's interrupt reaction time = basic reaction time + additional reaction times The basic reaction time is 0.6 ms and is valid if the following conditions exist: * * * * * No integrated FBs were used. No parameters for the integral clock are set. No programmer/OP functions are present. OB13 has not been programmed. No SINEC L1 is connected.
The additional reaction times are variable. They are listed in Table 10-1.
Table 10-1. Additional Reaction Times Additional Running Functions of the Programmable Controller Integrated FBs Parameters set for clock SINEC L1 bus to the programmer interface OP functions 0.5 ms 0.2 ms 8.0 ms Depending on the number of bytes used for loading the memory Interrupt Reaction Times
Programmer functions: Status block/Transfer block Output address Compress * If no blocks are moved 0.5 ms 18 ms per kbyte
*
Depending on the number of blocks present (after overall reset 31 ms)
* If blocks are moved
* 600 ms per each 1kword of instructions in the block to be moved
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11
Analog Value Processing 11.1 11.2 11.2.1 11.2.2 11.2.3 11.2.4 11.2.5 11.3 11.4 Analog Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connecting Current and Voltage Sensors to Analog Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage Measurement with Isolated/Non-Isolated Thermocouples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Two-Wire Connection of Voltage Sensors . . . . . . . . . . . . . . . . . . . Two-Wire Connection of Current Sensors . . . . . . . . . . . . . . . . . . . Connection of Two-Wire and Four-Wire Transducers . . . . . . . . . . . . Connection of Resistance Thermometers . . . . . . . . . . . . . . . . . . . . Start-Up of Analog Input Modules ......................... .......... 11 1
11 11 11 11 11 11 -
1 2 3 4 4 6 7
11 -
Analog Value Representation of Analog Input Modules
11 - 11 11 - 19 11 - 19 11 - 20 11 - 22 11 - 22 11 - 25
11.5 Analog Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.5.1 Connection of Loads to Analog Output Modules . . . . . . . . . . . . . . . 11.5.2 Analog Value Representation of Analog Output Modules . . . . . . . . . 11.6 Analog Value Conversion: Function Blocks FB250 and FB251 . . . . . 11.6.1 Reading in and Scaling an Analog Value -FB250- . . . . . . . . . . . . . . 11.6.2 Output of Analog Value -FB251- . . . . . . . . . . . . . . . . . . . . . . . . . .
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Figures
11-1 Voltage Measuring with Isolated Thermocouples (6ES5 464-8MA11/8MA21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2 Voltage Measuring with Non-Isolated Thermocouples (6ES5 464-8MA11/8MA21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3 Two-Wire Connection of Voltage Sensors (6ES5 464-8MB11, 464-8MC11, 466-8MC11) . . . . . . . . . . . . . . . . . . . . . . 11-4 Two-Wire Connection for Current Sensors (6ES5 464-8MD11) . . . . . . . . . . 11-5 Connection of Two-Wire Transducers (6ES5 464-8ME11) . . . . . . . . . . . . . 11-6 Connection for Four-Wire Transducers (6ES5 464-8ME11) ............ 11-7 Wiring Method for PT 100 (6ES5 464-8MF11/8MF21) . . . . . . . . . . . . . . . . 11-8 Wiring Possibilities for Input Modules (6ES5 464-8MF11) . . . . . . . . . . . . . . 11-9 Load Connection via a Four-Wire Circuit (6ES5 470-8MA11, 6ES5 470-8MD11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10 Load Connection via a Two-Wire Circuit (6ES5 470-8MB11, 6ES5 470-8MC11) . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-11 Scaling Schematic for FB250 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12 Schematic for "Display of Tank Make-Up Quantity" .................. 11-13 Conversion of the Nominal Range into the Defined Range ............. 11-14 Schematic for "Display of Tank Contents" . . . . . . . . . . . . . . . . . . . . . . . . . 11-15 Transformation of the Analog Value to the Nominal Range . . . . . . . . . . . . .
11 11 11 11 11 11 11 11 -
2 2 3 4 4 5 6 6
11 - 19 11 11 11 11 11 11 20 22 23 23 25 26
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Tables
11-1 Operating Mode Switch Settings for Analog Input Modules 464-8 to 11 .... 11-2 Operating Mode Switch Settings for Analog Input Module 464-8MA21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3 Operating Mode Switch Settings for Analog Input Module 464-8MF21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-4 Representation of an Analog Input Value as Bit Pattern . . . . . . . . . . . . . . . . 11-5 Analog Input Module 464-8MA11, -8MF11, -8MB11 (Bipolar Fixed-Point Number) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-6 Analog Input Module 464-8MC11, -8MD11 (Bipolar Fixed-Point Number) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7 Analog Input Module 464-8ME11, 4x4 to20 mA (Absolute Value Representation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8 Analog Input Module 464-8MF11, 2x PT 100 (Unipolar) Analog Input Module 464-8MF21, 2x PT 100 "No Linearization" (Unipolar) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9 Analog Input Module 464-8MF21, 2x PT 100 "with Linearization" (Bipolar) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10 Analog Input Module 464-8MA21, 4x50 mV "with Linearization" and "with Temperature Compensation" (Bipolar); Thermoelement Type K (Nickel-Chromium/Nickel-Aluminium, according to IEC 584) . . . . . . . . . . . . . 11-11 Analog Input Module 464-8MA21, 4x50 mV "with Linearization" and "with Temperature Compensation" (Bipolar); Thermoelement Type J (Iron/Copper-Nickel (Konstantan), according to IEC 584) . . . . . . . . . . . . . . . 11-12 Analog Input Module 464-8MA21, 4x50 mV "with Linearization" and "with Temperature Compensation" (Bipolar); Thermoelement Type L (Iron/Copper-Nickel (Konstantan) according to DIN 43710) . . . . . . . . . . . . . 11-13 Analog Input Module 466-8MC11, 4x 0 to10 V . . . . . . . . . . . . . . . . . . . . . . 11-14 Representation of an Analog Output Value as a Bit Pattern ............ 11-15 Output Voltages and Currents for Analog Output Modules (Fixed-Point Number Bipolar) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-16 Output Voltages and Currents for Analog Output Modules (Unipolar) . . . . . . 11-17 Call and Parameter Assignments of FB250 . . . . . . . . . . . . . . . . . . . . . . . . 11-18 Call and Parameter Assignments of FB251 . . . . . . . . . . . . . . . . . . . . . . . .
11 11 -
7 8
11 - 10 11 - 11 11 - 11 11 - 12 11 - 12
11 - 12 11 - 13
11 - 14
11 - 15
11 - 16 11 - 16 11 - 20 11 11 11 11 21 21 22 25
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Analog Value Processing
11
11.1
Analog Value Processing
Analog Input Modules
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Analog input modules convert analog process signals to digital values that the CPU can process (via the process image input table, PII). In the following sections, you will find information about the operating principle, wiring methods, and start-up and programming of analog input modules.
11.2
Connecting Current and Voltage Sensors to Analog Input Modules
Observe the following rules to connect current and voltage sensors to analog input modules: * * When you have multi-channel operations, assign the channels in ascending order. This shortens the data cycle. Use terminals 1 and 2 for the connection of a compensating box (464-8MA11 ) or for the supply of two-wire transducers (464-8ME11). - Terminals 1 and 2 cannot be used with the remaining analog input modules. Short-circuit the terminals of unused inputs. Set the reference potentials of the sensors to a common reference potential. Do this to prevent the potential difference between the common references from exceeding 1 V.
* *
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Analog Value Processing
S5-100U
11.2.1 Voltage Measurement with Isolated/Non-Isolated Thermocouples
Module 464-8MA11/8MA21 is recommended for voltage measurement with thermocouples. With floating sensors (e. g., isolated thermocouples), the permissible potential difference VCM between terminals of the inputs and the potential of the standard mounting rail must not be exceeded. To avoid this, the negative potential of the sensor must be connected to the central ground point (see Figure 11-1). Jumper terminals 1 and 2 together if you do not use compensation boxes.
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1
3
5
7
9
Reference junction
2
4
6
8
10
+
-
+
-+
-
Compensating box
Thermal coupling
Figure 11-1. Voltage Measuring with Isolated Thermocouples (6ES5 464-8MA11/8MA21) With non-floating sensors (e. g., non-isolated thermocouples), the permissible potential difference VCM must not be exceeded (see maximum values of the individual modules).
1
3
5
7
9
Reference junction
2
4
6
8
10
VCM
+
-
+
-+
-
Compensating box
Thermal coupling
Figure 11-2. Voltage Measuring with Non-Isolated Thermocouples (Module 6ES5 464-8MA11/8MA21)
11-2
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Analog Value Processing
Connection of Thermocouples with Compensating Box to Module 464-8MA11/8MA21 The influence of the temperature on the reference junction (e. g., terminal box) can be compensated for with a compensation box. Observe the following rules: * * * The compensation box must have a floating supply. The power supply must have a grounded shielding winding. The compensation box must be connected to terminals 1 and 2 of the terminal block.
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11.2.2 Two-Wire Connection of Voltage Sensors
You can use the following three modules for the connection of voltage sensors: * * * Analog Input Module 464-8MB11 for voltages of1 V Analog Input Module 464-8MC11 for voltages of10 V Analog Input Module 466-8MC11 for voltages from 0 to 10 V
Figure 11-3 shows the two-wire connection of voltage sensors.
1
3
5
7
9
2
4
6
8
10
+
V
-+
-+
V V
-+
V
-
Figure 11-3. Two-Wire Connection of Voltage Sensors (6ES5 464-8MB11, 464-8MC11, 466-8MC11)
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11-3
Analog Value Processing
S5-100U
11.2.3 Two-Wire Connection of Current Sensors
You can use module 464-8MD11 for the two-wire connection of current sensors. Figure 11-4 shows the two-wire connections of current sensors.
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1
3
5
7
9
2
4
6
8
10
+
-+
-+
-+
-
Figure 11-4. Two-Wire Connection for Current Sensors (6ES5 464-8MD11)
11.2.4 Connection of Two-Wire and Four-Wire Transducers
Use the 24-V inputs 1 and 2 of analog input module 464-8ME11 to supply the two-wire transducers. The two-wire transducer converts the supplied voltage to a current of 4 to 20 mA. For wiring connections, see Figure 11-5.
1
3
5
7
9
2
4
6
8
10
+
L+
M
-+
Two-wire transducer
Two-wire transducer
Figure 11-5. Connection of Two-Wire Transducers (6ES5 464-8ME11)
11-4
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Analog Value Processing
If you use a four-wire transducer connect it as shown in Figure 11-6.
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1
3
5
7
9
2
4
6
8
10
U
Four-wire transducer
-+
Figure 11-6. Connection for Four-Wire Transducers (6ES5 464-8ME11) Four-wire transducers require their own power supply. Connect the "+" pole of the four-wire transducer to the corresponding "-" pole of the terminal block (a connection technique that is the opposite of the two-wire transducer). Connect negative terminals of the four-wire transducer to terminal two of the terminal block. Inputs 4, 6, 8, and 10 of the analog input module 464-8ME11 are connected internally via shunt resistors. Because of the internal shunt resistors, broken wire signaling is not possible.
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11-5
Analog Value Processing
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11.2.5
Connection of Resistance Thermometers
Analog input module 464-8MF11/8MF21 is suited for the connection of resistance thermometers www..com (e.g., PT 100). The resistance of the PT 100 is measured in a four-wire circuit. A constant current is supplied to the resistance thermometer via terminals 7 and 8 as well as via terminals 9 and 10, so that voltage drops in these "constant current circuits" do not affect the measurement results. The measuring inputs have a high resistance so that only a negligible current loss develops in the measuring circuits.
M0+
M1+
IC0+
IC1+
1
3
5
7
9
Terminal assignments: (3/4): (5/6): (7/8): (9/10): Measuring circuit M0 Measuring circuits M1 Constant current circuit IC 0 Constant current circuit IC 1
2
4
6
8
10
Figure 11-7. Wiring Method for PT 100 (6ES5 464-8MF11/8MF21) If you use only one channel for PT 100 measurement (e.g., channel 0), then you can use the other channel for voltage measurement ( 500 mV). In this case, use terminals M+/M- for the signal connection and short circuit the terminals IC+ and IC-.
1
3
5
7
9
2
4
6
8
10
+
V
-+
V
-
Figure 11-8. Wiring Possibilities for Input Modules (6ES5 464-8MF11)
11-6
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11.3
Start-Up of Analog Input Modules
Set the intended operating mode using the switches on the front panel of analog input modules www..com 464-8 through 11. These switches are located on the right side at the top of the front panel of the module. Power supply frequency: Set the switch to the available power supply frequency. This selects the integration time of the A/D converters for optimal interference voltage suppression. Power frequency 50 Hz: Integration time 20 ms Power frequency 60 Hz: Integration time 16.66 ms Set the number of channels you wish to assign on the input module. If there are fewer than four channels, less address space will be assigned and measured values will be updated faster. Once the broken wire signal has been activated, a break on one of the lines to the sensor (thermocouple or PT 100) or of the sensor itself causes the red LED above the function selection switch to light up. At the same time, the broken wire error bit F (bit 1, byte 1) for the faulty channel is set. The module "recognizes" a wire break by applying a conventional tripping current to the input terminals and by comparing the resulting voltage to a limit value. If there is a wire break in the sensor or the lines, the voltage exceeds the limit value and a "wire break" signal is sent. When the signal at the input is measured with a digital voltmeter, the tripping current pulses cause apparent fluctuations of the signal. Deactivation of the wire break signal does not turn off the tripping current. Table 11-1. Operating Mode Switch Settings for Analog Input Modules 464-8 to 11 Function Settings for Operating Mode Switch 50 Hz Power supply frequency 1 channel (channel 0) Operation
4 3 2 1 4 3 2 1
Operation:
Broken wire:
60 Hz
4 3 2 1
2 channels (channel 0 and channel 1)
4 3 2 1
4 channels (channel 0 - channel 3)
4 3 2 1
With wire break signal Wire break
4 3 2 1
No wire break signal
4 3 2 1
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Additional operating mode switch selections possible with analog module 464-8MA21: Linearization:
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With this function, you can obtain a characteristic linearization of the thermocouples of type J, K, and L or of the resistance thermometer PT 100. With module 464-8MA21, the linearization must always be activated together with the corresponding compensation of the reference point temperature. Thermocouples: Type J: - 200 C to +1200 C Type K: - 200 C to +1369 C Type L: - 199 C to + 900 C (-328 F to 2192 F) (-328 F to 2497 F) (-326 F to 1652 F) in steps each of 1 C (1.8 F)
Temperature For the thermocouples of type J, K, and L, you can compensate, on the one hand, compensation: the temperature of the reference point using a compensating box. (See Figure 11-1). On the other hand, it is possible to move the reference point to the front of the module by activating the "temperature compensation" function. When thermocouples are directly connected, an internal circuit on the module causes the digital value "0" to be displayed independently of the temperature of the terminal when the temperature at the measuring junction is 0 C (32 F). In order to accomplish this, the terminals of the sensors have to be connected directly to the module, i.e., without a copper extension cable. Table 11-2. Operating Mode Switch Settings for Analog Input Module 464-8MA21 Function Settings for Operating Mode Switch 50 Hz Power supply frequency
8 7 6 5 4 3 2 1
60 Hz
8 7 6 5 4 3 2 1
1 channel (channel 0) Operation
8 7 6 5 4 3 2 1
2 channels (channel 0 and channel 1)
8 7 6 5 4 3 2 1
4 channels (channel 0 - channel 3)
8 7 6 5 4 3 2 1
With wire break signal
8 7 6 5 4 3 2 1
No wire break signal
8 7 6 5 4 3 2 1
Wire break
11-8
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Analog Value Processing
Table 11-2. Function
Operating Mode Switch Settings for Analog Input Module 464-8MA21 (continued) Settings for Operating Mode Switch without linearization Linearization type K
8 7 6 5 4 3 2 1
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Linearization type J
8 7 6 5 4 3 2 1
Linearization type L
8 7 6 5 4 3 2 1
Characteristic linearization of thermocouples
8 7 6 5 4 3 2 1
without temperature compensation Temperature compensation
8 7 6 5 4 3 2 1
Temperature compensation for type K
8 7 6 5 4 3 2 1
Temperature compensation for types J and L
8 7 6 5 4 3 2 1
If you have set "Characteristic linearization" and "Temperature compensation" with the operating mode switches on module 464-8MA21 for the thermocouple used, then the reference temperature is 0 C (32 F). This means that with 0 C (32 F) at the measuring junction, the value "0" is displayed. If you equip several channels with thermocouples, use the same type of thermocouple. If you select mixed thermocouples, or if you use thermocouples other than type J, K, or L, then you must choose the following two settings: * * "No linearization" "No temperature compensation"
Compensation is then not possible even with a compensating box because the compensating box is designed only for a certain type of thermocouple. It is possible to use a thermostat in the terminal box if you use the thermostat temperature in the application software to adjust the thermocouple input offset. When you set the switches to "no linearization" and "no temperature compensation", then module 464-8MA21 functions just like module 464-8MA11.
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Analog Value Processing
S5-100U
Set the switches on analog module 464-8MF21 as illustrated in Table 11-3.
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Table 11-3. Operating Mode Switch Settings for Analog Input Module 464-8MF21 Function Settings for Operating Mode Switch 50 Hz
8 7 6 5 4 3 2 1
60 Hz
8 7 6 5 4 3 2 1
Power supply frequency
1 channel (channel 0) Operation
8 7 6 5 4 3 2 1
2 channels (channel 0 and channel 1)
8 7 6 5 4 3 2 1
With wire break signal
8 7 6 5 4 3 2 1
No wire break signal
8 7 6 5 4 3 2 1
Wire break
No linearization
8 7 6 5 4 3 2 1
Linearization for PT 100
8 7 6 5 4 3 2 1
Characteristic linearization for the PT 100
Position 1 and 2 on the operating mode switch have no function. If you set the switch to "no linearization" and "no temperature compensation", module 464-8MF21 functions just like module 464-8MF11. The characteristic linearization is possible for the following temperature ranges. PT 100: -100 C to+850 C (-148 F to 1569 F) (in steps of 0.5 C (0.9 F))
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Analog Value Processing
11.4
Analog Value Representation of Analog Input Modules
Each analog process signal has to be converted into a digital format, to be stored in the process www..com image input table (PII). The analog signals are converted into a binary digit that is written in one of the following ways: * * In one byte (466-8MC11) In two bytes (the remaining analog input modules)
Each bit position has a fixed value in powers of two (see Tables 11-4 and 11-14). Analog values are represented in two's complement. The following tables show the analog value representations of the different analog inputs in 2-byte format. You will need this information to program FB250 and FB251 (see section 11.6). Table 11-4. Representation of an Analog Input Value as Bit Pattern High Byte Bit Number Analog Value Represent.
Key: S X E OV
7 S 6 211 5 210 4 29 3 28 2 27 1 26 0 25 7 24 6 23 5 22
Low Byte
4 21 3 20 2 X 1 E 0 OV
Sign bit Irrelevant bits Error bit Overflow bit
0="+", 1="-" 0= no wire break; 1=wire break 0= Measured value 4095 units at the most 1= Measured value greater than or equal to 4096 units
Analog value representation for analog input modules 464-8... Table 11-5. Analog Input Module 464-8MA11, -8MF11, -8MB11 (Bipolar Fixed-Point Number) Units
>4095 4095 2049 2048 1024 1 0 -1 -1024 -2048 -2049 -4095 <-4095
Measured Value in mV
100.0 99.976 50.024 50.0 25.0 0.024 0.0 - 0.024 - 25.0 -50.0 -50.024 -99.976 -100.0 1000.0 999.75 500.24 500.0 250.0 0.24 0.0 -0.24 - 250.0 -500.0 -500.24 -999.75 -1000.0 2000.0 1999.5 1000.48 1000.0 500.0 0.48 0.0 -0.48 - 500.0 -1000.0 -1000.48 -1999.5 -2000.0
High Byte
Low Byte
Range
Overflow Overrange
0111111111111001 0111111111111000 0100000000001000 0100000000000000 0010000000000000 0000000000001000 0000000000000000 1111111111111000 1110000000000000 1100000000000000 1011111111111000 1000000000001000 1000000000001001
Nominal range
Overrange Overflow
464-8MA11/-8MA21 "No linearization" 464-8MF11 (2x500 mV) 464-8MB11 (4x1 V)
(4x50 mV)
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Analog Value Processing
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Table 11-6. Analog Input Module 464-8MC11, -8MD11 (Bipolar Fixed-Point Number) Units www..com
>4095 4095 2049 2048 1024 1 0 -1 -1024 -2048 -2049 -4095 <-4095
Measured Value in V in mA
40.0 39.9902 20.0098 20.0 10.0 0.0098 0.0 -0.0098 -10.0 -20.0 -20.0098 - 39.9902 -40.0
High Byte
Low Byte
Range
Overflow Overrange
20.000 19.995 10.0048 10.000 5.000 0.0048 0.0 -0.0048 - 5.000 -10.000 -10.0048 -19.995 -20.000
0111111111111001 0111111111111000 0100000000001000 0100000000000000 0010000000000000 0000000000001000 0000000000000000 1111111111111000 1110000000000000 1 1 1 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1
Nominal range
Overrange Overflow
464-8MC11 464-8MD11
(4x10 V) (4x20 mA)
Table 11-7. Analog Input Module 464-8ME11, 4x4 to 20 mA (Absolute Value Representation) Units
>4095 4095 2561 2560 2048 512 511 384 0 -1 <-4095
Measured Value in mA
> 32.769 31.992 20.008 20.0 16.0 4.0 3.992 3.0 0.0 -0.008 <-32.769
High Byte
Low Byte
Range*
Overflow Overrange
0111111111111001 0111111111111000 0101000000001000 0101000000000000 0100000000000000 0001000000000000 0000111111111000 0000110000000000 0000000000000000 1111111111111000 1000000000001001
Nominal range
Transducer failure?
*
Because of tolerances of components used in the module, the converted value can also be negative (e.g. FFF8H Unit: -1).
Table 11-8.
Analog Input Module 464-8MF11, 2x PT 100 (Unipolar) Analog Input Module 464-8MF21, 2x PT 100 "No Linearization" (Unipolar) Resistance in High Byte Low Byte Range
Overflow Overrange
Units
>4095 4095 2049 2048 1024 1 0
400.0 399.90 200.098 200.0 100.0 0.098 0.0
0111111111111001 0111111111111000 0100000000001000 0100000000000000 0010000000000000 0000000000001000 0000000000000000
Nominal range
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Analog Value Processing
Table 11-9. Analog Input Module 464-8MF21, 2x PT 100 "with Linearization" (Bipolar)
www..com Units
Resistance in
>400
Temperature in C
>883 883 851 850 700 500 300 150 100 1 0 -20 -40 -100 -101 -247 <-247
High Byte
Low Byte
Range
F
>1531 1531 1564 1562 1292 932 572 302 212 34 32 -4 -40 -148 -150 -413 <-403 0 0 1 1 0 1 1 1 0 0 1 1 0 0 0 1 Overflow 0 0 1 1 0 1 1 1 0 0 1 1 0 0 0 1 Overrange* 0011010100110001 0011010100100000 0010101111000000 0001111101000000 0001001011000000 0000100101100000 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 Nominal range 0000000000010000 0000000000000000 1111111011000000 1111110110000000 1111100111000000 1 1 1 1 1 0 0 1 1 0 1 1 0 0 0 1 Overrange* 1111000010010001 1 1 1 1 0 0 0 0 1 0 0 1 0 0 0 1 Overflow
>1766 1766 1702 1700 1400 1000 600 300 200 2 0 -40 -80 -200 -202 -494 <-494
390.26 345.13 280.90 212.02 157.31 138.50 100.39 100.00 92.16 84.27 60.25
*
In the overrange area, the current slope of the characteristic curve is maintained when leaving the linearized nominal range.
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Analog Value Processing
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and www..com
Table 11-10. Analog Input Module 464-8MA21, 4x50 mV "with Linearization" "with Temperature Compensation" (Bipolar); Thermoelement Type K (Nickel-Chromium/Nickel-Aluminium, according to IEC 584) Units
>2359 1370 1369 1000 500 150 100 1 0 -1 -100 -101 -150 -200 -201 -273 X 1370 1369 1000 500 150 100 1 0 1 -100 -101 -150 -200 -201 X 2498 2496 1832 932 302 212 34 32 -30 -148 -150 -238 -328 -330
Thermal Voltage in mV*
Temperature C F
High Byte
Low Byte
Range
0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 Overflow Overrange** 54.773 41.269 20.640 6.137 4.095 0.039 0 -0.039 -3.553 -3.584 -4.912 -5.891 0010101011010001 0010101011001000 0001111101000000 0000111110100000 0000010010110000 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 Nominal range 0000000000001000 0000000000000000 1111111111111000 1111110011100000 1 1 1 1 1 1 0 0 1 1 1 0 0 0 0 0 Accuracy 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 2K 0 1 Overrange** 1 Overflow
X X X X X X X X X X X X X 0 1 0 Wire break
This value corresponds to the terminal temperature at wire break
* **
For a reference temperature of 0 C (32 F) In the overrange area, the current slope of the characteristic curve is maintained when leaving the linearized nominal range.
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Analog Value Processing
Table 11-11.
and www..com Units
1485 1201 1200 1000 500 100 1 0 -1 -100 -150 -199 -200 -201 -273 X
Analog Input Module 464-8MA21, 4x50 mV "with Linearization" "with Temperature Compensation" (Bipolar); Thermoelement Type J (Iron/Copper-Nickel (Konstantan), according to IEC 584) Thermal Temperature Voltage High Byte Low Byte Range C F in mV*
0 0 1 0 1 1 1 0 0 1 1 0 1 0 0 1 Overflow Overrange** 69.536 57.942 27.388 5.268 0.05 0 -0.05 -4.632 -6.499 -7.868 -7.890 1201 1200 1000 500 100 1 0 -1 -100 -199 -200 -200 -201 2194 2192 1832 932 212 34 32 -30 -148 -238 -326 -328 -330 X 0010010110001001 0010010110000000 0001111101000000 0000111110100000 0000001100100000 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 Nominal range 0000000000000000 1111111111111000 1111110011100000 1111101101010000 1111100111001000 1111100111000000 1 1 1 1 1 0 0 1 1 0 1 1 1 0 0 1 Overrange** 1 1 1 1 0 1 1 1 0 1 1 1 1 0 0 1 Overflow X X X X X X X X X X X X X 0 F 0 Wire break
This value corresponds to the terminal temperature at wire break
* **
For a reference temperature of 0 C (32 F) In the overrange area, the current slope of the characteristic curve is maintained when leaving the linearized nominal range.
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Analog Value Processing
S5-100U
and www..com
Table 11-12. Analog Input Module 464-8MA21, 4x50 mV "with Linearization" "with Temperature Compensation" (Bipolar); Thermoelement Type L (Iron/Copper-Nickel (Konstantan), according to DIN 43710) Thermal Temperature Units Voltage High Byte Low Byte Range C F in mV*
1361 901 900 500 250 100 1 0 -1 -100 -150 -190 -199 -200 -273 X 901 900 500 250 100 1 0 -1 -100 -150 -190 -199 -200 X 1654 1652 932 482 212 34 32 -30 -148 -238 -310 -326 -328 0 0 1 0 1 0 1 0 1 0 0 0 1 0 0 1 Overflow Overrange** 53.14 27.85 13.75 +5.37 0.05 0 -0.05 -4.75 -6.60 -7.86 -8.12 0001110000101001 0001110000100000 0000111110100000 0000011111010000 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 Nominal range 0000000000001000 0000000000000000 1111111111111000 1111110011100000 1111101101010000 1111101000010000 1111100111001000 1 1 1 1 1 0 0 1 1 1 0 0 0 0 0 1 Overrange** 1 1 1 1 0 1 1 1 0 1 1 1 1 0 0 1 Overflow X X X X X X X X X X X X X 0 1 0 Wire break
* **
This value corresponds to the terminal temperature at wire break For a reference temperature of 0 C (32 F) In the overrange area, the current slope of the characteristic curve is maintained when leaving the linearized nominal range.
Analog value representation of analog input module 466-8MC11 The 466-8MC11 analog input module stores each analog value in a single byte. The other analog input modules store the analog values in words (see Table 11-4).
Table 11-13. Analog Input Module 466-8MC11, 4x 0 to 10 V Units
255 254 . 128 . 1 0
Voltage in mV
9961 9922 . 5000 . 39 0
Bit Representation
11111111 11111110 . 10000000 . 00000001 00000000
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Analog Value Processing
If you want to read in the analog value with function block FB250 (analog value reading), you have to pre-process the analog value before calling up FB250. www..com Example 1: Analog input module 466-8MC11 is inserted in slot 1, which means that the module's start address is 72. The analog values are stored in four consecutive bytes: 1st analog value 2nd analog value 3rd analog value 4th analog value (channel 0) (channel 1) (channel 2) (channel 3) in IB72 in IB73 in IB74 in IB75
Function block FB72, pictured below, reads in the analog values and pre-processes them for function block FB250 (analog value reading). FB72
NAME :READ 466 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F 0010 0011 0012 0013 0014 0015 0016 0017 0018 0019 001A 001B : :L :T :L :T : :L IW FW IW FW FY 72 72 74 74 72 6 72 73 6 74 74 6 76 75 6 78 PROCESS EACH ANALOG VALUE AND REWRITE THEM IN THE PII SO THAT FB250 CAN ACCESS THEM WITHIN THAT SCAN. READ IN ALL CHANNELS OF AI 466 READ ALL FOUR CHANNELS AND REARRANGE
Explanation
:SLW :T IW : :L FY :SLW :T IW : :L FY :SLW :T IW : :L FY :SLW :T : :BE IW
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Analog Value Processing
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Example 2:
www..com Analog input module 466-8MC11 is inserted in slot 0, which means that the module's start address is 64.
The analog values that are read in are stored in four consecutive bytes: 1st analog value 2nd analog value 3rd analog value 4th analog value (channel 0) (channel 1) (channel 2) (channel 3) in IB64 in IB65 in IB66 in IB67
Function block 73, pictured below, reads in the analog values and pre-processes them for FB250. The additional processing with FB250 is done just like module 464, however without an overflow bit. FB73
NAME :READ AI : : 000A 000C 000E 0010 0012 0014 0016 0018 001A 001C 001E 0020 0022 0024 0026 0028 002A 002C :L IB :SLW :T IW : :L IB :SLW :T : :L IW IB 67 6 70 66 6 68 65 6 66 64 6 64 Read in channel 0 Read in channel 1 Read in channel 3
Explanation
Read in channel 2
:SLW :T IW : :L IB :SLW :T IW
: : :JU FB 250 Module on slot 0 Channel/No. 0, unipolar representation Upper limit 1000 (1000 mV) Lower limit 0 No meaning Output, 0 to 1000 mV in KF Error bit for parameter assignment Range overflow (always 0 with this module)
002E NAME :RLG:AI 0030 BG : KF +0 0032 KNKT : KY 0,4 0034 OGR : 0036 UGR : 0038 EINZ : 003A XA 003C FB 003E BU 0040 0042 : : : : :BE KF +1000 KF +0 F 0.0 FW 100 F 102.0 F 102.1
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Analog Value Processing
11.5
Analog Output Modules
Analog output modules convert the bit patterns that are output by the CPU into analog output voltages or currents.
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11.5.1 Connection of Loads to Analog Output Modules
No adjustments are necessary if you want to connect loads to the analog outputs. Check the following items before connecting loads: * * * The load voltage 24 V DC must be connected to terminals 1 and 2. The maximum permissible potential difference between the outputs is 60 V AC. Unused outputs must be left open-circuited.
Figure 11-9 shows how to connect loads to the voltage outputs of the following modules: * * 470-8MA12 (2x10 V) 470-8MD12 (2x+1 to 5 V)
The sensor lines (S+ and S-) must be directly connected to the load, so that the voltage is measured and regulated directly at the load. In this manner, voltage drops of up to 3 V per line can be compensated for. The sensor lines can be left out if the resistances of the QV and M lines are negligible compared to the load resistance. In such a case, connect terminal S+to terminal QV, and terminal S- to MANA.
S+
S-
S+
S-
1
3
QV
5
7
MANA QV
9
MANA Key: QV: S: MANA: RL: Analog output "Voltage" Sensor line Chassis ground terminal of the analog unit Load resistor
2
4
6
8
10
L+
M
24 V DC (4/8) (3/7) QV S+ RL (5/9) (6/10) S- MANA Terminal assignment Terminals
Figure 11-9. Load Connection via a Four-Wire Circuit (6ES5 470-8MA12 or 6ES5 470-8MD12)
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Figure 11-10 shows how to connect loads to the current outputs of the following modules. *www..com 470-8MB12 (2x20 mA) * 470-8MC12 (2x+4 to 20 mA).
1
3
5
7
9
Key: QI: MANA:
2
4
6
8
10
Analog output "Current" Chassis ground terminal of the analog unit
L+
M
24 V DC (4/8) (6/10) MANA RL Terminal assignment Terminals
QI
Figure 11-10. Load Connection via a Two-Wire Circuit (6ES5 470-8MB12 or 6ES5 470-8MC12)
11.5.2 Analog Value Representation of Analog Output Modules
Table 11-14 shows how the analog output value has to be stored in the process image output table (PIQ). Table 11-14. Representation of an Analog Output Value as a Bit Pattern High Byte Bit number Analog value represent.
Key: S X
7 S 6 210 5 29 4 28 3 27 2 26 1 25 0 24 7 23 6 22 5 21
Low Byte
4 20 3 X 2 X 1 X 0 X
sign bit irrelevant bits
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Analog Value Processing
Table 11-15 and 11-16 show the voltage and currents assigned to the bit patterns.
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Table 11-15.
Output Voltages and Currents for Analog Output Modules (Fixed-Point Number Bipolar) High Byte Low Byte Range
Units
Output Values in V in mA
25.0 20.0195 20.0 10.0 0.0195 0.0 -0.0195 -10.0 -20.0 -20.0195 -25.0
1280 1025 1024 512 1 0 -1 -512 -1024 -1025 -1280
12.5 10.0098 10.0 5.0 0.0098 0.0 -0.0098 -5.0 -10.0 -10.0098 -12.5
010100000000 010000000000
xxxx xxxx
Overrange
010000000000xxxx 001000000000xxxx 000000000000xxxx 000000000000xxxx 111111111111xxxx 111000000000xxxx 110000000000xxxx 101111111111xxxx 101100000000xxxx Nominal range
Overrange
2x10 V 2x20 mA
6ES5 470-8MA12 6ES5 470-8MB12
Table 11-16. Output Voltages and Currents for Analog Output Modules (Unipolar) Units Output Values in V
1280 1025 1024 512 1 0 -1 -256 -512 -1024 -1280 6.0 5.004 5.0 3.0 1.004 1.0 0.996 0.0 -1.0 -3.0 -4.0
High Byte
Low Byte
Range
in mA
24.0 20.016 20.0 12.0 4.016 4.0 3.984 0.0 -4.0 -12.0 -16.0 010100000000 010000000001 xxxx xxxx Overflow
010000000000xxxx 001000000000xxxx 000000000001xxxx 000000000000xxxx 111111111111xxxx 111100000000xxxx 111000000000xxxx 110000000000xxxx 101100000000xxxx
Nominal range
Overrange
2x 1 to 5 V 2x 4 to 20 mA
6ES5 470-8MD12 6ES5 470-8MC12
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Analog Value Processing
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11.6
Analog Value Conversion: Function Blocks FB250 and FB251 - FB250 -
11.6.1 Reading in and Scaling an Analog Value www..com
Function block FB250 reads in an analog value from an analog input module and outputs a value XA in the scale range specified by the user. Specify the type of analog value representation for the module (channel type) in the KNKT parameter (see Table 11-17). Define the desired range using the "upper limit" (OGR) and "lower limit" (UGR) parameters. Table 11-17. Call and Parameter Assignments of FB250
Parameter
BG KNKT
Explanation
Slot number Channel number Channel type
Type
D KF D KY
Assignment
0 to 7 KY = x,y x = 0 to 3 y = 3 to 6 3: Absolute value representation (4 to 20 mA) 4: Unipolar representation 5: Bipolar absolute value 6: Bipolar fixed-point number -32767 to +32767 -32767 to +32767 Not relevant Scaled analog value is "0" on wirebreak "1" on wirebreak, illegal channel or slot number or illegal channel type "1" when nominal range is exceeded
NAME BG KNKT OGR UGR EINZ XA FB BU
STL
: JU FB 250 : RLG:AI : : : : : : : :
OGR UGR EINZ XA FB
Upper limit of the output value Lower limit of the output value Single scan Output value Error bit
D KF D KF I BI QW Q BI
BU
Range violation
Q BI
Scaled range
Representation of the analog input module User scaled range
UGR
OGR Figure 11-11. Scaling Schematic for FB250
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Analog Value Processing
Example: Display of Tank Make-Up Quantity The make-up of a cylindrical tank holding 30 m3 is to be shown on a 3-digit display. The individual www..com digits must be set in BCD. The level of the liquid in the tank is sensed by a SONAR-BERO(R), range 80 to 600 cm, with analog output (see Catalog NS3).
SONAR-BERO
I=4 to 20 mA
PS
CPU AI AQ DQ DQ
80 cm Gap 600 cm Tank Tank level 1 0. 5 m3 3-digit BCD display
Figure 11.12 Schematic for "Display of Tank Make-Up Quantity"
The analog output of the SONAR-BERO delivers a constant current in the range 4 to 20 mA proportional to the gap between sensor and liquid. This current is routed to the 4 to 20 mA analog input module in slot 0, channel 0. FB250 converts the range 4 to 20mA to the range 0 to 30.0 m3. The value is stored in flag word 1 as a fixed-point number. Initialization takes place in the calling block. FB241 converts the fixed-point number into a BCD number.
4 mA
12 mA
20 mA
Nominal range of the analog module Range set by user
0 m3
15.0 m3
30.0 m3
Figure 11-13. Conversion of the Nominal Range into the Defined Range
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Analog Value Processing
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STL
www..com JU FB 250 NAME : RLG:AI BG :0 KNKT : 0.3 OGR : 300 UGR :0 EINZ : XA : FW1 FB :F0.0 BU :F0.1 JU FB 241 ...
Explanation Unconditional call FB250 Slot 0 Channel 0, channel type 3 Upper limit: 30.0 m3 Lower limit: 0.0 m3 No meaning Make-up quantity stored in flag word 1 as fixed-point number "1", if wire break "1", if tank too full Conversion of fixed-point number into BCD number
The BCD number is stored in flag bytes 11 to 13. Output is via two 8-channel digital output modules in slots 2 and 3. The BCD tetrads 5 and 6 stored in flag word 11 need not be output since the number has only three digits. STL
... L FW12 T QW2 BE
Explanation Read tetrads 0 to 3 of the BCD number and transfer to output modules.
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Analog Value Processing
11.6.2
Output of Analog Value - FB251 -
Analog values can be output to analog output modules using this function block. In doing so, values www..com from the range between the lower limit (UGR) and high limit (OGR) parameters are converted to the nominal range of the module in question. Table 11-18. Parameter
XE
Call and Parameter Assignments of FB251 Type
IW
Explanation
Analog value to be output Slot address Channel number Channel type
Assignment
NAME
: JU FB 251 : RLG:AQ : : : : : : : XE BG KNKT OGR UGR FEH BU
Input value (two's complement) in the range UGR to OGR 0 to 7 KY = x,y x = 0;1 y = 0;1 0: unipolar representation 1: bipolar fixed-point number -32767 to +32767 -32767 to +32767 "1" if UGR = OGR, invalid channel or slot, or invalid channel type "1" if XE lies outside limits (UGR; OGR). XE assumes the limit value
BG KNKT
D KF D KY
OGR UGR FEH
Upper limit of the output value Lower limit of the output value Error in limit value setting Input value exceeds UGR or OGR
D KF D KF Q BI
BU
Q BI
Example: Display of Tank Contents on an Analog Measuring Instrument The make-up quantity of a 30 m3 tank is stored in flag word 1 as a fixed-point number (see example FB250). The 20 mA analog output module in slot 1, channel 0, transfers the standardized value to the measuring instrument. The value is displayed within the range 0 to 20 mA.
PS
CPU AQ
Figure 11-14. Schematic for "Display of Tank Contents"
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The tank contents are determined from the make-up quantity.
www..com STL
L KF +300 L FW 1 -F T FW 20 ...
Explanation Maximum tank capacity Make-up quantity Calculate difference Store tank contents in FW20
The UGR and OGR parameters of FB 251 refer to the nominal range of the analog output module. For this reason, the UGR parameter must be assigned the value -30.0.
- 30.0 m3
Tank contents 0.0 m3
30.0 m3
- 20 mA
0 mA
20 mA
Figure 11-15. Transformation of the Analog Value to the Nominal Range
STL
... JU FB251 NAME :RLG:AQ XE BG KNKT OGR UGR FEH BU BE :FW20 :1 :0.1 :300 :-300 :F0.2 :F0.3
Explanation
Unconditional call-up FB251 Tank contents Slot 1 Channel 0, channel type 1 High limit 30.0 m3 Low limit - 30.0 m3 "1", if wire break "1", if tank too full
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12
The Integral Real-Time Clock, for CPU 103 Version 8MA02 and Higher 12.1 12.2 Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1
Setting Parameters in DB1, for CPU 103 Version 8MA03 and Higher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.1 Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.2 Reading the Current Clock Time and the Current Date . . . . . . . . . . 12.2.3 DB1 Parameters Used for the Integral Real-Time Clock . . . . . . . . . . 12.3 12.3.1 12.3.2 12.3.3 12.3.4 12.4 12.5 12.6 Programming the Integral Real-Time Clock in DB1, for CPU 103 Version 8MA03 and Higher . . . . . . . . . . . . . . . . . . . . Setting the Clock in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Setting the Prompt Time in DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . Setting the Operating Hours Counter in DB1 . . . . . . . . . . . . . . . . . Entering the Clock Time Correction Factor in DB1 ............. Structure of the Clock Data Area . . . . . . . . . . . . . . . . . . . . . . . . . . Structure of the Status Word and How to Scan it ..............
12 12 12 12
-
2 2 3 4
12 12 12 12 12
-
5 5 6 7 7 8
12 -
12 - 12
Setting Parameters for the Clock Data Area and the Status Word in the System Data Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Integral Real-Time Clock in the User Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reading and Setting the Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Prompt Function . . . . . . . . . . . . . . . . . . . . . . . . Programming the Operating Hours Counter . . . . . . . . . . . . . . . . . . Entering the Clock Time Correction Factor . . . . . . . . . . . . . . . . . . .
12 - 15
12.7 12.7.1 12.7.2 12.7.3 12.7.4
12 12 12 12 12
-
21 21 25 30 35
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Figures
12-1 DB1 with Default Parameters for Integral Real-Time Clock . . . . . . . . . . . . . 12-2 Example: Setting the Clock in DB1 to Monday, November 9, 1992, 15:30 . . . 12-3 Example: Setting the Prompt Time in DB1 to Thursday, December 17, 1992, 8:00 o'clock ....................... 12-4 Setting the Operating Hours Counter in DB1 to 1600 Hours ............ 12-5 Entering a Correction Factor of +90s in DB1 . . . . . . . . . . . . . . . . . . . . . . . 12-6 How DB1 or the Control Program and the Clock Access the Clock Data Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-7 Flowchart - Transferring Time and Date Settings to the Clock . . . . . . . . . . . 12-8 Flowchart - Transferring a New Prompt Time . . . . . . . . . . . . . . . . . . . . . . . 12-9 Flowchart - Transferring Settings to the Operating Hours Counter . . . . . . . . Tables 12-1 12-2 12-3 12-4 12-5 12-6 12-7 12-8 12-9 12-10 12-11 12-12 12-13 12-14 Reading the Current Clock Time and Current Date . . . . . . . . . . . . . . . . . . . DB1 Parameters for the Integral Real-Time Clock . . . . . . . . . . . . . . . . . . . . Clock Data in the Clock Data Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Range Definitions for Clock Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Significance of Bits 0, 1, 2, and 3 of the Status Word . . . . . . . . . . . . . . . . . Significance of Bits 4 and 5 of the Status Word . . . . . . . . . . . . . . . . . . . . . Significance of the Operating Hours Counter Flags Bits 8, 9, and 10 of the Status Word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Significance of the Prompting Time Flags Bits 12, 13, and 14 of the Status Word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The System Data Area for the Integral Real-Time Clock . . . . . . . . . . . . . . . FB1 Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OB21 Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OB22 Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DB75 Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FORCE VAR Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12 12 12 12 12 12 12 12 12
2 5 6 7 7
-8 - 20 - 26 - 31
12 12 12 12 12 12
-3 -4 -9 - 10 - 13 - 13
12 - 14 12 12 12 12 12 12 12 14 15 17 18 18 18 19
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12
12.1
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The Integral Real-Time Clock, for CPU 103 Version 8MA02 and Higher
Function
The integral real-time clock offers the following possibilities of controlling the process sequence: * * * Clock and calendar function - Used to configure clock-time dependent control, for example Prompt and alarm function - Used to monitor the duration of a process, for example Operating hours counter - Used to monitor inspection intervals, for example
The clock begins running when you supply voltage to the programmable controller. The default is April 1, 1992, 12:00 o'clock. You set the clock by setting its parameters. There are two possibilities. * * With CPU 103 version 8MA03, you can set the clock parameters in DB1 (see section 12.2). With CPU 103 version 8MA02 and higher, you can set the clock parameters in the system data area (see section 12.6) and program the clock in the user program (see section 12.7).
The hardware clock requires a clock data area and a status word in order to function. The location of both the clock data area and the status word must be stored in system data 8 to 10.
Operating Principle of the Clock Data exchange between the integral real-time clock and the control program always goes through the clock data area. The clock stores current values for time, date, and operating hours counter in the clock data area. You can transfer into the clock data area the values for the time, date, prompt time, and operating hours counter that you want the clock to use. You can scan the status word to identify setting errors, for example. Or you can change certain status word bits to deliberately disable or enable transfer or read operations. Refer to sections 12.4 and 12.5 for additional information about the clock data area and the status word. These sections are especially important if you want to set clock parameters in the system data. If you are new to SIMATIC, you may prefer to set clock parameters in DB1.
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12.2
Setting Parameters in DB1, for CPU 103 Version 8MA03 and Higher
Set the clock parameters in DB1 to be able to use the clock functions. Follow the same rules you used in setting parameters for other functions. Refer to section 9.1. Procedures for Setting Parameters in DB1 1. Perform an overall reset. 2. Output default DB1 to the programmer. 3. Use the cursor to jump into the clock parameter block. 4. Change the parameters. 5. Transfer the changed DB1 to the programmable controller. 6. Switch the programmable controller from STOP to RUN. Every time there is a change from STOP to RUN, the programmable controller accepts the new clock data.
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Note
The system data contents are deleted during an overall reset. The clock continues to run internally with the current values. The clock time is updated one second after the next cycle starts.
12.2.1 Defaults
The following values are preset in the parameter block when you output the default DB1.
36: 48: 60: 72: 84: 96: 108: KS KS ='PGN 01 ; #CLP: CF 0 ='CLK DB5 DWO STW '; ';
KS ='MW102 KS ='OHE N KS ='12:00:00 KS KS
STP Y SAV Y '; SET 4 01.04.92 '; TIS 4 ';
='01.04. 13:00:00 OHS '; ='000000:00:00 # ; SDP: WD';
Figure 12-1. DB1 with Default Parameters for Integral Real-Time Clock
After the CLP block ID for the integral real-time clock, the CLK parameter defines the location of the clock data (in DB5 beginning with DW0, for example). The STW parameter specifies the location of the status word (in flag word MW102, for example). You must specify both parameters if you want to read the clock. Section 12.2.2 describes the procedures you must follow to read the clock. Section 12.2.3 lists all of the parameters that you can use for the integral clock.
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12.2.2 Reading the Current Clock Time and the Current Date
Proceed as follows to see how and with which values the clock runs. 1. Perform an overall reset. 2. Output DB1 to the programmer. 3. Overwrite both (#) comment characters with a blank space. 4. Generate DB5 with DW0 to DW21. See Table 12-3 for information about storing the current clock time and current date. 5. Switch the programmable controller from STOP to RUN. The clock accepts the values present in DB1. 6. Enter DB5 and DW0 to DW3 on the programmer by using the FORCE VAR function. 7. Press the "ENTER" key twice. The clock runs using the current values.
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Table 12-1. Reading the Current Clock Time and Current Date Operand
DB 5 DW 0 DW 1 DW 2 DW 3 KH = 0004 KH = 0104 KH = 9212 KH = 0000
Signal States
Explanation
Wednesday October 1 1992, 12:00
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12.2.3 DB1 Parameters Used for the Integral Real-Time Clock
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Table 12-2.
DB1 Parameters for the Integral Real-Time Clock Meaning Clock Parameters p Entering the correction factor (Correction Factor) Location of the clock data (CLocK Data)
Parameters Block ID: CLP: CF CLK
Argument
DBxDWy, MWz,EWv or AWv DBxDWy, MYz,EWv or AWv J/Y/N J/Y/N
STW
Location of the status word (STatus Word)
STP SAV
Updating the clock during STOP (SToP) Saving the clock time after the last change from RUN to STOP or Power OFF (SAVe) Enabling the operating hours counter (Operating Hours counter Enable) Setting the clock time and date
OHE
J/Y/N
SET
wd dd.mm.yy hh:mn:ss1 AM/PM2 wd dd.mm. hh:mn:ss1 AM/PM2 hhhhhh:mn:ss1
TIS
Setting the prompt time (TImer Set)
OHS
Setting the operating hours counter (Operating Hours counter Set) p = - 400 v= 0 x= 2 y= 0 z= 0 j/J = yes y/Y = yes n/N = no to to to to to 400 126 255 255 254
wd dd mm yy hh mn ss hhhhhh
1 2
= = = = = = = =
1 to 7 01 to 31 01 to 12 0 to 99 00 to 23 00 to 59 00 to 59 0 to 999999
(weekday = Sun. - Sat.) (day) (month) (year) (hours) (minutes) (seconds) (hours)
If an argument such as seconds, for example, is not to be entered, enter XX. The clock continues to run
with the current data. The TIS parameter block does not acknowledge this argument. If you enter AM or PM after the clock time, the clock runs in the 12-hour mode. If you omit this argument, the clock runs in the 24-hour mode. You must use the same time mode in the SET and TIS parameter blocks.
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12.3
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Programming the Integral Real-Time Clock in DB1, for CPU 103 and Higher
Sections 12.3.1 to 12.3.4 contain examples for programming the clock in DB1. Adhere to the rules described in chapter 9 for setting parameters when you enter these examples into the programmable controller.
Note
If the programmable controller recognizes a parameter setting error in DB1, the programmable controller remains in the STOP mode even after it has been switched from STOP to RUN. The red LED is lit.
12.3.1 Setting the Clock in DB1
How to set the clock in DB1 1. Perform an overall reset on the programmable controller. 2. Generate DB5 with DW0 to DW21. 3. Output default DB1 to the programmer. 4. Overwrite the comment characters (#) with a blank space. 5. Use the cursor to jump to the CLP parameter block. 6. Enter the example. - Set the clock to the following date: Monday, November 9, 1992, 15:30. Setting the Clock
36: 48: KS KS ='PGN 01 ; CLP: CF 0 ='CLK DB5 DW0 STW '; ';
Explanation The clock data is stored in data block 5 beginning with data word DW0. The status word is located in flag word MW 102. The clock is updated when the programmable controller is in the STOP mode. The clock time is saved in the clock data area. See Table 12-3. After the SET parameter, enter the weekday, the date, and the clock time you want the clock to use when it begins running. Be certain to include the blank spaces. The clock runs in the 24-hour time mode since you do not enter either AM or PM.
60:
KS
='MW102
STP Y SAV Y ';
72:
KS
='OHE N
SET 2 09.11.92 ';
84:
KS
='15:30:00
TIS 4
';
Figure 12-2. Example: Setting the Clock in DB1 to Monday, November 9, 1992, 15:30 7. Transfer the changed DB1 to the programmable controller. 8. Switch the programmable controller from STOP to RUN. Each time the programmable controller is switched from STOP to RUN, it accepts the new clock data.
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12.3.2 Setting the Prompt Time in DB1
How to set the prompt time in DB1 1. Perform an overall reset on the programmable controller. 2. Generate DB5 with DW0 to DW21. 3. Output default DB1 to the programmer. 4. Overwrite the comment characters (#) with a blank space. 5. Use the cursor to jump into the CLP parameter block. 6. Enter the example. - Set the clock to the following prompt time: Thursday, December 17, 1992, 8:00 o'clock. Setting the Prompting Time
36: 48: 60: KS KS KS ='PGN 01 ; CLP: CF 0 ='CLK DB5 DW0 STW ='MW102 '; ';
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Explanation The clock data is stored in data block 5 beginning with data word DW0. The status word is located in flag word MW 102. The clock is updated when the programmable controller is in the STOP mode. The clock time is saved in the clock data area. See Table 12-3. After the parameter for TIS, enter the weekday, date and time to initiate the prompt time. You can enter the parameter for the clock mode. The clock runs in the 24-hour time mode.
STP Y SAV Y ';
84: 96:
KS KS
='12:00:00
TIS 5
'; OHS ';
='17.12. 08:00:00 PM
Figure 12-3. Example: Setting the Prompt Time in DB1 to Thursday, December 17, 1992, 8:00 o'clock 7. Transfer the changed DB1 to the programmable controller. 8. Switch the programmable controller from STOP to RUN. Each time the programmable controller is switched from STOP to RUN, it accepts the new clock data.
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12.3.3
Setting the Operating Hours Counter in DB1
How to set the operating hours counter in DB1 1. Perform an overall reset on the programmable controller. 2. Generate DB5 with DW0 to DW21. 3. Output default DB1 to the programmer. 4. Overwrite the comment characters (#) with a blank space. 5. Use the cursor to jump to the CLP parameter block. 6. Enter the example. - You are setting the start value for the operation hours counter to 1600 hours. Setting the Operating Hours Counter
36: 48: 60: KS KS KS ='PGN 01 ; CLP: CF 0 ='CLK DB5 DW0 STW ='MW102 '; ';
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Explanation The clock data is stored in data block 5 beginning with data word DW0. The status word is located in flag word MW 102. The clock is updated when the programmable controller is in the STOP mode. The clock time is saved in the clock data area. See Table 12-3. The operating hours counter is enabled.
STP Y SAV Y ';
72: . . . 96: 108:
KS
='OHE Y
SET 4 01.04.92 ';
KS KS
='01.04. 13:00:00 ='001600:00:00
OHS '; ; SDP: WD';
After the OHS parameter, enter the start value for the operating hours counter.
Figure 12-4. Setting the Operating Hours Counter in DB1 to 1600 Hours 7. Transfer the changed DB1 to the programmable controller. 8. Switch the programmable controller from STOP to RUN. Each time the programmable controller is changed from STOP to RUN, it accepts the new clock data.
12.3.4
Entering the Clock Time Correction Factor in DB1
The exactness of the clock is temperature-dependent. You can configure a correction value to increase the clock's exactness. The correction value is output in s/month. You must measure how many seconds per month the clock runs fast or slow. A month is defined as 30 days. Example: Your measurements indicate the clock is 12 s too slow in 4 days. That would be 90 s too slow in 30 days. The correction value is +90 s/month. In addition to the changed clock parameters, enter the example into DB1 as follows: Enter the Clock Time Correction Factor
36: KS ='PGN 01 ; CLP: CF +90 ';
Explanation The correction value of +90 s is loaded into the clock.
Figure 12-5. Entering a Correction Factor of +90 s in DB1
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12.4
Structure of the Clock Data Area
You need only to change the default values in DB1 to program the clock in DB1. See section 12.2. During start-up, the DB1 interpreter writes all information into the system data area. TIP: Do not attempt to set parameters in the system data, or to access directly from the user program unless you have extensive knowledge of the system.
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You must store the location of the clock data area in system data 8 and 9. Data exchange between DB1 or the control program and the integral real-time clock is always through the clock data area. * * The integral real-time clock stores current time, date, and operating hours counter values in the clock data area (flag area, data block, input area, or output area). DB1 and the control program store the settings for prompt times and operating hours counters in the same data area.
The control program can only read from or write to the clock data area. The control program can never access the clock directly. Figure 12-6 illustrates the relationship between DB1 or the control program, the clock data area, and the integral real-time clock. Clock data area Current clock time/date (words 0 to 3) Settings clock time/date (words 4 to 7) DB1/ Control program Prompt time (words 8 to 11) Current operating hours count (words 12 to 14) Settings operating hours counter (words 15 to 17) Clock time/date of the last switch from RUN to STOP (words 18 to 21)
Reading clock data The clock writes clock data in the clock data area The clock accepts the settings from the clock data area
Integral realtime clock
Transferring settings
Figure 12-6. How DB1 or the Control Program and the Clock Access the Clock Data Area
12-8
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When you set the clock, you have to transfer only the data needed to implement a particular function. For example, if you want to change only the clock function data, you do not have to enter data for the time prompt function or for the operating hours counter.
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The clock data area has the same structure wherever it is located: in the data block area, the flag area, the input area, or the output area. Table 12-3 provides you with information about where specific clock data is located within the clock data area. The explanations for Table 12.3 follow the table. Table 12-3. Clock Data in the Clock Data Area Clock Data Area (Data Word) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 * ** Clock time/date after a switch from RUN to STOP or Power OFF (only if bit 5 in the status word = 1) Settings for operating hours counter Current operating hours Time prompt Settings for clock time/date Meaning Current clock time/date Left Flag Word Right Flag Word
--Day Year Minute Leap year* Day Year Minute --Day --Minute --Minutes Hours * 100 --Minutes Hours * 100 --Day Year Minute
Weekday Month AM/PM (Bit 7) Hour Second Weekday Month AM/PM (Bit 7)** Hour Second Weekday Month AM/PM (Bit 7)**Hour Second Second Hour Hours * 10,000 Second Hours Hours * 10,000 Weekday Month AM/PM (Bit 7)** Hour Second
Relevant when programming the clock in the user program (see Table 12-4) Significant only in the 12-hour mode Bit 7=1 means PM, bit 7=0 means AM
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Make certain you are aware of the following points when you make inputs into the clock data area. * * * Entries into the clock data area must be in BCD code. The clock runs either in the 12-hour mode or the 24-hour mode depending on how you set bit 1 in the status word. See section 12-5 for additional information. The AM/PM flag (0 = AM, 1 = PM) is significant only for the 12-hour mode of the hardware clock. The AM/PM flag corresponds to bit 7 in words 2, 6, 10, and 20. In the 12-hour mode, you have to set the hours and the AM/PM flag for both the clock and prompt functions. In the 24-hour mode, if you set an AM/PM flag when you enter the values for the clock and prompting time, then the program sets the relevant error bit.
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* *
Leap year settings are only relevant when the clock is programmed in the user program. If DB1 is used, the leap year settings are carried out automatically by the system. The clock settings you enter must be within the range defined in Table 12-4. Table 12-4. Variable Seconds Minutes Hours Range Definitions for Clock Data Variable Day Month Year Leap Year Permissible Parameters 1 to 31 1 to 12 0 to 99 0 to 3 0 = Leap year is current year 1 = Leap year was last year 2 = Leap year was two years ago 3 = Leap year was three years ago
Permissible Parameters 0 to 59 0 to 59 In the 24-hour mode: 0 to 23 In the 12-hour mode: for AM: 1 to12 (12 = 12 o'clock noon) for PM: 81 to 92 (81 = 1 o'clock PM) 0 to 999999 when entering the operating hours 1 to 7 1=Sunday 2=Monday 3=Tuesday 4=Wednesday 5=Thursday 6=Friday 7=Saturday
Weekday
12-10
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If your inputs differ from the ones described, the operating system outputs error messages that are displayed in the status word. The operating system resets error messages displayed in the status word the next time you set the clock, prompt time, or the operating hours counter, if the new www..com settings are within the definition range. See section 12.5. If you do not wish to modify one of the setting values, you can enter at its place XX (ASCII code) in DB1, or FF (hexadecimal code) when you are programming in the system data. If the clock data area is located at the end of other areas (flags, data blocks, inputs, and outputs) and there is insufficient memory space available for the clock data area, the amount of clock data transferred is only as much as will fit in the area available. Settings are not accepted if they lie outside of the available space. * If clock data is located in the non-retentive flag area, then the following two events occur: - All the settings are lost after Power OFF and cold restart. - The time the last switch from RUN to STOP occurred is lost. * Remember that you can decide where to locate the clock data area. The word numbers listed in Table 12-3 are relative. - If your clock data area is located in a data block and does not begin with data word DW0 but DWX, then you must add the value X to the word number shown in Table 12-3. Example: Your clock data area begins with DW124. The data for the time and date is then stored in DW124 to DW127.
- If you locate your clock data area in the flag area beginning with flag word 0, then you must multiply the appropriate data word number listed in Table 12-3 by a factor of 2 to obtain the appropriate flag word address. Example: You locate your clock data area in the flag operand area beginning with flag word 0. Data for the operating hours counter is then stored beginning with the FW24 address.
- If your clock data area does not begin at flag word 0, you have to add the beginning value to the word number shown in Table 12-3.
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12.5
Structure of the Status Word and How to Scan it
You can scan the status word to identify errors in the entered settings. You can deliberately change certain bits in the status word to enable or disable transfer or read operations. You can use designated flag bits to govern the clock's behavior when the programmable controller is switched from the RUN to the STOP mode or during Power OFF. * The status word can be located in the flag area or in a data block. You must define the location of the status word in DB1 or directly in system data 9 and 10. See section 12.6. The integral real-time clock runs independently of the set operating mode. Access to the clock data area depends on the set operating mode and the signal states of bits 4 and 5 in the status word. You can set or reset these bits using the "S" or "R" operations in the control program. If you use an operator panel, such as the OP 396, to monitor the program, it is an advantage to have the programmable controller update the clock time (the current date) even in the STOP mode.
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*
*
The operating system resets the "transfer settings" bits (bits 2, 10, and 14 in the status word) under the following conditions. The settings have been transferred. The settings have not been transferred because they were outside of the permissible range. The corresponding error bits (bits 0, 8, and 12 in the status word) are set.
*
The operating system does not reset the "transfer settings" bits (bits 2, 10, and 14 in the status word) under the following conditions. The system data for the clock is either incorrect or not available. The clock data area is too small. The clock is defective (hardware error).
*
There are four types of bits in the status word. Clock flags Operating system flags Operating hours counter flags Prompt time flags
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Tables 12-5 through 12-8 provide you with information about the significance of the signal states of the respective flags. Clock Flags
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Table 12-5. Bit Number 0 1 2 3
Significance of Bits 0, 1, 2 and 3 of the Status Word Meaning Error in setting entry No error in setting entry 12-hour clock mode 24-hour clock mode Transfer settings Do not transfer settings The clock time can be read The clock time cannot be read
Signal State 1 0 1 0 1 0 1 0
Operating System Flags Table 12-6. Operating Mode STOP Bit Number Status Word 4 Significance of Bits 4 and 5 of the Status Word Signal State 1 Meaning
The clock updates only words 0 to 3 (current time/date) in the clock data area. You can set the clock by using the FORCE VAR programmer function. The clock does not update the clock data area. Words 0 to 3 contain the time at which the last switch from RUN to STOP occurred. Words 18 to 21 contain the time at which the last RUN to STOP switch occurred or the time at which the last Power OFF occurred if bit 4 is also set.
0
5
1
0 RUN 4 5 1/0 1
Words 18 to 21 are not used. The clock continually updates the clock data area (Words 0 to 17). Words 18 to 21 contain the time at which the last switch from RUN to STOP occurred or the time at which the last Power OFF occurred. Words 18 to 21 are not used.
0
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Operating Hours Counter Flags Table 12-7.
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Significance of the Operating Hours Counter Flags Bits 8, 9, and 10 of the Status Word Signal State 1 0 1 0 1 0 Error in setting entry No error in setting entry Enable the operating hours counter Disable the operating hours counter Transfer the settings Do not transfer the settings Meaning
Bit Number 8 9 10
Prompt Time Flags Table 12-8. Bit Number 12 13 14 Significance of the Prompt Time Flag Bits 12, 13, and 14 of the Status Word Signal State 1 0 1 0 1 0 Error in setting entry No error in setting entry The set prompting time is reached The set prompting time is not reached Transfer the settings Do not transfer settings Meaning
The operating system requires bit numbers 6, 7, 11, and 15. You can not use these bits.
Scanning the Status Word In a data block, you can use the "P " operation to scan the individual bits of a data word. In the flag area, you can scan the individual bits if you enter the and the . Example: The status word is stored in DW13. You are checking to see if the set prompt time has been reached. The "P D 13.13" instruction triggers a scan. If the status word is stored in FW12, then the same scan would be "A F 12.5".
Backup of the Hardware Clock If there is a backup battery, the clock continues to run even after Power OFF. If the programmable controller does not have a backup battery, the clock values will be set at "April 1, 1992, 12.00.00 o'clock, weekday: 4" when the clock is initialized after a Power ON. The default is the 24-hour time mode. You should install a battery only during Power ON; otherwise, you would lose the clock data.
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12.6
Setting Parameters for the Clock Data Area and the Status Word in the System Data Area
Table 12-9. The System Data Area for the Integral Real-Time Clock Meaning Operand area for the clock data Start address for the clock data Operand area D Operand Areas I, Q, F 9 Start address for the clock data Relevant only for operand area D Operand area for the status word 10 Start address for the status word Operand area D Operand areas I, Q, F Start address for the status word Relevant only for operand area D 11 Status for hardware1 (only bits 0 and 1 are relevant) * If either bit 0 or bit 1 is set, the clock chip is defective * If no bit is set, the clock chip is running Incorrect correction value? (only bit 15 is relevant) * If bit 15 is set, the correction value is incorrect (>+400 or <- 400) * If bit 15 is not set, the correction value is correct Correction value2 Permissible Parameters ASCII characters I, Q, F, D DB number DB2 to DBFFH Byte address DB word number DW0 to DWFFH ASCII characters I, Q, F, D DB number DB2 to DBFFH Byte address DB word number DW0 to DWFFH "0", "1"
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Absolute Address RAM
System Data Word 8
EA10 EA11
EA12
EA13 EA14
EA15
EA16
EA16
11
"0", "1"
EA18
12
- 400 to 400
1 You can scan SD11 during start-up. You must call up an FB in OB21 or OB22 by using "L RS 11" to read out and then continue processing SD11. 2 Always use the "L KF X" instruction to load the correction value in ACCU 1 since negative values can also be specified.
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The following section is intended to help you to start running the integral real-time clock as quickly as possible by setting parameters in the system data. You need to be familiar with the clock data area described in sections 12.4 and 12.5 in order to understand this section.
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Note
The clock time is updated one second after the start of the next cycle.
Task: You want to set the clock to the following values: Wednesday, 12.02.92; 10:30:00 The status word is assigned to flag word FW12. Clock data is stored in DB75 beginning with DW0. The two ways to transfer clock settings are as follows: * * Use the STATUS VAR programmer function when the programmable controller is in the RUN mode. Use the FORCE VAR programmer function when the programmable controller is in the STOP mode and status word bit 4 = 1.
The following example uses the first method. Proceed as follows: 1. Set the programmable controller to Power OFF. 2. Set the operating mode switch to STOP. 3. Set the programmable controller to Power ON. 4. Perform an overall reset on the programmable controller. See section 4.1.3. 5. Use the following program to program the programmable controller. 6. Set the operating mode switch to RUN. The integral real-time clock is running. Program Structure: The system data is defined during the change from STOP to RUN. The system data is defined when the programmable controller is switched on.
OB21
FB1
OB22
FB1
FB1
DB75
Set the new date and time.
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The Block Entry Sequence and a Programming Example: The following procedure is suggested:
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1. Program FB1 2. Program OB21 3. Program OB22 4. Generate DB75
- Defining system data for the integral real-time clock - Calling up FB1 during a change from STOP to RUN - Calling up FB1 when the programmable controller is switched on - Storing clock data
5. Transfer new data to the clock using the FORCE VAR programmer function (programmable controller in the RUN mode) . The respective programming examples are shown in Tables 12-10 to 12-14. Table 12-10. STL
FB 1 NAME: CLOCK
FB1 Program Explanation
Meaning
ASCII Code for the "D" character
L KH 444B
Block number "75D"
T RS 8
Storing in system data word 8 DW0 is the start address for clock data
Clock data is located in DB75 beginning with DW0
L KH
004D
ASCII Code for the "M" Character
T RS 9
Storing in system data word 9 Flag word Number "12D"
The status word is located in FW12
L KH
0C
00
ASCII Code is irrelevant
T BE RS 10
Storing in system data word 10
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Table 12-11.
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OB21 Program Explanation
STL
OB 21 JU FB 1 NAME: BE
CLOCK
The function block is called up once during a switch from STOP to RUN.
Table 12-12. STL
OB 22 JU FB 1 NAME: BE
OB22 Program Explanation
CLOCK
The function block is called up once when the programmable controller is switched on.
Table 12-13. STL
DB 75 0: KH = 0000; 1: KH = 0000; 2: 3: 4: 5: 6: 7: KH = 0000; KH = 0000; KH = 0000; KH = 0000; KH = 0000; KH = 0000
DB75 Program Explanation
Define the number of data words. (Data words 0 to 7 are used in the example. See Table 12-3) . Define the numerical representation. Hex is used in the examples.
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Reading and Setting the Time and Date After you enter the program, you can test it as follows.
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1. Switch the programmable controller to the RUN mode. 2. Use the FORCE VAR programmer function to enter the following. Data block number Data words DW0 to DW7 Clock data Status word Table 12-14. Operand
DB 75 DW 0 DW 1 DW 2 DW 3 DW 4 DW 5 DW 6 DW 7 FW 12 KH = 0003 KH = 0110 KH = 9112 KH = 0000 KH = 0002 KH = 0212 KH = 9210 KH = 3000 KM = 00000000 00000100
FORCE VAR Function Explanation
Signal States
Tuesday October 1 1991, 12 o'clock (reading current clock data) Monday December 2 1992, 10.30 o'clock (writing new settings) If you set bit 2 in the status word to "1", the new settings are transferred to the clock.
3. Begin status processing by pressing the ENTER key twice. Bit 2 in the status word is reset. The clock runs with the new settings
Note
Besides using the method described in Table 12-14 (with the FORCE VAR function), you can also enter the new settings directly into the data block. In that case, store the new settings in data words DW4 to DW7 of data block DB75. See Table 12-13.
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Write the settings into the clock data area
Set transfer bit 2 in the control program * Wait approximately two seconds (entering a wait program)
Possible errors: - Clock is not available. - Clock system data is incorrect or not available. - Clock data area is too small. - Clock is defective.
yes
Status Word Bit 2=1 no
Status Word Bit 0=1 no
yes
Incorrect settings
The clock cannot be used. Eliminate the errors.
The clock runs with the new settings.
The clock continues running with the old values.
* The lower portion of the flowchart has only a diagnostic function. There is nothing you must perform.
You can also implement the upper portion of the flowchart using the FORCE VAR programmer function (programmable controller in the RUN mode) or using the FORCE function (the programmable controller is in the STOP mode and bit 4 = 1 in the status word).
Figure 12-7. Flowchart - Transferring Time and Date Settings to the Clock
If you do not want a value (for example the minutes) in the settings to be transferred, enter the value for relevant byte as either 255D or FFH. When you set the clock, the old value present in the clock is retained. Incorrect settings are displayed by a set bit 0 in the status word. The clock continues to run with the old values. In a similar manner, you can program new settings for the time prompt function and the operating hours counter. However, the settings are located in other data words in the clock data area. See section 12-4. You must set the respective bit to 1 in the status word so that the clock can accept the new settings. See section 12-5.
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12.7
Programming the Integral Real-Time Clock in the User Program
The programming of the clock in the user program should be performed only by users with extensive knowledge of the system. For all other users, use of DB1 is recommended (see sections 12.2 and 12.3). The following section provides you with information on how to access the clock through the user program.
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12.7.1 Reading and Setting the Clock
Example: Program for setting the time and date
Transfer of the settings for the time and date is triggered by input I 0.0. Before you set input I 0.0 (see OB1), you must transfer these settings to flag bytes FY120 to FY127. Values that you do not want to change must be preset with "FFH". You can define the clock mode with input I 1.0(1= 12hour mode). Input I 0.1 is the AM/PM bit that you use for setting the 12-hour mode. The clock data area is in DB2 beginning with DW0, and the status word is FW10. OB1 STL
: : : : : :A :S :JU I F FB 0.0 20.0 10
Explanation
================================ SETTING THE TIME AND DATE ================================ FIRST TRANSFER TIME AND DATE VALUES INTO FB120 TO FB127. CLOCK SETTING TRIGGERED BY SETTING F 20.0 (RESET IN FB10) (SETTING THE TIME AND DATE) WEEKDAY DAY MONTH YEAR HOUR AMPM-BIT (ONLY IMPORTANT IN 12-HOUR MODE) MINUTES SECONDS ERROR BIT 12-HOUR MODE: I 1.0 = 1
NAME :SET CLOCK WDAY : FY 121 DAY : FY 122 MON : YEAR : HOUR : AMPM MIN SEC ERR : : : : FY 123 FY 124 FY 125 I 0.1 FY 126 FY 127 F 12.1 I 1.0
MODE : :BE
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NAME :SET CLOCK DES DES DES DES DES DES DES DES DES DES :WDAY :DAY :MON :YEAR :HOUR :AMPM :MIN :SEC :ERR :MODE :A := :AN :JC :R : :C :L :T :L :T :L :T :L :T :L :ON :ON :JC :L :OW MORN :T :L :T :L :T :AN :S :L =MODE
FB10 STL
I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: Q I/Q/D/B/T/C: I BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BI BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BI BI/BY/W/D: BI
Description
SETTING THE CLOCK
24HR-MODE = 0, 12HR-MODE = 1 (CLOCK MODE STATUS WORD BIT 1) FLAG IS RESET IF SETTINGS ALREADY READ INTO CLOCK DATA AREA
F 11.1 F 20.0 =M001 F DB 20.0 2
CLOCK DATA AREA STORE VALUE FOR WEEKDAY STORE VALUE FOR DAY STORE VALUE FOR MONTH STORE VALUE FOR YEAR STORE VALUE FOR HOUR IF 12-HOUR MODE IS SET, AND AM/PM BIT = 1 (AFTERNOON), THE RELEVANT BIT IN THE CLOCK AREA IS SET
=WDAY DR 4 =DAY DR 5 =MON DR 5 = YEAR DL 6 =HOUR =AMPM =MODE =MORN KH 0080 DR 6
=MIN DL 7 =SEC DR 7 F 11.2 F 11.2 KT 020.1 10 10
STORE VALUE FOR MINUTES STORE VALUE FOR SECONDS TRANSFER SETTINGS (STATUS WORD IS FW10) START MONITORING TIME BEC, IF MONITORING TIME NOT YET ELAPSED
:SE T M001 :A T :BEC
.
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:AN F
(continued)
Explanation
HAVE SETTINGS BEEN TRANSFERRED? IF YES, JUMP TO M002 SET ERROR BIT IF THERE ARE ERRORS WERE THERE ERRORS WHILE ENTERING SETTINGS? IF NO, RESET ERROR BIT IF NO ERROR, THEN BEC IF AN ERROR, SET ERROR BIT
11.2
:JC =M002 :S =ERR :BEU M002 :AN F 11.0 :RB =ERR :BEC :S =ERR :BE
Example:
Program for reading the current time and the current date
The time is stored in flag bytes FY30 to FY36, depending on an external event, simulated here by a positive edge at input I 0.5. Flag F 13.1 indicates which mode the clock is operating in. Flag F 13.0 is the AM/PM bit in the 12-hour mode The clock data area is in DB2 beginning with DW0, and the status word is FW10.
OB1 STL
: : : :A :AN := :A := : :A
Explanation
================================ READING TIME AND DATE ================================ TIME AND DATE ARE STORED IN FY30 TO FY36 IN CASE OF A POSITIVE EDGE AT I 32.5. (EXTERNAL EVENT)
I F F I F F
0.5 0.1 0.0 32.5 0.1 0.0
EDGE TRIGGER FLAG (READING TIME AND DATE) WEEKDAY DAY MONTH YEAR HOUR F 13.0 = 1, AFTERNOON IN 12H-MODE MINUTES SECONDS F 13.1 = 1, IN 12-HOUR MODE
:JC FB 13 NAME :READ CLOCK WDAY : FY 30 DAY : MON : YEAR : HOUR : AMPM : MIN : SEC : MODE : :BE FY FY FY FY F FY FY F 31 32 33 34 13.0 35 36 13.1
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NAME :READ CLOCK DES DES DES DES DES DES DES DES DES :WDAY :DAY :MON :YEAR :HOUR :AMPM :MIN :SEC :MODE
FB13 STL
I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: Q Q Q Q Q Q Q Q Q BI/BY/W/D/:BY BI/BY/W/D/:BY BI/BY/W/D/:BY BI/BY/W/D/:BY BI/BY/W/D/:BY BI/BY/W/D/:BI BI/BY/W/D/:BY BI/BY/W/D/:BY BI/BY/W/D/:BI
Explanation
READING THE CLOCK
:C :L :T :L :T :L :T :L :T :L :L :AW :T :TB := :L :T :L :T :A := :BE
DB
2 WEEKDAY DAY MONTH YEAR HOUR ERASE AM/PM BIT (ONLY RELEVANT IN 12-HOUR MODE) DISPLAY AM/PM BIT (ONLY RELEVANT IN 12-HOUR MODE) MINUTE SECOND DISPLAY CLOCK MODE MODE = 1, IN 12-HOUR MODE
DR 0 =WDAY DL 1 =DAY DR 1 =MON DL 2 =YEAR DR 2 KH 007F =HOUR D 2.7 =AMPM DL 3 =MIN DR 3 =SEC F 11.1 =MODE
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Storing the Updated Time/Date after a RUN to STOP Switch
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Note
This clock data area is only written to if the following requirements are met. * Bit 5 in the status word is set to "1". * A RUN to STOP switch or a Power OFF has taken place. * The necessary memory space is available in the operand area. This enables you to detect a RUN to STOP switch or a Power OFF even if the programmable controller has since gone back to RUN mode. The time and date of the last RUN to STOP switch or Power OFF are in words 18 to 21 (see Table 12-3) If several RUN to STOP switches have occurred before you read out this clock data area, you will only be able to determine the time of the last switch. If you do not have sufficient memory for this clock data area, you either cannot use this area or use only part of it. This has no impact on anything else.
12.7.2 Programming the Prompt Function
Transferring Settings to the Clock * * You can store the settings in the clock data area by using transfer operations (see Table 12-3). The AM/PM flag (bit number 7) is only significant in 12-hour mode. Bit 7=1 means PM Bit 7=0 means AM You must transfer the clock data in BCD code. TIP: The "KC" data format loads a BCD constant into ACCU 1 and is therefore especially suitable. * If you enter the value "255D" or "FFH" in a byte as the prompt time, this byte will be ignored when evaluating "Prompt time reached". This makes it easy to program, for example, an alarm that is repeated daily by entering the value in the "255D" or "FFH"in the "Weekday", "Date" and "Month" settings. You can transfer the prompt time settings to the clock by initiating bit 14 in the status word. The settings are transferred 1 second after the start of the next cycle. Bit 12 in the status word displays incorrect settings.
*
* * *
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Write the settings into the clock data area
Set transfer bit 14 in the control program
*
Wait about two seconds (entering wait program)
Possible errors: - Clock is not available. - Clock system data is incorrect or not available. - Clock data area is too small. - Clock is defective.
yes Bit 14=1
no yes Bit 12=1 no Settings incorrect
The clock cannot be used. Correct the error.
Clock runs with the new settings for prompt time.
Prompt time function is turned off.
*
The lower part of the flow chart has only a diagnostic function. There is nothing you must perform.
Figure 12-8. Flowchart - Transferring a New Prompt Time
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Prompt Time Sequence *www..com word is set after the prompt time has elapsed. Bit 13 in the status * * Bit 13 remains set until you reset it in the control program. The prompt time can be read at any time.
!
Caution
If the prompt time is reached in the STOP mode or during Power OFF, the prompt time cannot be evaluated. It is always deleted on restart.
Example:
Setting and evaluating the prompt time
In the example program, the status of input I 0.6 determines whether the settings for the prompt time are transferred. Before setting input I 0.6, you must transfer the settings to flag bytes FY130 and FY135. Enter values that you do not wish to be evaluated as FFH. You set the clock mode with input I 1.0. Use input I 0.1 to specify the the AM/PM bit for 12-hour mode. If the preset prompt time has been reached, set flag F 13.2. If errors are made while entering the prompt time, the error bit, flag F 12.2, is set. The clock data is stored in DB2 beginning with data word DW0, and the status word is flag word FW10.
OB1 STL
: : : : : :A :S :JU I F FB 0.6 20.1 11
Explanation
========================================= SETTING AND EVALUATING THE PROMPT TIME ========================================= LOAD VALUES INTO FY130 TO FY135 FIRST. TRIGGER SETTING OF PROMPT TIME BY SETTING F 20.1 (RESET IN FB11) (SET AND EVALUATING PROMPT TIME) WEEKDAY DAY MONTH HOUR AMPM-BIT (ONLY IMPORTANT IN 12-HOUR MODE) MINUTES SECONDS ERROR BIT DISPLAYS THAT PROMPT TIME IS REACHED. 12-HOUR MODE: I 33.0 = 1
NAME :SET PROMPT TIME WDAY : FY 130 DAY : FY 131 MON : HOUR : AMPM : MIN SEC ERR : : : FY 132 FY 133 I 0.1 FY 134 FY 135 F 12.2 F I 13.2 1.0
ALRM : MODE : :BE
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DES DES DES DES DES DES DES DES DES DES :WDAY :DATE :MON :HOUR :AMPM :MIN :SEC :ERR :ALRM :MODE :A := :A :S :R : :AN :JC :R : :C :L :T :L :T :L :T =MODE
FB11 STL
I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: I I/Q/D/B/T/C: Q I/Q/D/B/T/C: Q I/Q/D/B/T/C: I BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BI BI/BY/W/D: BY BI/BY/W/D: BY BI/BY/W/D: BI BI/BY/W/D: BI BI/BY/W/D: BI
Explanation
SETTING THE PROMPT TIME
NAME :SET PROMPT TIME
24 HOUR MODE = 0, 12 HOUR = 1 (SET CLOCK MODE) DISPLAY PROMPT TIME REACHED (BIT 13 IN STATUS WORD) RESET BIT AFTER EVALUATION FLAG IS RESET IF SETTINGS HAVE ALREADY BEEN READ INTO THE CLOCK DATA AREA
F 11.1 F 10.5 =ALRM F F 10.5 20.1
=M001 F 20.1 DB 2 =WDAY DR 8 =DAY DL 9 =MON DR 9
CLOCK DATA AREA STORE VALUE FOR WEEKDAY STORE VALUE FOR DATE STORE VALUE FOR MONTH
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:L :ON :ON :JC :L :OW MORN :T :L :T :L :T :AN :S :L =HOUR =AMPM
FB11 STL (continued)
Description
STORE VALUE FOR HOURS IF AM/PM = 1 (AFTERNOON) AND 12-HOUR MODE IS SET, THE CORRESPONDING BIT IN THE CLOCK DATA AREA IS SET
=MODE =MORN KH 0080 DR 10 =MIN DL 11 =SEC DR 11 F 10.6 F 10.6 KT 020.1 11 11
STORE VALUE FOR MINUTES STORE VALUE FOR SECONDS TRANSFER SETTINGS (BIT 14 IN STATUS WORD FW10) START MONITORING TIME BEC, IF MONITORING TIME NOT YET ELAPSED HAVE SETTINGS BEEN TRANSFERRED? IF YES, JUMP TO M002 IF ERROR, SET ERROR BIT ERROR WHEN ENTERING SETTINGS? IF NO, RESET ERROR BIT BEC, IF NO ERROR IF ERROR, SET ERROR BIT
:SE T M001 :A T :BEC
:AN F 10.6 :JC =M002 :S =ERR :BEU M002 :AN F 10.4 :RB =ERR :BEC :S :BE =ERR
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12.7.3 Programming the Operating Hours Counter
You can enable the operating hours counter with bit 9 of the status word. This allows you to establish, for example, the number of hours a motor has been in operation. The operating hours counter is active only in the RUN mode.
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Transferring Settings to the Operating Hours Counter You can preset the operating hours counter with a certain start value (e.g. after exchanging the CPU). * The clock data must be transferred in BCD code. TIP: The "KC" data format loads a BCD constant into ACCU 1 and is therefore especially suitable for entering the settings. * * * If you do not want a value (for example minutes) to be transferred, entering the relevant byte as "255D" or "FFH". The current value for this variable is then retained. After you have transferred the settings to the clock data area, you must set bit 10 in the status word for the clock to accept the clock data. Bit 8 in the status word displays incorrect settings.
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Write the settings into the clock data area
Set transfer bit 10 in the control program * Wait about two seconds (entering a wait program) Possible errors: - Clock is not available. - Clock system data is incorrect or not available. - Clock data area is too small. - Clock is defective.
yes
Status word Bit 10=1 no Status word Bit 8=1 no yes Settings incorrect
The operating hours counter cannot be used. Correct the errors.
The operating hours counter runs with the new settings.
The operating hours counter continues to run with old values.
* The lower part of the flow chart has only a diagnostic function.
There is nothing you must perform.
Figure 12-9. Flowchart - Transferring Settings to the Operating Hours Counter
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Example: Setting the operating hours counter The status of input I 0.7 determines whether the operating hours counter values are transferred. You must transfer these values to flag bytes FY136 to FY140 before setting input I 0.7 (not implemented in the example program). Values that are not to be changed should be preset with FFH. Errors are displayed in flag F 12.3. The clock data area is in data block DB2 beginning with data word DW0, and the status word is flag word FW10.
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OB1 STL
: : : : : :A
Explanation
=================================== SETTING THE OPERATING HOURS COUNTER =================================== LOAD VALUES INTO FY136 TO FY140
I
0.7 20.2 12
TRIGGER TRANSFER OF SETTINGS FOR OPERATING HOURS COUNTER BY SETTING F 20.2 (SETTING THE OPERATING HOURS COUNTER) SECONDS MINUTES HOURS HOURS X 100 ERRORS X 10000 ERROR BIT
:S F : :JU FB
NAME :SET OPER. HOURS COUNTER SEC : FY 136 MIN : FY 137 HOUR0: HOUR2: HOUR4: ERR : :BE FY 138 FY 139 FY 140 F 12.3
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DES DES DES DES DES DES :SEC :MIN :HOUR0 :HOUR2 :HOUR4 :ERR :AN :JC :R : :C :L :T :L :T :L :T :L :T :L :T :AN :S :S : :L
FB12 STL
I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I/Q/D/B/T/C: I I I I I Q BI/BY/W/D: BI/BY/W/D: BI/BY/W/D: BI/BY/W/D: BI/BY/W/D: BI/BY/W/D: BY BY BY BY BY BI
Explanation
SETTING THE OPERATING HOURS COUNTER
NAME :SET OPER. HOURS COUNTER
F 20.2 =M001 F DB 20.2 2
FLAG IS RESET IF SETTINGS ALREADY READ INTO THE CLOCK DATA AREA CLOCK DATA AREA STORE VALUE FOR SECONDS STORE VALUE FOR MINUTES STORE VALUE FOR HOURS STORE VALUE FOR HOURS X 100 STORE VALUE FOR HOURS X 1000 TRANSFER SETTINGS (BIT 10 IN STATUS WORD FW 10) ENABLE OPERATING HOURS COUNTER IF NOT ALREADY ENABLED START MONITORING TIME BEC IF MONITORING TIME NOT YET ELAPSED HAVE SETTINGS BEEN TRANSFERRED? IF YES, JUMP TO M002 IF ERROR, SET ERROR BIT ERROR WHEN ENTERING SETTINGS? IF NO, RESET ERROR BIT BEC IF NO ERROR IF ERROR, SET ERROR BIT
=SEC DR 15 =MIN DL 16 =HOUR0 DR 16 =HOUR2 DL 17 =HOUR4 DR F F F 17 10.2 10.2 10.1
KT 020.1 12 12 10.2
:SE T M001 :A T :BEC :AN F
:JC =M002 :S =ERR :BEU M002 :AN F 10.0 :RB =ERR :BEC :S :BE =ERR
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Reading the Current Operating Hours Counter
www..com The current data is stored in words 12 to 14 of the clock data area. You can use load operations to read out the data.
Example:
Reading the operating hours counter
You need to switch off a machine for inspection after every 300 hours of operation. Flag F 12.4 is set when the machine is switched off. After 300 hours of operation, a jump is made to PB5 to switch the machine off (not programmed in the example). The clock data area is in DB2 beginning with flag word FW0, and the status word is flag word FW10. OB1 STL
:JU FB 14 NAME :BETR-LES : :BE
Explanation
EVALUATE OPERATING HOURS COUNTER
FB14 STL
NAME :BETR-LES :C :A DB F 2 12.4
Explanation
READING THE OPERATING HOURS COUNTER DB IN WHICH THE CLOCK DATA IS LOCATED. IF AUXILIARY FLAG 12.4 IS SET, OFF. THE MACHINE IS ALREADY BLOCK END LOAD HOUR VALUE X 100 IN ACCU 1 COMPARE TO 3 (=300 HOURS) END IF 300 HOURS NOT YET REACHED SET AUXILIARY FLAG JUMP TO PB5 WHEN 300 OPERATING HOURS REACHED
:BEC : :L DL
14
: :L KC 003 :>12.4 5
12-34
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S5-100U
The Integral Real-Time Clock
12.7.4 Entering the Clock Time Correction Factor
You can configure a correction value that increases the exactness of the integral real-time clock. The correction value is displayed in seconds/month. The month is defined as 30 days. Absolute Address RAM Memory
EA 18
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Range
- 400D to + 400D
System Data Word 12
seconds/month
Example:
You determined that the clock runs 12 seconds slow in a four day period. That would be 90 seconds in 30 days. The correction value is+ 90 seconds/month.
Note
Use the data KF format to enter the correction value. You then do not have to convert the value to other numbering systems.
STL
FB10 L KF T RS BE
Explanation
+ 90 12
LOAD THE + 90 SECONDS CORRECTION VALUE INTO ACCU 1 AND STORE IT IN SYSTEM DATA WORD 12.
Note
The correction value you have entered is read in after the next minute change. If an error occurs when a setting is entered, bit 15 in system data word 11 is set.
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13
Connecting the S5-100U to SINEC L1, for CPU 102 and Higher 13.1 Connecting the Programmable Controllers to the L1 Bus Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13 - 1
13.2
Setting Parameters in the Programmable Controller for Exchanging Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2.1 How to Program in a Function Block, for CPU 102 and Higher . . . . 13.2.2 Setting Parameters in DB1, for CPU 103 and Higher . . . . . . . . . . . 13.3 13.3.1 13.3.2 13.3.3 Coordinating Data Exchange in the Control Program . . . . . . . . . . . Sending Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiving Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming the Messages in a Function Block . . . . . . . . . . . . . .
13 - 1 13 - 2 13 - 5 13 13 13 13 7 8 9 11
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Figures
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13-1 13-2 13-3 13-4 13-5 13-6 13-7 13-8 13-9
Connection of the Bus Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming Example for Setting Parameters in FB1 . . . . . . . . . . . . . . . . Data Exchange between Sender and Receiver (Principle) . . . . . . . . . . . . . Structure of the Send Mailbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structure of the Coordination Byte Send (KBS) . . . . . . . . . . . . . . . . . . . . Structure of the Receive Mailbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structure of the Coordination Byte Receive (KBE) . . . . . . . . . . . . . . . . . . Organization of Program Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming "Message Processing" in FB2 . . . . . . . . . . . . . . . . . . . . . .
13 13 13 13 13 13 13 13 13
-
1 4 7 8 8 9 10 11 12
Tables 13-1 SINEC L1 Parameter Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2 Setting Parameters in the Coordination Byte . . . . . . . . . . . . . . . . . . . . . . 13-3 Setting Parameters for the SINEC L1 Interface . . . . . . . . . . . . . . . . . . . . . 13 - 2 13 - 3 13 - 6
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S5-100U
Connecting the S5-100U to SINEC L1
13
Connecting the S5-100U to SINEC L1, for CPU 102 and Higher www..com
SINEC L1 is a local area network that enables SIMATIC S5 programmable controllers to communicate with each other. This option is available when you are using CPU 102 or higher. It operates on the master-slave principle. You will find more exact information on the SINEC L1 in the SINEC L1 manual. You need to understand the SINEC L1 operating system before continuing with this chapter. The S5-100U can be connected directly to the SINEC L1 as a slave. The information you need to perform this operation is explained in this chapter.
13.1
Connecting the Programmable Controller to the L1 Bus Cable
Bus terminal BT 777 is the signal level converter that connects the programmable controller to the L1 bus cable. The procedure is as follows: 1. Connect the L1 bus cable to bus terminal BT 777.
0A 1A 2A 3A 4A
0B 1B 2B 3B 4B
0A 1A 2A 3A 4A
0B 1B 2B 3B 4B
0A 1A 2A 3A 4A
0B 1B 2B 3B 4B
Figure 13-1. Connection of the Bus Cable 2. Insert the connector of the bus terminal cable into the PG/OP/SINEC L1 port.
13.2
Setting Parameters in the Programmable Controller for Exchanging Data
The programmable controller requires the following information for the handling of data exchange via the L1 bus: * * * Location of the data to be sent (data block or flag area) Name: Send Mailbox, abbreviated: SF Location of the data to be received (data block or flag area) Name: Receive Mailbox, abbreviated: EF Storage location of the coordinating information for sending data (e.g., the message: "Send Mailbox is enabled") Name: Coordination Byte Send, abbreviated: KBS
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Connecting the S5-100U to SINEC L1
S5-100U
*
Storage location of the coordinating information for receiving data (e.g., the message: "Receiving data can be read") www..com Name: Coordination Byte Receive, abbreviated: KBE Programmer number (necessary if you want to transmit programmer functions over the SINEC L1 local area network), abbreviated: PGN
*
You can set parameters for the programmable controller for the CPU 102 in the function block, and for the CPU 103 version 8MA03 in the integrated data block (DB1).
13.2.1 How to Program in a Function Block, for CPU 102 and Higher
You can program the SINEC L1 local area network by first setting the parameters and then programming the "messages" in the control program (see section 13.3.3) Setting Parameters in the Function Block You must define the following in the program: * * * * Your own programmer number for the programmer bus functions Your own slave number The data or flag areas reserved by the send and receive mailboxes The location of the coordination bytes
You program in the function block by calling up one of the two restart organization blocks (OB21 or OB22). You store the corresponding parameters in the system data area of the programmable controller by using the "TNB" block transfer statement. The SINEC L1 parameter block begins at system data word 57. Table 13-1. SINEC L1 Parameter Block System Data Word SD57 SD58 SD59 SD60 SD61 SD62 SD63 High Byte Programmer number (1 through 30) KBE Data identifier KBE Data word KBS DB or flag byte SF Data identifier SF Data word EF DB or flag byte Low Byte Slave number (1 through 30) KBE DB or flag byte KBS Data identifier KBS Data word SF DB or flag byte EF Data identifier EF Data word Address in System Data Area EA72H EA73H EA74H EA75H EA76H EA77H EA78H EA79H EA7AH EA7BH EA7CH EA7DH EA7EH EA7FH
You define the position of the coordination bytes and the starting addresses of the send and receive mailboxes in each case by three bytes.
13-2
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Connecting the S5-100U to SINEC L1
Table 13-2. Setting Parameters in the Coordination Byte
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Meaning
Parameters ("F") 4D 0 to 127
Address in System Data Area EA74H EA75H EA76H
"Flag" data identifier Flag byte
"Data word" identifier Data block Data word
("D") 44 2 to 63 0 to 255
EA77H EA78H EA79H
The data identifier is in ASCII code. Overflow If data packets longer than 64 bytes are received, the information is not written beyond the end of the receive mailbox. There is no overflow message. The end of the receive mailbox is flag byte 127 in the flag area or the last present data word (in the data block).
Example: Setting parameters in the S5-100U as slave 1 in function block 1 Definitions: * * * * * "Receive" coordination byte (KBE) "Send" coordination byte (KBS) Send mailbox (SF) Receive mailbox (EF) Flag byte Flag byte Data block Data block FY100 FY101 DB2 from DW0 DB3 from DW0
Flag bytes FY 64 to 77 are used as buffer areas.
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Connecting the S5-100U to SINEC L1
S5-100U
STL
www..com L KF 1 T FY 65 L KH 4D00 T FW 66 L KY 100,0 T FW 67 L KH 4D00 T FW 69 L KY 101,0 T FW 70 L KH 4400 T FW 72 L KY 2,0 T FW 73 L KH 4400 T FW 75 L KY 3,0 T FW 76
Explanation
- Load slave number and
store it in flag byte 65 - Load "Flag" data identifier and store it in flag byte 66 - Load flag byte 100 and store it in flag byte 67 - Load "Flag" data identifier and store it in flag byte 69 - Load flag byte 101 and store it in flag byte 70 - Load "Data word" identifier and store it in flag byte 72 - Store DB number "2" and DW number "0" in flag bytes 73 and 74 - Load "Data word" identifier and store it in flag byte 75 - Store DB number "3" and DW "0" in flag bytes 76 and 77 - Transfer flag area FY64 to 67 to the system data area: - Load upper source address - Load upper destination address - Transfer a block of data 14 bytes long Erase all buffer areas - Load hexadecimal number "0000" - Set all bits of FY64 to 77 to "0"
L L TNB L T T T T T T T
KH KH
EE4D EA7F 14
KH FW FW FW FW FW FW FW
0000 64 66 68 70 72 74 76
L T
KH FY
0080 100
L T BE
KH FY
0000 101
Default setting of the KBE; Data can be received from the bus. - Load binary number 1000 0000 - Set bit 7 to "1" and bits 6 to 0 to "0" Default setting of the KBS; Program has access to the send mailbox - Load binary number 0000 0000 - Set bits 7 to 0 to "0" Block end
Figure 13-2. Programming Example for Setting Parameters in FB1
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S5-100U
Connecting the S5-100U to SINEC L1
13.2.2 Setting Parameters in DB1, for CPU 103 and Higher
Set the parameters in DB1 as follows:
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1. Display the default DB1 on the programmer (Transfer function, source: PC, target: FD (PG) - A default DB1 is integrated into the programmable controller's operating system; it contains default parameters for the data exchange via SINEC L1. 2. Look for the SINEC L1 parameter block with the block ID "SL1:" for the PG/OP/SINEC L1 port. 3. Overwrite the comment character (#) with a space.
SL1: SLN 1 ... ... PGN 1
Beginning of the L1 parameter block for PG/ OP/ SINEC L1 port
Last parameter
4. Edit the default parameters according to your requirements. Do not change the syntax. Example: The S5-100U participates in the SINEC L1 network as a slave with the slave number 2. Send Mailbox (SF) in DB2 beginning with data word 0 Receive Mailbox (EF) in DB2 beginning with data word 10 Coordination Byte Send (KBS) is flag byte 0 (MB0) Coordination Byte Receive (KBE) is flag byte 2 (MB2) Programmer bus number (PGN) is 1.
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Connecting the S5-100U to SINEC L1
S5-100U
Table 13-3 shows how to change default parameters for the example given above and which parameter settings are permitted.
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Table 13-3. Setting Parameters for the SINEC L1 Interface Modifications Necessary for the Example Valid Parameters for CPU 103 and Higher
Default DB1: Block: SINEC L1 to PG/ OP/ SINEC L1 Port ...
SL1:
Explanation
Block ID "SINEC L1 to Interface SL1" Slave number of the PLC; default to 1 Location of the Send Mailbox; default location: DB2 beginning with DW0 Location of the Receive Mailbox; default location: DB3 beginning with DW0 Location of the Coordination Byte Receive; default location flag byte 100 (MB100) Location of the Coordination Byte Send; default location flag byte 101 (MB101)
no modification necessary
SLN 2 SLN x
--
SLN 1
(x=1 to 30)
SF DB2DW0 SF DBxDWy
SF DB2DW0
(x=2 to 255; y=0 to 255) or
SF MBz
(z=0 to 255)
EF DB3DW0 EF DB2DW10 EF DBxDWy
(X=2 to 255; y=0 to 255) or
EF MBz
(z=0 to 255)
KBE MB100 KBE MB2 KBE MBx
(x=0 to 255) or
KBE DByDWx*
(y=2 to 255; z=0 to 255)
KBS MB0 KBS MBx
KBS MB101
(x=0 to 255) or
KBS DByDWz*
(y=2 to 255; z=0 to 255)
PGN 1
Programmer bus number (necessary if you want to transmit programmer functions over SINEC L1; default 1)
PGN 1
PGN x
no modification necessary
(x=1 to 30)
*
The KBE/KBS is in the high-order byte of the given data word.
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S5-100U
Connecting the S5-100U to SINEC L1
5. Transfer the changed DB1 to the programmable controller. The default DB1 is overwritten. If you now go from STOP to RUN or from Power OFF to Power ON (with a battery inserted), the www..com programmable controller accepts the changed parameters and stores them in the system data area.
13.3
Coordinating Data Exchange in the Control Program
After you set the parameters, the control program for data exchange has to be created. The control program relies on the coordination information that the operating system makes available in the coordination bytes (see Figure 13-3). Sender (source) RAM Receive (destination) RAM
KBS KBE
KBS KBE
Control program for data exchange
Control program for data exchange
Send Mailbox Receive Mailbox
Data area or flag area
Send Mailbox Receive Mailbox
Data area or flag area
L1 bus Figure 13-3. Data Exchange between Sender and Receiver (Principle)
In the following paragraphs, you will learn how to control the sending and receiving of data after you have set the parameters in DB1. There is an example in section 13.3.3 of how you must program the data exchange in a function block.
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Connecting the S5-100U to SINEC L1
S5-100U
13.3.1 Sending Data
The prerequisites for sending data are as follows:
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* *
The parameters are set in DB1 for the location of the Send Mailbox (see section 13.2.2). The data to be sent, additional information (length of the send data "net data"), and destination slave number are then transferred to the Send Mailbox.
Figure 13-4 shows which information has to be stored in what part of the Send Mailbox. Example: Send Mailbox in the flag area (beginning with flag byte 1) Example: Send Mailbox in the data block (beginning with data word DW1)
DL DR
Flag byte 1 Flag byte 2 Flag byte 3
Length of the "net data" (0 to 64 bytes) Numb. of the dest. slave* Data ("net data") maximum of 64 bytes
DW1 DW2
Length of the "net data" 1st data byte
Number of the destination slave* 2nd data byte
Flag byte 66 *
Number of the receiver: 0 = Master 1 to 30 = Slaves 31 = Broadcast
DW33 63rd data byte
64th data byte
Figure 13-4. Structure of the Send Mailbox
Structure of the Coordination Byte Send (KBS) Figure 13-5 shows the structure of the Coordination Byte Send (KBS). KBS Bit 7 6 5 4 3 2 1 0
0: 1: 0: 1:
No error Error during last data transfer No express transmission Request a bus interrupt for this transmission (express transmission) Program is able to process Send Mailbox (operating system has no access) Send Mailbox is enabled (program has no access)
0: 1:
Figure 13-5. Structure of the Coordination Byte Send (KBS)
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Connecting the S5-100U to SINEC L1
The control program for sending data should be structured as follows: 1. Check bit 7 in the KBS to see if data is currently being sent. www..com - If the programmable controller is sending data, bit 7 is set. During this phase, the Send Mailbox can not be modified and no transmission can be started. 2. When bit 7 in the KBS has been reset, you can start the transmission by setting bit 7. 3. When bit 7 has been reset by the operating system after data has been sent, you can evaluate possible errors. You achieve the following by setting bit 4 in the KBS (express transmission): * * The sending programmable controller treats this message preferentially (possibly by overwriting a telegram not yet sent). The receiver treats the message as an express transmission.
In case of an error, the operating system sets bit 0 of the KBS. The error message is not valid until bit 7 has been reset in the KBS.
13.3.2 Receiving Data
The prerequisites for receiving data are as follows: The parameters for the location of the Receive Mailbox and the Coordination Byte Receive (KBE) (see section 13.2.2) have been set in DB1. Figure 13-6 shows you which information has to be stored in what part of the Receive Mailbox. Example: Receive Mailbox in the flag area (beginning with flag byte 1) Example: Receive Mailbox in a data block (beginning with data word 1)
DL DR
Flag Byte 1 Flag Byte 2 Flag Byte 3
Length of "net data" (in bytes) Source slave number* Data ("net data")
DW1 Length of the "net data" DW2 1st data byte DW3 3rd data byte
Source slave number * 2nd data byte 4th data byte
*
Number of the sender: 0 = Master 1 to 30 = Slave
Figure 13-6. Structure of the Receive Mailbox
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Connecting the S5-100U to SINEC L1
S5-100U
Structure of the Coordination Byte Receive (KBE) Figure 13-7 shows the structure for receiving data (KBE).
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KBE Bit 7 6 5 4 3 2 1 0
0: 1: 0: 1: 0: 1:
No error Error during last data transfer No slave failed At least one slave failed Bus in STOP mode Bus in RUN mode
0: 1: 0: 1:
No message Data arrives as express transmission Program can access the Receive Mailbox (operating system can not access) Operating system accepts data into the Receive Mailbox (program can not access)
Figure 13-7. Structure of the Coordination Byte Receive (KBE)
Structure of the Control Program for Receiving Data: 1. Check bit 7 of the KBE to see if it is possible to read the data from the Receive Mailbox. Bit 7 must be set to "0" so that the Receive Mailbox can be read. 2. In addition, you can scan through the KBE for the following errors and operating conditions: - At least one slave has failed. - The bus is in RUN (STOP) mode. - The received data pack comes as an express transmission. Special Features If you have reserved too little memory for the Receive Mailbox, the available memory area is filled up completely (flag area FY0 to FY255, DW0 to DW255). Therefore, the remaining receive data cannot be stored. In this case, the programmable controller does not generate an overflow message. You can find sample programs for sending and receiving data in the SINEC L1 manual (in the chapter on "Programming").
13-10
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Connecting the S5-100U to SINEC L1
13.3.3 Programming the Messages in a Function Block
The control program must execute the following tasks:
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* *
Enable the send and receive mailboxes and process the data contained in them. Manage the coordination bytes (e.g. send request, error evaluation).
Example: Data traffic with the master as slave 1 Definitions: * * * * Slave 1 receives three bytes from Master 0. The information is stored in the process output image table (QB0, QB1, QB2). Slave 1 sends three bytes (IB0, IB1, IB2) to the master. Parameters are set in FB1 as shown in Figure 13-2.
Programming the individual blocks: STL
OB22: JU FB1
Explanation OB22 is processed once only following power up. It calls FB1, which assigns the parameters to the slave.
BE OB1: . . JU . . . BE FB2
OB1 is scanned cyclically, and calls FB2, which services the send and receive mailboxes.
Figure 13-8. Organization of Program Execution
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Connecting the S5-100U to SINEC L1
S5-100U
STL
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Explanation Receive mailbox (DB3) Check whether access to receive mailbox is permissible. KBE/Bit 7=0: Access permitted KBE/Bit 7=1: Access not permitted Skip receive mailbox evaluation if access not permitted Check whether the number of the source (master 0) is in byte 2 of the receive mailbox Skip receive mailbox evaluation if source No. 0
JC L L >=M001 DR0 KF+0 =M002 DL1 QB0 DR1 QB1 DL2 QB2 M100.7 F100.7 F101.7
Transfer receive mailbox to the PIQ
M1:
JC C L T L T L T L T L T AN S M3: BE NOP
=M003 DB2 KF+3 DL0 KF+0 DR0 IB3 DL1 IB4 DR1 IB5 DL2 F101.7 F101.7 0
Set KBE/Bit 7=1, i.e. permit PLC access. Program access is not permitted again until the PLC has reset this bit. Check whether access to the send mailbox is permitted. KBS/Bit 7=0: Access permitted KBS/Bit 7=1: Access not permitted Skip send mailbox evaluation if access not permitted. Set send mail box (DB2) Specify length of the data packet in byte 1 of the send mailbox Load destination number 0 (master) into byte 2 of the send mailbox Load input bytes 3, 4 and 5 into the send mailbox
Set KBS/bit 7, i.e. programmable controller has access to the send mailbox
Figure 13-9. Programming "Message Processing" in FB2
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Module Spectrum 14.1 14.2 14.3 14.4 14.5 14.6 14.6.1 14.6.2 14.6.3 General Technical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Central Processing Units Bus Units ............................... 14 14 14 3 4 7
.......................................... ....................................
14 - 10 14 - 14 14 14 14 14 16 16 26 36
Interface Modules
Digital Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Input/Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.7 Analog Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7.1 Analog Input Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7.2 Analog Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14 - 38 14 - 38 14 - 56
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S5-100U
Module Spectrum
14
Module Spectrum
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The following section describes the standards and test values the S5-100U meets and fulfills and the test criteria with which the S5-100U has been tested. UL/CSA approvals The following approvals exist for the S5-100U: UL Recognition Mark Underwriters Laboratories (UL) in accordance with Standard UL 508, File E 116536 CSA Certification Mark Canadian Standard Association (CSA) in accordance with Standard C 22.2 No. 142, File LR 48323 CE marking Our products meet the requirements and protection objectives of the following EC Directives and comply with the harmonized European standards (EN) published in the Official Gazettes of the European Communities with regard to programmable controllers: * 89/336/EC "Electromagnetic Compatibility" (EMC Directive) * 73/23/EC "Electrical Equipment Designed for Use between Certain Voltage Limits" (Low-Voltage Directive) The EC declarations of conformity are held at the disposal of the competent authorities at the address below: Siemens Aktiengesellschaft Bereich Automatisierungstechnik AUT E 14 Postfach 1963 D-92209 Amberg Federal Republic of Germany Area of Application SIMATIC products have been designed for use in industrial environments. With indiivdual approval, SIMATIC products can also be used in residential environments (residential, commercial and light industry). You must acquire the individual approval from the respective national authority or testing board. Requirements in respect of Area of Application Emitted interference Industry Residential EN 50081-2 : 1993 Individual approval Immunity EN 50082-2 : 1995 EN 50082-1 : 1992
Oberserving the Installation Guidelines S5 modules meet the requirements, if installed and operated in accordance with the Installation Guidelines (see chapter 3).
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14-1
Module Spectrum
S5-100U
Notes for the machine manufacturer
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The SIMATIC automation system is not a machine in the sense of the EC Directives Machines. Therefore a declaration of conformity with regard to the EC Directive Machines 89/392/EC does not exist for SIMATIC. The EC Directive Machines 89/392/EC regulates the requirements on a machine. A machine in this sense is a group of interconnected parts or devices (see also EN 292-1, para. 3.1). The SIMATIC is part of the electrical equipment of a machine and must therefore be included in the declaration of conformity procedure by the machine manufacturer. The standard EN 60204-1 (safety of machines, general requirements for the electrical equipment of machines) applies for the electrical equipment of machines. The following table is intended to help you with the declaration of conformity and shows which criteria apply to SIMATIC in accordance with EN 60204-1 (June 1993).
EN 60204-1 Para. 4
Topic/criterion General requirements
Remarks Requirements are fulfilled if the devices are assembled/installed in accordance with the Installation Guidelines. Please also observe the section on CE marking. Requirements are fulfilled Requirements are fulfilled if the devices are installed in lockable cabinets to protect them from memory modifications through unauthorized persons. Requirements are fulfilled
Para. 11.2 Para. 12.3
Digital input/output interfaces Programmable equipment
Para. 20.4
Voltage tests
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S5-100U
Module Spectrum
14.1
General Technical Specifications
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Climatic Environmental Conditions Temperature Operating - horizontal design - vertical design
Electromagnetic Compatibility (EMC) Noise Immunity Static electricity to IEC 801-2 (discharge on all parts that are accessible to the operator during normal operation) - Test voltage 2.5 kV (relative humidity 30 to 95%) Radiated electromagnetic to IEC 801-3 field test field strength 3 V/m Fast transient burst to IEC 801-4, class III Power supply modules - Supply voltage 24 V DC 1 kV - Supply voltage 115/230 V AC 2 kV - Analog input/output modules 1 kV - Digital input/output modules for V = 24 V 1 kV for V > 24 V 2 kV Communications interface 1 kV Emitted interference to VDE 0871 Limit value class A
Nonoperating Temperature change - operating - nonoperating Relative humidity
0 to+60 C (32 to 140 F) 0 to+40 C (32 to 104 F) (Air-intake temperature, measured on the underside of the module) - 40 to +70 C (- 40 to +150 F) max. 10 C/h (50 F/h) max. 20 C/h (68 F/h) to DIN 40040 15 to 95% (indoors), noncondensing 860 to 1060 hPa 660 to 1060 hPa 0.5 ppm, (rel. humidity 60%, noncondensing) 0.1 ppm, (rel. humidity 60%, noncondensing)
Atmospheric pressure - operating - nonoperating Pollutants - SO2
- H2S
Mechanical Environmental Conditions Vibration* - tested to IEC 68-2-6 10 to 57 Hz, 57 to 150 Hz, Mode of vibration
IEC/VDE Safety Information to IEC 529 IP 20 to IEC 536 to VDE 0160 (05. 1988)
Vibration period
Shock* - tested to IEC 68-2-27 Type of shock Strength of shock Direction of shock
Free-fall - tested with
Degree of protection - Type Const. ampl. 0.075 mm - Class Const. accel. 1 g Insulation rating - between electrically Frequency sweeps with independent circuits a sweep rate of and 1 octave/min with circuits connected to a central grounding 10 frequency sweeps per axis in each of the 3 axes point vertical to each other - between all circuits and a central grounding point (standard mounting rail) Half sine 15 g peak value, 11 ms Test voltage duration for a rated voltage 2 shocks in each of the Vinput of the circuits (AC/DC) 3 axes vertical to each other 0 to 50 V Vinput= Vinput= 50 to 125 V to IEC 68-2-31 125 to 250 V Vinput= height of fall 50 mm
to VDE 0160 (05. 1988)
to VDE 0160 (05. 1988) Sine, 50 Hz
500 V 1250 V 1500 V
*
Appropriate measures must be taken to avoid vibration, shock and repetitive shock.
EWA 4NEB 812 6120-02b
14-3
Module Spectrum
S5-100U
14.2
Power Supply Modules
(6ES5 930-8MD11)
www..com
Power Supply Module PS 930 115/230 V AC; 24 V DC/1 A
Technical Specifications Input voltage - rated value - permiss. range Line frequency - rated value - permiss. range Input current at 115/230 V - rated value - Input current Power consumption
115/230V AC 24V DC 1A 6ES5 930-8MD11
115/230 V AC 92 to 132 V/ 187 to 264 V 50/60 Hz 47 to 63 Hz
SIMATIC S5-100U
PS 930 VOLTAGE SELECTOR
0.35/0.18 A max. 6/3 A 33 W 24 V DC 18 to 34 V1) max. 39 V 1A 3A fast fuse none class 1 yes
Output voltage - rated value - Permiss. range - Open-circuit voltage Output current - rated value Short-circuit Fault LED Protection class
L1 115/230V AC N
L+ 24V DC M
Galvanic isolation
Conductor cross sectional area - stranded 2) 2x0.5 to 1.5 mm2 - solid 2x0.5 to 2.5 mm2 VDE 0160 250 V AC 2xB 1500 V AC A to VDE 0871 45.4x135x120 1.8 x 5.3 x 4.7
F 3A
Insulation rating Rated insulation voltage (+24 V to L1) - insulation group - tested with Ri specification Dimensions WxHxD in mm in. Power loss of the module
typ. 7.5 W approx. 1040 g (2.4 lbs)
L1 N 2x4,7 nF L+
Weight
1)
For this reason, can only be used with the S5-100U CPUs core end sleeves
2) With M
14-4
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Power Supply Module PS 931 115/230 V AC; 24 V DC/2 A
www..com
(6ES5 931-8MD11)
Technical specifications Input voltage - rated value - permiss. range Line frequency - rated value - permiss. range Input current at 115/230 V - rated value Efficiency Power consumption Output voltage - rated value - permiss. range - open-circuit voltage Output current - rated value
L1 115/230V AC N
115/230 V AC 92 to 132 V/ 187 to 264 V 50/60 Hz 47 to 63 Hz
SIMATIC S5-100U
PS 931 VOLTAGE SELECTOR
0.9/0.6 A approx. approx. 85% 60 W 24 V DC 22.8 to 25.2 V yes 2A
115/230V AC 24V DC 2A 6ES5 931-8MD11
Permiss. ambient temperature of PLC - horizontal arrangement - vertical arrangement Buffering of line voltage dips - duration of voltage dips - repetition rate Short-circuit protection
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F)
L+ 24V DC M
20 ms at 187 V/2 A 1s power limiting, electronic cutoff, non-latching no class 1 yes 2x0.5 to 1.5 mm2 2x0.5 to 2.5 mm2 VDE 0160 and VDE 0805 (transformer) 250 V AC 2xB 2830 V AC 45.4x135x120 1.8 x 5.3 x 4.7 typ. approx. 8.5 W 500 g (1.1 lbs.)
Fault LED Protection class Galvanic isolation Conductor cross-sectional area - stranded * - solid Insulation rating
1,6 A L1 N 2x4,7 n L+ M
Rated insulation voltage (+24 V to L1) - insulation group - tested with Dimensions WxHxD in mm in. Power loss of the module Weight * with core end sleeves
EWA 4NEB 812 6120-02b
14-5
Module Spectrum
S5-100U
Power Supply Module PS 935 (not with CPU 100)
www..com
(6ES5 935-8ME11)
Technical Specifications Number of inputs (only internal) Input voltage - rated value - permissible range 2x4 bits 24 V DC 18.5 to 30.2 V DC 20.4 to 28.8 V DC yes A to VDE 0871 1.25 A 15 times rated current 75% 30 W 9 V DC 8.55 to 9.45 V yes 2.5 A 0.0 to 2.5 A 2.5 to 2.7 A
dyn. stat. - Polarity reversal protection Radio interference level
SIMATIC S5-100U
PS 935 ON OFF
Input current at 24 V DC - rated value - inrush current limitation - efficiency approx. Power input approx. Output voltage - rated value - permissible range - open-circuit voltage Output current - rated value - permissible range - overload recognition Buffering during mains voltage dips - duration of voltage dips - repeat rate Short-circuit protection (output side) Diagnostics
DC 24V DC 9V 2,5A 6ES5 935-8ME11
L+ DC 24V
20 ms at 20.4 V/2.5 A 1s yes electronic switch-off, non-retentive yes (24 V DC input voltage, 9 V output voltage) yes Class 1 no 2x0.5 to 1.5 mm2 2x0.5 to 2.5 mm2 45.4x135x120 1.8x5.3x4.7 typ. 7.5 W
DC 9V
Fault indication
FAULT
Class of protection Galvanic isolation Conductor cross-section - stranded* - solid Dimensions WxHxD mm in. Power loss of the module
CPU
-->
I/Os
Weight * with core end sleeve
approx. 500 g (1.1 lbs)
9 V CPU
Interface
9V FAULT ON OFF 9 V= L+ 24V DC 24 V= M
9V
14-6
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
14.3
CPU 100
Central Processing Units (CPUs)
(6ES5 100-8MA02)
www..com
Technical specifications Memory configuration - internal memory RAM 1024 statements - memory submodule EPROM/EEPROM Execution times - per binary operation approx. 70 s - per word operation approx. 125 s Scan monitoring time approx. 300 ms Flags 1024; 512 retentive
SIEMENS
SIMATIC S5-100U
CPU 100
Timers: Number/range approx. 16; 0.01 to 9990 s Counters: Number/range 16; 8 retentive 0 to 999 (up/down) Digital inputs, Digital outputs together max. Analog inputs, Analog outputs together max. Organization blocks Program blocks Function blocks - programmable - integrated Sequence blocks Data blocks Number of operations approx. Power supply (internal) Input voltage - nominal value - permiss. range Current consumption from +24 V Output voltage - V 1 (for I/Os) - V 2 (for programmer) Output current - from V 1 - from V 2 Short-circuit protection Protection class Galvanic isolation Backup battery 256 8 OB1, 21, 22, and 34 0 to 63 0 to 63 none none 2 to 63 60
BATTERY OFF/ LOW
RUN STOP RUN STOP COPY
L+ 24 V DC M
24 V DC 18 to 34 V 1A +9 V +5.2 V 1A 0.65 A electronic class 1
6ES5 100-8MA02
+9 V Data GND
+5,2 V
5,0 V
no Lithium Battery (3.4 V/ 850 mAh) - Backup time min. 1 year (at 25 C [77 F] and uninterrupted backup of CPU) - Service life approx. 5 years (at 25 C [77 F]) Permissible ambient temperature - horizontal arrangement 0 to 60 C (32 to 140 F) - vertical arrangement 0 to 40 C (32 to 104 F) Connector cross-sectional area - stranded, with core end sleeves 2x0.5 to 1.5 mm2 - solid 2x0.5 to 1.5 mm2 Power losses of the module typ. 10.7 W Dimensions (WxHxD) in mm 91.5x135x120 in. (3.6 x 5.3 x 4.7) Weight - CPU module approx. 0.65 kg (1.4 lbs) - memory submodule approx. 0.1 kg (0.2 lbs)
PS
18 ... 34 V L+ M
CPU
EWA 4NEB 812 6120-02b
14-7
Module Spectrum
S5-100U
CPU 102
www..com
(6ES5 102-8MA02)
Technical specifications Memory configuration - internal memory - memory submodule RAM 2048 statements EPROM/EEPROM 7/70 s 40/125 s 350 ms 1024; 512 retentive
Execution times Normal/Test - per binary operation approx. - per word operation approx. Scan monitoring time approx. Flags
SIEMENS
SIMATIC S5-100U
CPU 102
BATTERY OFF/ LOW
RUN STOP RUN STOP COPY
Timers: Number/range approx. 32; 0.01 to 9990 s Counters: Number/range 32; 8 retentive 0 to 999 (up/down) Digital inputs, Digital outputs together max. 256 Analog inputs, Analog outputs together max. 16 Organization blocks OB1, 21, 22, and 34 Program blocks 0 to 63 Function blocks - programmable 0 to 63 - integrated 240 to 243, 250, and 251 Sequence blocks none Data blocks 2 to 63 Number of operations approx. 60 Power supply (internal) Input voltage - nominal value 24 V DC - permiss. range 18 to 34 V Current consumption from +24 V 1 A Output voltage - V 1 (for I/Os) - V 2 (for programmer) Output current - from V 1 - from V 2 Short-circuit protection Protection class Galvanic isolation Backup battery +9 V +5.2 V 1A 0.65 A electronic class 1 no Lithium Battery (3.4 V/ 850 mAh) min. 1 year (at 25 C [77 F] and uninterrupted backup of CPU) approx.
L+ 24 V DC M
6ES5 102-8MA02
+9 V Data GND
- Backup time
+5,2 V
5,0 V
PS
18 ... 34 V L+ M
CPU
5 years (at 25 C [77 F]) Permissible ambient temperature of PC - horizontal arrangement 0 to 60 C (32 to 140 F) - vertical arrangement 0 to 40 C (32 to 104 F) Connector cross-sectional area - stranded, with core end sleeves 2x0.5 to 1.5 mm2 - solid 2x0.5 to 2.5 mm2 Power losses of the module typ. Dimensions (WxHxD) in mm in. Weight - CPU module approx. - memory submodule approx. 11.4 W 91.5x135x120 (3.6 x 5.3 x 4.7) 0.65 kg (1.4 lbs) 0.1 kg (0.2 lbs)
- Service life
14-8
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
CPU 103
www..com
(6ES5 103-8MA03)
Technical specifications Processor Byte/bit processor Memory configuration - internal memory RAM 10240 statements - memory submodule EPROM/EEPROM Real-time clock - Accuracy 2s/day - Variation due to temperature changes (TA ambient temperature in C) -3.5x(TA-15)2ms/day - e.g. tolerance at 40 C 2s-3.5x(40-15)2ms/day approx. 0 to -4s/day Execution times - per binary operation approx. 0.8 s - per word operation approx. 100 s Scan monitoring time 500 ms, selectable Flags 2048; 512 retentive Timers: Number/range approx. 128; 0.01 to 9990 s Counters: Number/range 128; 8 retentive 0 to 999 (up/down) Digital inputs, Digital outputs together max. 256 Analog inputs, Analog outputs together max. 32 Organization blocks OB1, 2, 13, 21, 22, 31, 34, and 251 Program blocks 0 to 255 Function blocks - programmable - integrated Sequence blocks Data blocks Number of operations approx. Power supply (internal) Input voltage - nominal value - permiss. range Current consumption from +24 V Output voltage - V 1 (for I/Os) - V 2 (for programmer) Output current - from V 1 - from V 2 Short-circuit protection
+9 V Data GND
SIEMENS
SIMATIC S5-100U
CPU 103
BATTERY OFF/ LOW
RUN STOP RUN STOP COPY
L+ 24 V DC M
0 to 255 240 to 243, 250 and 251 0 to 255 2 to 255 180
6ES5 103-8MA03
24 V DC 18 to 34 V 1A +9 V +5.2 V 1A 0.65 A electronic
+5,2 V
5,0 V
PS
18 ... 34 V L+ M
CPU
class 1 no Lithium Battery (3.4 V/ 850 mAh) - backup time min. 1 year (at 25 C [77 F] and uninterrupted backup of CPU) - service life approx. 5 years (at 25 C [77 F]) Permissible ambient temperature - horizontal arrangement 0 to 55 C (32 to 131 F) - vertical arrangement 0 to 40 C (32 to 104 F) Connector cross-sectional area - stranded, with core end sleeves 2x0.5 to 1.5 mm2 - solid 2x0.5 to 2.5 mm2 Power losses of the module typ. 11.6 W Dimensions (WxHxD) in mm 91.5x135x120 in. (3.6 x 5.3 x 4.7) Weight - CPU module approx. 0.65 kg (1.4 lbs) - memory submodule approx. 0.1 kg (0.2 lbs)
Protection class Galvanic isolation Backup battery
EWA 4NEB 812 6120-02b
14-9
Module Spectrum
S5-100U
14.4
Bus Units
(6ES5 700-8MA11)
Bus Unit (SIGUT Screw-type Terminals)
www..com
Technical specifications Type of connection Number of plug-in modules Number of bus units per programmable controller Connection between two bus units Number of terminals Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Conductor cross sectional area - stranded * - solid Current consumption - from +9 V (CPU) Dimensions WxHxD in mm in.
2 1 4 3 6 5 810 7 9 2 1 4 3 6 5 810
SIGUT screw-type terminals 2
SIEMENS
max.
16 flat ribbon 10 per slot VDE 0160 12 V AC 1xB 500 V AC
2x0.5 to 1.5 mm2 2x0.5 to 2.5 mm2 typ. 1 mA 91.5x162x39 3.6x6.4x1.5 approx. 300 g (10.6 oz.)
Weight
7 9
* with core end sleeves
1 2
3 4
5 6
7 8
9 10
1 2
3 4
5 6
7 8
9 10
+9V GND Data
1 nF
14-10
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Bus Unit (Crimp Snap-in Connections)
www..com
(6ES5 700-8MA22)
Technical specifications Type of connection Number of plug-in modules Number of bus units per programmable controller Connection between two bus units Number of terminals Conductor cross sectional area - stranded Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Current consumption - from +9 V (CPU) Dimensions WxHxD in mm in. Weight
2 1 4 3 6 5 810 7 9 2 1 4 3 6 5 810 7 9
Crimp snap-in 2
SIEMENS
max.
16 flat ribbon 10 per slot
0.5 to 1.5 mm2 VDE 0160 12 V AC 1xB 500 V AC typ. 1 mA 91.5x135x39 3.6x5.3x1.5 approx. 250 g (8.8 oz.)
+9V GND Data
1 nF
EWA 4NEB 812 6120-02b
14-11
Module Spectrum
S5-100U
Bus Unit with Interrupt Capability (SIGUT Screw-type Terminals) www..com
(6ES5 700-8MB11)
Technical specifications Type of connection Number of plug-in units SIGUT (screw-type terminals) 2
SIEMENS
Number of bus modules per programmable controller max. 16 * Connection between two bus modules Number of terminals Insulation rating Rated insulation voltage (+9 V to ) - Insulation group - tested with flat ribbon 10 VDE 0160 12 V AC 1xB 500 V AC
ALARM
ALARM
Conductor crosssectional area - stranded ** - solid Current consumption - from+9 V (CPU) Dimensions (WxHxD) in mm in. Weight
2x0.5 to 1.5 mm2 2x0.5 to 2.5 mm2 typ. 11 mA 91.5x162x39 3.6 x 6.4 x 1.5 approx. 320 g (9.8 oz)
2 1
4 3
6 5
810 7 9
2 1
4 3
6 5
810 7 9
*
Only the bus unit (and only with 4-channel digital input modules or comparator modules) directly adjacent to the CPU has interrupt capability
** With core end sleeves
1 2
3 4
5 6
7 8
9 10
1 2
3 4
5 6
7 8
9 10
CPU
+9V GND Data
Alarm
1 nF
14-12
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Bus Unit with Interrupt Capability (Crimp Snap-in Connections) www..com
(6ES5 700-8MB21)
Technical specifications Type of connection Crimp-snap-in
SIEMENS
Number of plug-in units 2 Number of bus modules per programmable controller max. 16 * Connection between two bus modules flat ribbon Number of terminals 10 per slot Conductor crosssectional area - stranded Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Current consumption - from+9 V (CPU) Dimensions (WxHxD) in mm in. Weight
0.5 to 1.5 mm2 VDE 0160 12 V AC 1xB 500 V AC
ALARM
ALARM
typ. 11 mA 91.5x135x39 3.6 x 5.3 x 1.5 approx. 270 g (9.5 oz)
2 1
4 3
6 5
81 7
0 9
2 1
4 3
6 5
810 7 9
*
Only the bus unit (and only with 4-channel digital input modules or comparator modules) directly adjacent to the CPU 103 has interrupt capability
CPU
+9V GND Data
Alarm
1 nF
EWA 4NEB 812 6120-02b
14-13
Module Spectrum
S5-100U
14.5
Interface Modules
(6ES5 315-8MA11)
IM 315 Interface Module
www..com
OUT
SIEMENS
SIMATIC S5 INTERFACE MODULE 6ES5 315-8MA11 MADE IN GERMANY IN
+9V GND Data
Technical specifications Current supply to the expansion unit Number of interface modules per PLC max. max. 2.5 A 1
1 nF
Permissible potential difference between (IM 315) and central ground point (CPU) Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Dimensions WxHxD in mm in. Current consumption - from +9 V (CPU) Weight typ.
1 V VDE 0160 12 V AC 1xB 500 V AC 2x(45.4x135x39) 2x(1.8x5.3x1.5) 1 mA
input
output
+9V GND Data
approx. 280 g (9.8 oz.)
1 nF
14-14
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
IM 316 Interface Module
www..com
(6ES5 316-8MA12)
Technical specifications Current supply to the expansion unit
OUT
max. max.
2.5 A 4
Number of interface modules per PLC Cable connectors for the IM 316 - Cable connector (0.5 m/1.6 ft.) - Cable connector (2.5 m/8.2 ft.) - Cable connector (5.0 m/16.4 ft.) - Cable connector (10 m/33 ft.) Cable insulation in ducts Permissible potential difference between (IM 316) and central ground point (CPU) Insulation rating Rated insulation voltage (+9 V to ) - insulation group Dimensions WxHxD in mm in. Current consumption - from +9 V (CPU) Weight
+9V GND output
6ES5 712-8AF00 6ES5 712-8BC50 6ES5 712-8BF00 6ES5 712-8CB00 permissible
SIEMENS
SIMATIC S5 INTERFACE MODULE 6ES5 316-8MA12 MADE IN GERMANY
1 V VDE 0160 12 V AC 1xB 45.4x135x39 1.8x5.3x1.5 typ. approx. 27 mA 120 g (4.2 oz.)
IN
1 nF
input Data
EWA 4NEB 812 6120-02b
14-15
Module Spectrum
S5-100U
14.6
Digital Modules
14.6.1 Digital Input Modules
Digital Input Module 4 x 24 V DC (6ES5 420-8MA11)
www..com
Technical specifications Number of inputs Galvanic isolation - in groups of L+ M Input voltage L+ - rated value - "0" signal - "1" signal Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating Rated insulation voltage * (+9 V to ) - insulation group Fault LED (red) Permissible ambient temperature of module - horizontal arrangement - vertical arrangement DIGITAL INPUT
4 x 24 V DC 6ES5 420-8MA11 1 2 3 4 5 6
4 no 4 24 V DC 0 to 5 V 13 to 33 V typ. typ. typ. max. 7 mA 2.5 ms 5 ms 100 m (330 ft.) VDE 0160 12 V AC 1xB no input voltage L+
1
F .0 .4
2 3 4
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
4
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 1.5 mA typ. typ. approx. 16 mA 0.8 W 205 g (7.2 oz.)
Connection of 2-wire BERO proximity switches - residual current Current consumption - from +9 V (CPU)
+9 V GND Data
Power loss of the module Weight
180 K
* Relevant only for isolated assembly in the ET 100/200U
1 2 L+ M
3 4
5 6
7 8
9 10
X.0
X.1
X.2
X.3
14-16
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Input Module 8 x 24 V DC
www..com
(6ES5 421-8MA12)
Technical specifications Number of inputs Galvanic isolation - in groups of
1 F 2 M 4 3 6 5 8 7 10 9 L+
8 no 8 24 V DC 0 to 5 V 13 to 33 V typ. typ. typ. max. 7 mA at 24 V 2.3 ms 3.5 ms 100 m (330 ft.) VDE 12 V AC 1xB no input voltage L+/M
Input voltage L+ - rated value - "0" signal - "1" signal Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating
.0 .1 .2 .3 .4 .5 .6 .7
Rated insulation voltage * (+9 V to ) - insulation group Fault LED (red) Permissible ambient temperature of module - horizontal arrangement - vertical arrangement
4
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 1.5 mA typ. typ. approx. 34 mA 1.6 W 190 g (6.7 oz.)
DIGITAL INPUT
8 x 24 V DC 6ES5 421-8MA12 1 2 3 4 5 6
Connection of 2-wire BERO proximity switches - residual current Current consumption from +9 V (CPU)
+9 V GND Data
Power loss of the module Weight
180 K
* Relevant only for isolated assembly in the ET 100/200U
1 2 L+ M
3 4
5 6
7 8
9 10
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
EWA 4NEB 812 6120-02b
14-17
Module Spectrum
S5-100U
Digital Input Module 16 x 24 V DC
www..com
(6ES5 422-8MA11) (6ES5 490-8MA13/-8MA03) (6ES5 490-8MB11)
Technical specifications Number of inputs Galvanic isolation Input voltage L+ - rated value - "0" signal - "1" signal 16 no 24 V DC 0 to 5 V 13 to 30 V
DIGITAL
16xDC 24 V
IN
n+1 n
F
L+ n+1 .0 .1 .2 .3 .4 .5 .6 .7 NC NC n .0 .1 .2 .3 .4 .5 .6 6 123 .7 M
Input protection - against polarity reversal no, fuse trips - against overvoltage up to 33 V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Rated insulation voltage (+9 V to ) - insulation group
typ. typ. typ.
4.5 mA 4 ms 3 ms 100 m 12 V AC 1xB 2 kV on L+/M interruption possible 1.5 mA 50 mA 4.5 W 190 g (6.7 oz.)
EMC/noise immunity to VDE 801-4, severity level 3 Fault LED (red) Connection of 2-wire BERO proximity switches - residual current Current consumption - from +9 V (CPU) Power loss of the module Weight typ. typ. ca.
6ES5 422-8MA11
+9 V GND Data
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
180 K
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
X.0 X.1 X.2 X.3 X.4 X.5 X.6 X.7 NC NC X.0 X.1 X.2 X.3 X.4 X.5 X.6 X.7 M L+
14-18
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Input Module 4 x 24 to 60 V DC
www..com
(6ES5 430-8MB11)
Technical specifications Number of inputs Galvanic isolation - in groups of L+ M Input voltage L+ - rated value - "1" signal - "0" signal Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Fault LED (red) Connection of 2-wire BERO proximity switches - residual current Permissible ambient temperature of module - horizontal arrangement - vertical arrangement
4
4 yes (optocoupler) 4 24 to 60 V DC 13 to 72 V - 33 to 8 V typ. typ. typ. 4.5 to 7.5 mA 3 ms (1.4 to 5 ms) 3 ms (1.4 to 5 ms) no input voltage L+ possible 1.5 mA
F .0 .4
1 2 3 4
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 12 V AC 1xB 500 V AC 60 V AC 2xB 1250 V AC 5 mA 35 mA 2W 200 g (7 oz.)
Length of cable - unshielded Insulation rating
DIGITAL INPUT
4 x 24 - 60 V DC 6ES5 430-8MB11 1 2 3 4 5 6
Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (+9 V to L+) - insulation group - tested with Current consumption - from +9 V (CPU) - from L+ Power loss of the module Weight
+9 V GND Data
max. max. approx.
1
3 4
5 6
7 8
9 10
L+
M
X.0
X.1
X.2
X.3
EWA 4NEB 812 6120-02b
14-19
Module Spectrum
S5-100U
Digital Input Module 4 x 115 V AC
www..com
(6ES5 430-8MC11)
Technical specifications Number of inputs Galvanic isolation - in groups of Input voltage L1 - rated value - "0" signal - "1" signal - frequency Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating .3 .7
9 10
4 yes (optocoupler) 4 115 V AC/DC 0 to 40 V 85 to 135 V 47 to 63 Hz typ. typ. typ. typ. max. 14 mA at 115 V AC 6 mA at 115 V DC 10 ms 20 ms 100 m (330 ft.) VDE 0160 125 V AC 2xB 1250 V AC 12 V AC 1xB 500 V AC
L1
1 2 3 4
N
.0 .4
.1 .5
5 6
.2 .6
7 8
Rated insulation voltage (+9 V to L1) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with Permissible ambient temperature of module - horizontal arrangement - vertical arrangement Connection of 2-wire BERO proximity switches - residual current
+9 V GND Data
2
DIGITAL INPUT
4 x 115 V AC 6ES5 430-8MC11 1 2 3 4 5 6
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 5 mA typ. typ. approx. 16 mA 2.8 W 210 g (7.4 oz.)
Current consumption - from +9 V (CPU) Power loss of the module Weight
1 2
3 4
5 6
7 8
9 10
L1
N X.0
X.1
X.2
X.3
14-20
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Input Module 4 x 230 V AC
www..com
(6ES5 430-8MD11)
Technical specifications Number of inputs Galvanic isolation - in groups of Input voltage L1 - rated value - "0" signal - "1" signal - frequency Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating Rated insulation voltage (+9 V to L1) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with Permissible ambient temperature of module - horizontal arrangement DIGITAL INPUT
4 x 230 V AC 6ES5 430-8MD11 1 2 3 4 5 6
4 yes (optocoupler) 4 230 V AC 0 to 70 V 170 to 264 V 47 to 63 Hz typ. typ. typ. max. 16 mA at 230 V 10 ms 20 ms 100 m (330 ft.) VDE 0160 250 V AC 2xB 1500 V AC 12 V AC 1xB 500 V AC
L1
1 2 3 4
N
.0 .4
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
2
- vertical arrangement Connection of 2-wire BERO proximity switches - residual current
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 5 mA typ. typ. approx. 16 mA 2.5 W 210 g (7.4 oz.)
Current consumption - from +9 V (CPU) Power loss of the module Weight
1 2
3 4
5 6
7 8
9 10
L1
N X.0
X.1
X.2
X.3
EWA 4NEB 812 6120-02b
14-21
Module Spectrum
S5-100U
Digital Input Module 8 x 24 V DC
www..com
(6ES5 431-8MA11)
Technical Specifications Number of inputs Galvanic isolation - in groups of
1 L+ M 2
8 yes (optocoupler) 8 24 V DC 0 to 5 V 13 to 33 V typ. typ typ. max. 8.7 mA 5.5 ms 4.5 ms 100 m (330 ft.) VDE 0160 12 V AC 2xB 500 V AC 30 V AC 2xB 500 V AC
Input voltage L+ - rated value - "0" signal - "1" signal
4 3 6 5 8 7 10 9
.0 .1 .2 .3 .4 .5 .6 .7
Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating Rated insulation voltage (+ 9 V to ) - insulation group - tested with Rated insulation voltage (+ 9 V to L+) - insulation group - tested with Permissible ambient temperature of module - horizontal arrangement
4
DIGITAL INPUT
8 x 24 V DC 6ES5 431-8MA11 1 2 3 4 5 6
- vertical arrangement Connection of 2-wire BERO proximity switches - residual current
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 1.5 mA typ. typ. approx. 32 mA 2W 190 g (6.7 oz.)
Current consumption - from + 9 V (CPU) Power loss of the module Weight
1 2 L+ M
3 4
5 6
7 8
9 10
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
14-22
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Input Module 8 x 115 V ACV
www..com
(6ES5 431-8MC11)
Technical specifications Number of inputs Galvanic isolation - in groups of Input voltage L1 - rated value - "0" signal - "1" signal - frequency Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating Rated insulation voltage (+9 V to L1) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with Permissible ambient temperature of module - horizontal arrangement - vertical arrangement Connection of 2-wire BERO proximity switches - residual current Current consumption - from +9 V (CPU) Power loss of the module Weight typ. typ. approx. typ. typ. typ. typ. max. 8 yes (optocoupler) 8 115 V AC/DC 0 to 40 V 85 to 135 V 47 to 63 Hz 12 mA at 115 V AC 2.5 mA at 115 V DC 10 ms 20 ms 100 m (330 ft.) VDE 0160 125 V AC 2xB 1250 V AC 12 V AC 1xB 500 V AC
1 2
L1 N
.0 .1 .2 .3 .4 .5 .6 .7
4 3 6 5 8 7 10 9
2
DIGITAL INPUT
8 x 115 V AC 6ES5 431-8MC11 1 2 3 4 5 6
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 4 mA 32 mA 2.5 W 260 g (9 oz.)
+9 V GND Data
1 2 N L1
3 4
5 6
7 8
9 10
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
EWA 4NEB 812 6120-02b
14-23
Module Spectrum
S5-100U
Digital Input Module 8 x 230 V AC
www..com
(6ES5 431-8MD11)
Technical specifications Number of inputs Galvanic isolation - in groups of Input voltage L1 - rated value - "0" signal - "1" signal - frequency Input current at "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Length of cable - unshielded Insulation rating Rated insulation voltage (+9 V to L1) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with Permissible ambient temperature of module - horizontal arrangement - vertical arrangement Connection of 2-wire BERO proximity switches - residual current Current consumption - from +9 V (CPU) Power loss of the module Weight typ. typ. approx. typ. typ. typ. typ. max. 8 yes (optocoupler) 8 230 V AC/DC 0 to 95 V 195 to 253 V 47 to 63 Hz 16 mA at 230 V AC 1.8 mA at 230 V DC 10 ms 20 ms 100 m (330 ft.) VDE 0160 250 V AC 2xB 1500 V AC 12 V AC 1xB 500 V AC
1 2
L1 N
.0 .1 .2 .3 .4 .5 .6 .7
4 3 6 5 8 7 10 9
2
DIGITAL INPUT
8 x 230 V AC 6ES5 431-8MD11 1 2 3 4 5 6
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) possible 5 mA 32 mA 3.6 W 260 g (9 oz.)
+9 V GND Data
1 2 N L1
3 4
5 6
7 8
9 10
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
14-24
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Input Module 8 x 5 to 24 V DC
www..com
(6ES5 433-8MA11)
Technical Specifications Number of inputs Galvanic isolation - in groups of Input voltage L+ - rated value - "0" signal - "1" signal Permissible range Input resistance 8 yes (optocoupler) 8 5 to 24 V DC Vin approx. 25% L+ Vin approx. 45% L+ 4.5 to 30 V 4.7 k to L+ or M; reversible on the back of the module *
1 2 4 3 6 5
L+ M
.0 .1 .2 .3 .4 .5 .6 .7
12L+ M
The LED displays the evaluated signal Inherent delay approx. 1 ms or 10 ms; reversible on the back of the module * 100 m (330 ft.) VDE 0160 30 V AC 2xB 500 V AC 12 V AC 2xB 500 V AC
8 7 10
Length of cable - unshielded Insulation rating
max.
9
Rated insulation voltage (+ 9 V to L+) - insulation group - tested with
8
DIGITAL INPUT
8 x 5 ... 24 V DC 6ES5 433-8MA11 1 2 3 4 5 6
Rated insulation voltage (+ 9 V to ) - insulation group - tested with Permissible ambient temperature of module - horizontal arrangement - vertical arrangement
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) typ. typ. typ. approx. 6 mA 60 mA 2.4 W 225 g (8 oz.)
Current consumption - from + 9 V (CPU) - from L+ Power loss of the module Weight
S2
S1
4,7 k
* reversible in groups of 8
1 2
3 4
5 6
7 8
9 10
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
EWA 4NEB 812 6120-02b
14-25
Module Spectrum
S5-100U
14.6.2 Digital Output Modules
www..com
Digital Output Module 4 x 24 V DC/0.5 A
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range (including ripple) - value at t<0.5 s Output current for "1" signal - rated value - permissible range - lamp load Residual current at "0" signal Output voltage - "1" signal Short-circuit protection
(6ES5 440-8MA12)
4 no 4 24 V DC 20 to 30 V 35 V
F .0 .4
1 2 3 4
L+ M
0.5 A 5 to 500 mA max. 5 W max. 0.5 mA max. L+ (- 0.6 V) short-circuit protected output with autom. switch on when the short-circuit does not exist any more short-circuit/ no load voltage L+ possible - 15 V 100 Hz 2 Hz 2A possible possible 0.8 A
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
Fault LED (red) Error diagnostics Voltage induced on circuit interruption (internal) limited to Switching frequency - resistive load max. - inductive load max. Total permissible current of outputs Driving of digital input Paralleling of outputs - maximum current Permissible ambient temperature - horizontal arrangement - vertical arrangement Length of cable - unshielded Insulation rating Rated insulation voltage * (+9 V to ) - insulation group Current consumption - from +9 V (CPU) - from L+(without load) typ. typ. typ.
5
DIGITAL OUTPUT
4 x 24 V DC/0.5 A 6ES5 440-8MA12 1 2 3 4 5 6
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 12 V AC 1xB 15 mA 25 mA 1.5 W
1 2
3 4
5 6
7 8
9 10
Power loss of the module Weight
approx. 200 g (7 oz.)
L+
M
X.0 X.1 X.2 X.3
* Relevant only for isolated assembly in the ET 100/200U
14-26
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Output Module 4 x 24 V DC/2 A
www..com
(6ES5 440-8MA22)
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range
1
4 no 4 24 V DC 20 to 30 V
F .0 .4
2 3 4
L+ M
Output current for "1" signal - rated value - permissible range - lamp load Residual current at "0" signal Output voltage - "1" signal Short-circuit protection
2A 5 mA to 2 A max. 10 W max. 1 mA max. L+ (- 0.8 V) short-circuit protected output with autom. switch on when the short-circuit does not exist any more short-circuit/ no load voltage L+ possible - 15 V 100 Hz 2 Hz 4A possible possible 3.2 A
.1 .5
5 6
.2 .6
7 8
Fault LED (red) .3 .7
9 10
Error diagnostics Voltage induced on circuit interruption (internal) limited to Switching frequency - resistive load max. - inductive load max. Total permissible current of outputs Driving of digital input Paralleling of outputs - maximum current Permissible ambient temperature of module - horizontal arrangement
+9 V GND Data
5
DIGITAL OUTPUT
4 x 24 V DC/2 A 6ES5 440-8MA22 1 2 3 4 5 6
- vertical arrangement Length of cable - unshielded Insulation rating
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 12 V AC 1xB 15 mA 25 mA 3W
Rated insulation voltage* (+9 V to ) - insulation group Current consumption - from +9 V (CPU) typ. - from L+ (without load) typ. Power loss of the module typ.
1 2 3 4 5 6 7 8 9 10
Weight
approx. 200 g (7 oz.)
L+
M
X.0 X.1 X.2 X.3
* Relevant only for isolated assembly in the ET 100/200U
EWA 4NEB 812 6120-02b
14-27
Module Spectrum
S5-100U
Digital Output Module 8 x 24 V DC/0.5 A
www..com
(6ES5 441-8MA11)
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range (including ripple) - value at t<0.5 s 8 no 8 24 V DC 20 to 30 V 35 V
1 2
L+ M
.0 .1 .2 .3 .4 .5 .6 .7
4 3 6 5 8 7 10 9
!
Warning
Capacitor remains loaded after switch off of L+
Output current for "1" signal - rated value - permissible range - lamp load Residual current at "0" signal Output voltage - "1" signal
0.5 A at 60 C (140 F)/ 1 A at 30 C (86 F) 5 mA to 1 A max. 5 W max. 1.0 mA max. L+ (- 0.5 V) none - 15 V
Short-circuit protection Voltage induced on circuit interruption (internal) limited to
5
DIGITAL OUTPUT
8 x 24 V DC/0.5 A 6ES5 441-8MA11 12 3 4 5 6
Switching frequency - resistive load - inductive load Total permissible current of outputs Driving of digital input Paralleling of 2 outputs - maximum current Permissible ambient temperature of PLC - horizontal arrangement - vertical arrangement Length of cable - unshielded Insulation rating
max. 100 Hz max. 2 Hz 4A possible possible 0.8 A
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 12 V AC 1xB 14 mA 15 mA 2W
C
1 2 3 4 5 6 7 8 9 10
Rated insulation voltage* (+9 V to ) - insulation group Current consumption - from +9 V (CPU) typ. - from L+(without load) typ. Power loss of the module typ. Weight
L+
M
approx. 220 g (7.7 oz.)
* Relevant only for isolated assembly in the ET 100/200U
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
14-28
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Output Module 4 x 24 to 60 V DC/0.5 A
www..com
(6ES5 450-8MB11)
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range Output current for "1" signal - rated value - permissible range - lamp load Residual current at "0" signal Short-circuit protection 4 yes (optocoupler) 4 24 to 60 V DC 20 to 72 V
F .0 .4
1 2 3 4
L+ M
0.5 A 5 mA to 0.5 A max. 5 to 12 W max. 1 mA short-circuit protected output with autom. switch on when the short-circuit does not exist any more short circuit/ no load voltage L+ possible
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
Fault LED (red)
5
Error diagnostics Voltage induced on circuit interruption (internal) limited to - 30 V Switching frequency - resistive load max. 100 Hz - inductive load max. 2 Hz Total permissible current of outputs Driving of digital input Paralleling of 2 outputs - maximum current Permissible ambient temperature of module - horizontal arrangement
+9 V GND Data
DIGITAL OUTPUT
4 x 24 - 60 V DC/0.5A 6ES5 450-8MB11 1 2 34 5 6
2A possible possible 2x0.4 A
- vertical arrangement Length of cable - unshielded Insulation rating Rated insulation voltage - (+9 V to L+) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 60 V AC 2xB 500 V AC 12 V AC 1xB 500 V AC typ. typ. typ. 15 mA 30 mA (at 60 V) 5W
1 2
3 4
5 6
7 8
9 10
Current consumption - from +9 V (CPU) - from L+ (without load) Power loss of the module Weight
L+
M
X.0 X.1 X.2 X.3
approx. 200 g (7 oz.)
EWA 4NEB 812 6120-02b
14-29
Module Spectrum
S5-100U
Digital Output Module 4 x 115 to 230 V AC/1 A
www..com
(6ES5 450-8MD11)
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L1 - rated value - frequency - permissible range Output current for "1"signal - rated value - permissible range - lamp load Contact current closing rating: Residual current at "0" signal Output voltage - "1" signal Signal status display (green LEDs) Short-circuit protection
FF 10A
4 yes 4 115 to 230 V AC max. 47 to 63 Hz 85 to 264 V
L1 F .0 .4
1 2 3 4
N
1A 50 mA to 1 A max. 25/50 W determined by the size of the fuse max. 3/5 mA max. L1 (- 7 V) only with load connected fuse (10 A extra fast) (Wickmann No. 19231, or 6ES5 980-3BC41) fuse blown * max. 10 Hz 4A possible not possible
.1 .5
5 6
.2 .6
7 8
.3 .7
9 10
3
DIGITAL OUTPUT
4x115/230V AC/1A 6ES5 450-8MD11 1 2 34 5 6
Fault LED (red) Switching frequency Permissible current of all outputs Driving of digital input Paralleling of outputs Permissible ambient temperature of module - horizontal arrangement
+9 V GND Data
- vertical arrangement Length of cable - unshielded Insulation rating Rated insulation voltage (+9 V to L1) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with Current consumption - from +9 V (CPU) Power loss of the module Weight
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 250 V AC 2xB 1500 V AC 12 V AC 1xB 500 V AC typ. 14 mA
1 2
3 4
5 6
7 8
9 10
L1
N
X.0 X.1 X.2 X.3
typ. 3.5 W approx. 315 g (11 oz.)
* Indication only given if load voltage is applied and at least one load is connected
14-30
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Output Module 8 x 24 V DC/1 A
www..com
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range (including ripple) - value at t<0.5 s Output current for "1" signal - rated value - permissible range - lamp load Residual current at "0" signal Output voltage - at "1" signal Short-circuit protection
(6ES5 451-8MA11)
8 yes (optocoupler) 8 24 V DC 20 to 30 V 35 V
1
L+ M
F .0 .1 .2 .3 .4 .5 .6 .7
2 4 3 6 5 8 7 10 9
1A 5 mA to 1A max. 10 W max. 0.5 mA max. L+ (- 0.6 V) short-circuit protected output with autom. switch on when the short-circuit does not exist any more short-circuit
5
Fault LED (red) Voltage induced on circuit interruption (internal) limited to Switching frequency - resistive load - inductive load Permissible current of all outputs Driving of digital input Paralleling of 2 outputs - maximum current Permissible ambient temperature of module - horizontal arrangement - vertical arrangement Length of cable - unshielded Insulation rating Rated insulation voltage (+ 9 V to L+) - insulation group - tested with Rated insulation voltage (+ 9 V to ) - insulation group - tested with Current consumption - from +9 V (CPU) - from L+ (without load) Power loss of the module Weight
-15 V max. 100 Hz max. 2 Hz 6A possible paarweise possible 1.8 A
DIGITAL OUTPUT
8 x 24 V DC/1 A 6ES5 451-8MA11 12 3 4 5 6
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 24 V AC 2xB 500 V AC 12 V AC 1xB 500 V AC typ. typ. 35 mA 50 mA
1 2
3 4
5 6
7 8
9 10
L+
M X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
typ. 3 W approx. 230g (8 oz.)
EWA 4NEB 812 6120-02b
14-31
Module Spectrum
S5-100U
Digital Output Module 8 x 115 to 230 V AC/0.5 A
www..com
(6ES5 451-8MD11)
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L1 - rated value - frequency - permissible range Output current for "1" signal - rated value - permissible range - lamp load Contact current closing rating: Residual current at "0" signal Output voltage - at "1" signal Signal Status Display (green LEDs) Short-circuit protection 8 yes (optocoupler) 8 115 to 230 V AC 47 to 63 Hz 85 to 264 V
1 2
L1 N
max.
.0 .1 .2 .3 .4 .5 .6 .7
FF 10A
4 3 6 5 8 7 10 9
max.
0.5 A 50 mA to 0.5 A 25/50 W determined by the size of the fuse
max. max.
3/5 mA L1 (-7 V) only with load connected fuse (10 A extra fast) (Wickmann No. 19231, or 6ES5 980-3BC41) 10 Hz 4A possible not possible
3
Switching frequency Permissible current of all outputs Driving of digital input Paralleling of outputs Permissible ambient temperature of module - horizontal arrangement - vertical arrangement
+9 V GND Data
max.
DIGITAL OUTPUT
8 x 115/230 V AC/0.5 A 6ES5 451-8MD11 12 3 4 5 6
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) 100 m (330 ft.) VDE 0160 250 V AC 2xB 1500 V AC 12 V AC 1xB 500 V AC 25 mA 3.5 W 270 g (9 oz.)
1 2
3 4
5 6
7 8
9 10
Length of cable - unshielded max. Insulation rating Rated insulation voltage (+9 V to L1) - insulation group - tested with Rated insulation voltage (+9 V to ) - insulation group - tested with Current consumption - from +9 V (CPU) typ. Power loss of the module typ. Weight approx.
L1
N
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
14-32
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Output Module 8 x 5 to 24 V DC/0.1 A
www..com
(6ES5 453-8MA11)
Technical specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range (including ripple) - value at t<0.5 s Output voltage Output current for "1" signal - rated value Short-circuit protection .3 .4 .5 .6 .7
5 8 7 10 9
8 yes 8 5 to 24 V DC 4.75 to 30 V 35 V TTL-compatible 1
1 2
L+ M
4 3 6
.0 .1 .2
100 mA none - 19 V (at 24 V) 100 Hz 2 Hz possible
Voltage induced on circuit interruption (internal) limited to Switching frequency - resistive load - inductive load Paralleling of 2 outputs Permissible ambient temperature of module - horizontal arrangement
8
max. max.
- vertical arrangement Length of cable - unshielded Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Current consumption - from +9 V (CPU) - from L+ (without load) Power loss of the module Weight
43 V 1 1 2 L+ M 3 4 5 6 7 8 9 10
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 12 V AC 1xB 500 V AC typ. typ. typ. approx. 20 mA 28 mA 1W 220 g (8 oz.)
DIGITAL OUTPUT
8 x 5...24 V DC/0,1 A 6ES5 453-8MA11 12 3 4 5 6
+9 V GND Data
transistor with open collector, switching to M potential
X.1 X.0 X.3 X.2 X.5 X.4 X.7 X.6
EWA 4NEB 812 6120-02b
14-33
Module Spectrum
S5-100U
Relay Output Module 8 x 30 V DC/230 V AC Crimp Snap-in Connector, 40-pin www..com Screw Plug Connector, 20-pin Screw Plug Connector, 40-pin
(6ES5 451-8MR12) (6ES5 490-8MA13/-8MA03) (6ES5 490-8MB21) (6ES5 490-8MB11)
Technical specifications Outputs 8 relay outputs, contact switching varistor SIOVS07-K275 yes 2 with signal status display 3A Dold OW 5699 max. max. 3 A at 250 V AC 1.5 A at 30 V DC 0.5 A at 250 V AC 0.5 A at 30 V DC
F
RELAY OUTPUT
8x30 V DC
Galvanic isolation - in groups of Continuous current Ith Relay type Switching capacity of the contacts - resistive load - inductive load
1 3 3 3
1 3
1 2 3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
.0
5 7 5 5 5 7
.4
4 5 6
.1
9 11 11 11 9 11
7
.5
8 9 10
.2
13 15 13 13 13 15
.6
11 12 13 14
Operating cycles of the contacts according to VDE 0660, part 200 - AC - 11 - DC - 11 Switching frequency max. Fault LED (red) Permissible ambient temperature of module - horizontal arrangement - vertical arrangement Length of cable - unshielded Insulation rating Rated insulation voltage (+ 9 V to L 1) - insulation group - tested with Rated insulation voltage (+ 9 V to ) - insulation group - tested with Rated insulation voltage (between contacts) - insulation group - tested with Supply voltage L+ (for the relay) - rated value - ripple VPP - permissible range (ripple included) - value to t <0.5 s Current consumption - from + 9 V (CPU) - from L+ Power loss of the module Weight max.
1 x 106 0.5 x 106 10 Hz no input voltage 0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) 100 m (330 ft.) VDE 0160 250 V AC 2xB 1500 V AC 12 V AC 1xB 500 V AC 250 V AC 2xB 1500 V AC 24 V DC 3.6 V 20 to 30 V 35 V
.3
17 M 19 7 123 17
.7
15 16 17 18 19 20
.+24V 19
+9 V GND Data
A
1 X.0 3 5 X.1 7 9 X.2 11 13 X.3 15 17 19
B
1 3 5 7 9 11 13 15 17 19 X.7 X.6 X.5 X.4
max.
typ. typ. typ. approx.
30 mA 70 mA 1.6 W 300 g (11 oz.)
M
L+
14-34
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Relay Output Module 4 x 30 V DC/230 V AC
www..com
(6ES5 452-8MR11)
Technical specifications Outputs 4 relay outputs, contact switching varistor SIOV-S07K275 yes (optocoupler) 1 5A Siemens V 23127-D 0006A402 max. max. 5 A at 250 V AC 2.5 A at 30 V DC 1.5 A at 250 V AC 0.5 A at 30 V DC
1 2
L+ M
Galvanic isolation - in groups of Continuous current Ith Relay type Switching capacity of the contacts - resistive load - inductive load
.0 .4
3
.1 .5
4 5
.2 .6
6 7
.3 .7
8 9
Operating cycle of the contacts according to VDE 0660, part 200 - AC-11 - DC-11 Switching frequency max. Permissible ambient temperature of module - horizontal arrangement - vertical arrangement
7
1.5 x 106 0.5 x 106 10 Hz
10
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) max. 100 m (330 ft.) VDE 0160 250 V AC 2xB 1500 V AC 12 V AC 1xB 500 V AC 250 V AC 2xB 1500 V AC
Length of cable - unshielded RELAY OUTPUT
4 x 30 V DC/230 V AC 6ES5 452-8MR11 1 2 3 4 5 6
+9 V GND Data
Insulation rating Rated insulation voltage (+ 9 V to L1) - insulation group - tested with Rated insulation voltage (+ 9 V to ) - insulation group - tested with Rated insulation voltage (between contacts) - insulation group - tested with Supply voltage L+ (for the relay) - rated value - ripple Vpp max. - permissible range (ripple included) - value at t<0.5 s Current consumption - from + 9 V (CPU) - from L+ Power loss of the module Weight typ. typ. typ. approx.
24 V DC 3.6 V 20 to 30 V 35 V 14 mA 100 mA 2W 240 g (8 oz.)
1 2 L+ M
3 4
5 6
7 8
9 10
X.0
X.1
X.2
X.3
EWA 4NEB 812 6120-02b
14-35
Module Spectrum
S5-100U
14.6.3 Digital Input/Output Modules
www..com
Digital Input/Output Module with LED Display Crimp Snap-in Connector, 40-pin Screw Plug Connector, 40-pin
(6ES5 482-8MA13) (6ES5 490-8MA13/-8MA03) (6ES5 490-8MB11)
OUT
n+1 n
DIGITAL
32x24V DC
IN
n+1 n
F
.0
F
L+ n+1 .0 0.5A .1 .2 .3 .4 .5 .7 .6 .7 .0 NC NC n .0 .1 .2 .7 .3 .4 .5 .6 6 123 .7 M
L+ n+1 .0 .1 .2 .3 .4 .5 .6 .7 M L+ n .0 .1 .2 .3 .4 .5 .6 .7 M
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
0.5A
+9 V GND Data
M L+ X.0 X.1 X.2 X.3 500 X.4 mA X.5 X.6 X.7 M L+ X.0 X.1 X.2 500X.3 X.4 mA X.5 X.6 X.7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
180 K
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 M
X.0 X.1 X.2 X.3 X.4 X.5 X.6 X.7 NC NC X.0 X.1 X.2 X.3 X.4 X.5 X.6 X.7 L+
14-36
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Digital Input/Output Module with LED Display (continued)
www..com
(6ES5 482-8MA13)
Technical specifications Cable length - unshielded Rated insulation voltage (+9 V to ) - insulation group Power loss of the module Weight typ. 100 m (330 ft.) 12 V AC 1xB 4.5 W
Output side Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value - permissible range (ripple included) - value at t<0.5 s Output current IN for "1" signal - rated value - permissible range Residual current for "0" signal Short-circuit protection Short-circuit indication Output voltage for "1" signal Voltage induced on circuit interruption (internal) limited to Switching frequency with - resistive load - inductive load Permissible total current of the outputs Driving of a digital input possible 1.5 mA typ. 50 mA Paralleling of outputs - maximum current Current consumption - from +9 V (CPU) - from L+ (without load) Lamp load typ. typ. max. max. 16 no 8 24 V DC 20 to 30 V 35 V
approx. 190 g (7 oz.)
Input side Number of inputs Galvanic isolation - in groups of Input voltage L+ - rated value - for "0" signal - for"1" signal Input current for "1" signal Inherent delay - from "0" to "1" - from "1" to "0" Fault LED (red) 16 no 16 24 V DC 0 to 5 V 13 to 30 V
500 mA 5 to 500 mA 0.5 mA yes red LED L+(- 0.6 V)
typ. typ. typ.
4.5 mA 4 ms 3 ms indicates interruption of L+/M supply
- 15 V 100 Hz 2 Hz 6A possible possible in pairs (0.8xIN) 10 mA 100 mA 5W
Connection of two-wire BERO proximity switches - residual current Current consumption - from +9 V (CPU)
EWA 4NEB 812 6120-02b
14-37
Module Spectrum
S5-100U
14.7
Analog Modules
www..com
14.7.1 Analog Input Modules
Analog Input Module 4 x 50 mV (6ES5 464-8MA11)
broken wire
4 3 2 1 operating mode 1+ Comp. 23+ Ch.0 45+ 67+ Ch.2 89+ Ch.3 10 Ch.1
6
ANALOG INPUT
4 x50 mV 6ES5 464-8MA11 1 2 3 4 5 6
+9 V GND Data
broken wire
1 2 + +
3 4 +
5 6 +
7 8 +
9 10 -
Compensating box
Cu Cu Fe Ko Ch.0 Ch.1 Ch.2 Ch.3 Terminal box
14-38
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x 50 mV (continued)
www..com
(6ES5 464-8MA11)
Technical specifications Input ranges (rated values) Number of inputs Galvanic isolation 50 V 1, 2 or 4 (selectable) yes (inputs to grounding point; not between inputs) 10 M two-wire connection 12 bits+sign (2048 units = rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz Noise suppression for f=nx (50/60 Hz1%); n=1, 2, ... - common-mode rejection (Vpp=1 V) - series-mode rejection (peak value of noise min. min.
86 dB 40 dB
Input resistance Connection method of sensors Digital representation of input signal Measured value representation Measuring principle Conversion principle
0.15 % 0.4 %
0.05 % 0.05 % 0.05 % 0.01 %/K 0.002 %/K 50 m (164 ft.) none possible VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC 70 mA 0.7 W 230 g (8 oz.)
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded
max. 1V max. 75 V DC/60 V AC
max. 24 V DC yes (more than 4095 units) yes (selectable) red LED
- sensor wire break - general indication of wire break
EWA 4NEB 812 6120-02b
14-39
Module Spectrum
S5-100U
Analog Input Module 4 x 50 mV
www..com
(6ES5 464-8MA21)
broken wire 8 7 6 5 4 3 2 operating 1 mode 1+ Comp. 23+ Ch.0 45+ 67+ Ch.2 89+ Ch.3 10 Ch.1
6
ANALOG INPUT
4 x50 mV 6ES5 464-8MA21 1 2 3 4 5 6
+9 V GND Data
broken wire
1 2 + +
3 4 +
5 6 -+
7 8 +
9 10 -
Cu Cu Comp. Fe Ko Ch.0 Ch.1 Ch.2 Ch.3
14-40
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x 50 mV (continued)
www..com
(6ES5 464-8MA21)
Technical specifications Input range (rated values) Number of inputs Galvanic isolation 50 mV 1, 2 or 4 (selectable) yes (inputs to grounding point; not between inputs) 10 M two-wire connection 12 bits + sign (2048 units = rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz Noise suppression for f = nx (50/60 Hz1%) n = 1, 2, ... - common mode rejection (Vpp = 1 V) - series mode rejection (peak value of noise < rated value of input range) Basic error limits Operating error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - tolerance - polarity reversal error Temperature error - final value - zero point Linearization exactness for rated range (for types J,K,L) Characteristic linearization for the following thermoelements - Nickel-Chromium/ Nickel-Aluminium (Type K) - Iron/Copper-Nickel (Type J) - Iron/Copper-Nickel (Type L) Length of cable - shielded Supply voltage L+ max. max. 1 V 75 V DC/60 V AC Connection of compensating box Insulation rating Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break max. 24 V DC yes (more than 4095 units) yes (selectable) red LED Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (inputs to + 9 V) - insulation group - tested with Current consumption - from + 9 V (CPU) Power loss of the module Weight typ. typ. approx. max.
min. 86 dB min. 40 dB
Input resistance Connection method of sensors Digital representation of input signal Measured value representation Measuring principle Conversion principle
0.15% 0.4%
0.05% 0.05% 0.05% 0.01 %/K 0.002 %/K
1 C (1.8 F)
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point
max. max. max. max.
60 ms at 50 Hz 50 ms at 60 Hz 80 ms at 50 Hz 66.6 ms at 60 Hz
IEC 584 IEC 584 DIN 43710 50 m (164 ft.) none possible VDE 0160 12 V AC 1xB 500 V DC 60 V AC 1xB 500 V AC 100 mA 0.7 W 230 g (8 oz.)
EWA 4NEB 812 6120-02b
14-41
Module Spectrum
S5-100U
Analog Input Module 4 x 1 V
www..com
(6ES5 464-8MB11)
broken wire
4 3 2 1 operating mode
3+ Ch.0 45+ 67+ Ch.2 89+ Ch.3 10 Ch.1
6
ANALOG INPUT
4 x 1V 6ES5 464-8MB11 1 2 3 4 5 6
+9 V GND Data
broken wire
1 2 +
3 4 +
5 6 -+
7 8 +
9 10 -
Ch.0
Ch.1
Ch.2
Ch.3
14-42
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x 1 V (continued)
www..com
(6ES5 464-8MB11)
Technical specifications Input ranges (rated values) Number of inputs Galvanic isolation 1V 1, 2 or 4 (selectable) yes (inputs to grounding point; not between inputs) 10 M two-wire connection 12 bits+sign (2048 units = rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz Noise suppression for f=nx (50/60 Hz1%); n=1, 2, ... - common-mode rejection (Vpp=1 V) - series-mode rejection (peak value of noise < rated value of input range) Basic error limits Operational error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - tolerance - polarity reversal error Temperature error - final value - zero point Length of cable - shielded Supply voltage L+ Connection of compensating box Insulation rating max. max. max. max. 60 ms at 50 Hz 50 ms at 60 Hz 80 ms at 50 Hz 66.6 ms at 60 Hz Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (inputs to +9 V) - insulation group - tested with Current consumption - from+9 V (CPU) max. 24 V DC yes (more than 4095 units) yes (selectable) red LED Power loss of the module Weight typ. typ. approx. max.
min. min.
86 dB 40 dB
Input resistance Connection method of sensors Digital representation of input signal Measured value representation Measuring principle Conversion principle
0.1 % 0.35 %
0.05 % 0.05 % 0.05 % 0.01 %/K 0.002 %/K 200 m (660 ft.) none not possible VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC 70 mA 0.7 W 230 g (8 oz.)
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break
max. max.
1V 75 V DC/60 V AC
EWA 4NEB 812 6120-02b
14-43
Module Spectrum
S5-100U
Analog Input Module 4 x 10 V
www..com
(6ES5 464-8MC11)
4 3 2 1 operating mode
3+ Ch.0 45+ 67+ Ch.2 89+ Ch.3 10 Ch.1
6
ANALOG INPUT
4 x 10 V 6ES5 464-8MC11 1 2 3 4 5 6
+9 V GND Data
2,5 k 47 k
1 2 +
3 4 +
5 6 +
7 8 +
9 10 -
Ch.0
Ch.1
Ch.2
Ch.3
14-44
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x 10 V (continued)
www..com
(6ES5 464-8MC11)
Technical specifications Input ranges (rated values) Number of inputs Galvanic isolation 10 V 1, 2 or 4 (selectable) yes (inputs to grounding point; not between inputs) 50 k two-wire connection 12 bits+sign (2048 units =rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz Noise suppression for f=nx (50/60 Hz1%); n=1,2, ... - common-mode rejection (Vpp=1 V) - series-mode rejection (peak value of noise < rated value of input range) Basic error limits Operational error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - tolerance - polarity reversal error Temperature error - final value - zero point Length of cable - shielded Supply voltage L+ Connection of compensating box max. max. max. max. 60 ms at 50 Hz 50 ms at 60 Hz 80 ms at 50 Hz 66.6 ms at 60 Hz Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (inputs to +9 V) - insulation group - tested with Current consumption - from +9 V (CPU) Power loss of the module Weight typ. typ. approx. max.
min. min.
86 dB 40 dB
Input resistance Connection method of sensors Digital representation of input signal Measured value representation Measuring principle Conversion principle
0.2 % 0.45 %
0.05 % 0.05 % 0.05 % 0.01 %/K 0.002 %/K 200 m (660 ft.) none not possible VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC 70 mA 0.7 W 230 g (8 oz.)
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break
max. max.
1 V 75 V DC/60 V AC
max.
50 V DC yes (more than 4095 units) no no
EWA 4NEB 812 6120-02b
14-45
Module Spectrum
S5-100U
Analog Input Module 4 x 20 mA
www..com
(6ES5 464-8MD11)
4 3 2 1 operating mode
3+ Ch.0 45+ 67+ Ch.2 89+ Ch.3 10 Ch.1
6
ANALOG INPUT
4 x 20 mA 6ES5 464-8MD11 1 2 3 4 5 6
+9 V GND Data
+9 V GND Data
25
25
1 2 +
3 4 +
5 6 +
7 8 +
9 10
1 2 +
3 4 +
5 6 +
7 8 +
9 10
U
Four-wire transducer
Two-wire transducer
Ch.0
Ch.1
Ch.2
Ch.3
+
U
-
+
U
-
14-46
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x 20 mA (continued)
www..com
(6ES5 464-8MD11)
Technical specifications Input ranges (rated values) Number of inputs Galvanic isolation 20 mA 1, 2 or 4 (selectable) yes (inputs to grounding point; not between inputs) 25 two-wire connection 12 bits+sign (2048 units =rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz Noise suppression for f=nx (50/60 Hz1%); n=1,2, ... - common-mode rejection (Vpp=1 V) - series-mode rejection (peak value of noise min. min.
86 dB 40 dB
Input resistance Connection method of sensors Digital representation of input signal Measured value representation Measuring principle Conversion principle
0.2 % 0.45 %
0.05 % 0.05 % 0.05 % 0.01 %/K 0.002 %/K 200 m (660 ft.) none not possible VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC 70 mA 0.7 W 230 g (8 oz.)
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break
max. max.
1 V 75 V DC/60 V AC
max.
80 mA yes (more than 4095 units) no no
EWA 4NEB 812 6120-02b
14-47
Module Spectrum
S5-100U
Analog Input Module 4 x 4 to 20 mA
www..com
(6ES5 464-8ME11)
4 3 2 1 operating mode L+ 1 M 2 3+ Ch.0 45+ 67+ Ch.2 89+ Ch.3 10 Ch.1
+ 24V
6
ANALOG INPUT
4 x 4 ... 20 mA 6ES5 464-8ME11 1 2 3 4 5 6
+9 V GND Data
+9 V GND Data
31,2
31,2
1 2 +
3 4 +
5 6 +
7 8 +
9 10
1 2
3 4
5 6
7 8
9 10
L+
M
Ch.0 Ch.1 Ch.2 Ch.3 U
+ - +- +- + Four-wire transducer
14-48
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x 4 to 20 mA (continued)
www..com
(6ES5 464-8ME11)
Technical specifications Input ranges (rated values) Number of inputs Galvanic isolation 4 to 20 mA 1, 2 or 4 (selectable) yes (inputs to grounding point; not between inputs) 31.25 two-wire connection for 2/4 wire transducers 12 bits+sign (2048 units =rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz Noise suppression for f=nx (50/60 Hz1%); n=1, 2, ... - common-mode rejection (Vpp=1 V) - series-mode rejection (peak value of noise min. min.
86 dB 40 dB
Input resistance Connection method of sensors Digital representation of input signal Measured value representation Measuring principle Conversion principle
0.15 % 0.4 %
0.05 % 0.05 % 0.01 %/K 0.002 %/K 200 m (660 ft.)
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break
24 V DC 3.6 V 20 to 30 V not possible VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC 70 mA 80 mA
max. max. max. max.
60 ms at 50 Hz 50 ms at 60 Hz 80 ms at 50 Hz 66.6 ms at 60 Hz
max. max.
1 V 75 V DC/60 V AC
max.
80 mA yes (more than 4095 units) no no
Power loss of the module - for 2-wire transducers typ. - for 4-wire transducers typ. Weight approx.
1.0 W 0.7 W 230 g (8 oz.)
EWA 4NEB 812 6120-02b
14-49
Module Spectrum
S5-100U
Analog Input Module 2 x PT 100/500 mV
www..com
(6ES5 464-8MF11)
broken wire
4 3 2 1 operating mode IC+ 7 M+ 3 Ch.0 4 8 9 5 MIC-
IC+ M+
Ch.1
6 10
MIC-
6
ANALOG INPUT
2xPt100 6ES5 464-8MF11 1 2 3 4 5 6
+9 V GND Data
broken wire
1 2 +
3 4 +
5 6 +
7 8 +
9 10 -
2xPT100
Ch.0
Ch.1
IC0
IC1
14-50
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 2 x PT 100/500 mV (continued)
www..com
(6ES5 464-8MF11)
Technical specifications Input range (rated values) - resistance sensor (PT 100) - voltage sources Number of inputs Galvanic isolation Noise suppression for f = nx (50/60 Hz1%) n = 1, 2, ... - common mode rejection (Vpp=1 V) - series mode rejection (peak value of noise < rated value of input range) Basic error limits Operating error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - tolerance - polarity reversal error Temperature error - final value - zero point Length of cable - shielded Supply voltage L+ Auxiliary current for PT 100 Resistance sensor - tolerance - temperature error - load dependency Insulation rating 60 ms at 50 Hz 50 ms at 60 Hz 80 ms at 50 Hz 66.6 ms at 50 Hz Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (inputs to + 9 V) - insulation group - tested with Current consumption - from + 9 V (CPU) max. 24 V DC yes (more than 4095 units) yes (selectable) red LED Power loss of the module Weight typ. typ. approx. max.
0 to 200 (max. 400 ) 500 mV 1 or 2 (selectable) yes (inputs to grounding point; not between inputs) 10 M two or four-wire connection 12 bits + sign (2048 units = rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz
min. min.
86 dB 40 dB
0.15% 0.4%
Input resistance Connection method of sensors Digital representation of input signal
0.05% 0.05% 0.05% 0.01 %/K 0.002 %/K 200 m (660 ft.) none 2.5 mA 0.05% 0.006%/K 0.02%/100 VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC 70 mA 0.9 W 230 g (8 oz.)
Measured value representation Measuring principle Conversion principle
Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units max. max. - for 4095 units max. max. Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break
max. max.
1V 75 V DC/60 V AC
EWA 4NEB 812 6120-02b
14-51
Module Spectrum
S5-100U
Analog Input Module 2 x PT 100/500 mV
www..com
(6ES5 464-8MF21)
broken wire 8 7 6 5 4 3 2 1 operating mode I + C 7 M+ 3 Ch.0 4 8 9 5 MIC-
IC+ M+
Ch.1
6 10
MIC-
6
ANALOG INPUT
2xPt100 6ES5 464-8MF21 1 2 3 4 5 6
+9 V GND Data
broken wire
1 2 +
3 4 +
5 6 +
7 8 +
9 10 -
2xPT100
Ch.0
Ch.1
IC0
IC1
14-52
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 2 x PT 100/500 mV (continued)
www..com
(6ES5 464-8MF21)
Technical specifications Input range (rated values) - resistance sensor (PT 100) - voltage source Number of inputs Galvanic isolation Noise suppression for f = nx (50/60Hz 1%); n = 1, 2, ... - common mode rejection (V = 1 V) min. PP - series-mode rejection min. (peak value of noise < rated value of input range) Basic error limits Operational error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - tolerance - polarity reversal error Temperature error - final value - zero point Linearization exactness in rated range Characteristic linearization of PT 100-characteristic curve Length of cable - shielded max. max. max. max. 60 ms at 50 Hz 50 ms at 60 Hz 80 ms at 50 Hz 66.6 ms at 60 Hz max.
0 to 200 (max. 400 ) 500 mV 1 or 2 (selectable) yes (inputs to grounding point; not between inputs) 10 M two or four-wire connection 12 bits + sign (2048 units = rated value) two's complement (left-justified) integrating voltage-time conversion (dual slope) 20 ms at 50 Hz 16.6 ms at 60 Hz
86 dB 40 dB
0.15% 0.4 %
Input resistance Connection method of sensors Digital representation of input signal
0.05% 0.05% 0.05% 0.01%/K 0.002%/K 0.5 C (0.9 F)
Measured value representation Measuring principle Conversion principle Integration time (adjustable for optimum noise suppression) Encoding time per input - for 2048 units - for 4095 units Permissible voltage difference - between inputs - between inputs and central ground point Permissible input voltage (destruction limit) Fault indication for - range exceeded - sensor wire break - general indication of wire break
DIN IEC 751 200 m (660 ft.) none 2.5 mA 0.05% 0.006%/K 0.02%/100 VDE 0160 12 V AC 1xB 500 V AC 60 V AC 1xB 500 V AC
Supply voltage L + Auxiliary current for PT 100 Resistance-type sensor - tolerance - temperature error - influence of load variation Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (inputs to + 9V) - insulation group - tested with Current consumption - from + 9 V (CPU) Power loss of the module Weight typ. typ. approx.
max. max.
1V 75 V DC/60 V AC
max.
24 V DC yes (more than 4095 units) yes (selectable) red LED
100 mA 0.9 W 230 g (8 oz.)
EWA 4NEB 812 6120-02b
14-53
Module Spectrum
S5-100U
Analog Input Module 4 x +0 to 10 V
www..com
(6ES5 466-8MC11)
3+ Ch.0 45+ Ch.1 67+ Ch.2 89+ Ch.3 10 -
6
ANALOG INPUT
4 x 0 ...10 V 6ES5 466-8MC11 1 2 3 4 5 6
+9 V GND Data
D
A
10 k 90 k
1 2 +
3 4 +
5 6 -+
7 8 +
9 10 -
Ch.0
Ch.1
Ch.2
Ch.3
14-54
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Input Module 4 x +0 to 10 V (continued)
www..com
(6ES5 466-8MC11)
Technical specifications Input ranges (rated values) Number of inputs Galvanic isolation Input resistance Connection for the signal sensor Digital representation of the input signal Representation of the measured value Measuring principle Conversion time Encoding time per input Permissible voltage difference - between inputs Basic error limits +0 to 10 V 4 no 100 k 2-wire connection 8 bits (256 units = rated value) binary * successive approximation 100 s 5 ms Single errors - linearity - tolerance Temperature error - final value - zero point Length of cable - shielded Supply voltage L+ Current consumption - from + 9 V (CPU) Power loss of the module Weight typ. typ. approx. max. 0.1% 0.1% 0.01% K 0.01% K 200 m (660 ft.) none 100 mA 0.9 W 200 g (7 oz.) Operational error limits (0 to 60 C) (32 to 140 F) 0.6% 0.4%
max.
1 V 60 V DC no no no
Permissible input voltage (destruction limit) max. Fault indication for - range exceeded - sensor wire break - general indication of wire break Noise suppression - common mode interference (V =1 V) min. PP
86 dB
*
Units
255 254 192 191 128 127 64 63 1 0
Input voltage in V
9.961 9.922 7.500 7.461 5.000 4.961 2.500 2.461 0.039 0.000
Bit 76543210 27 26 25 24 23 22 21 20
1 1 1 1 1 0 0 0 0 0 1 1 1 0 0 1 1 0 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 1 0
EWA 4NEB 812 6120-02b
14-55
Module Spectrum
S5-100U
14.7.2 Analog Output Modules
Analog Output Module 2 x 10 V
Technical specifications Output range (rated values) Number of outputs Galvanic isolation
www..com
(6ES5 470-8MA12)
10 V 2 yes (outputs to grounding point and between outputs) min. 3.3 k two or four-wire connection 11 bits + sign (1024 units = rated value) two's complement (left-justified) max. 0.15 ms 25% yes 30 mA
Input resistance
L+ 1 2 M QV
+
24 V
Connection method Digital representation of output signal Measured value representation Conversion time (0 to 100%) Permissible overload Short-circuit protection Short-circuit current Permissible voltage difference to ground and between outputs
4 3 S+ Ch.0 SR
5 6 MANA QV 8 7 S+ Ch.1 SR
9
10 MANA R 3,3k 6
max.
75 V DC/60 V AC 0.3%
Basic error limits Operational error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - polarity reversal error - temperature error
+9 V GND Data
ANALOG OUTPUT
2 x 10 V 6ES5 470-8MA12 12 3 4 5 6
0.6% 0.2% 0.1% 0.01%/K max. 200 m (660 ft.)
Length of cable - shielded Supply voltage L+ (peripheral) - rated value - ripple V PP - permissible range (ripple included) Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with
0V - 15V +15V
24 V DC 3.6 V 20 to 30 V VDE 0160 12 V AC 1xB 500 V AC
1 2
3 4
5 6
7 8
9 10
S+ QV S- MA S+ QV S- MA
Rated insulation voltage (Output to L +, between outputs, output to + 9V) - insulation group - tested with Current consumption - from + 9 V (CPU) - from L + typ. typ. typ. approx.
60 V AC 1xB 500 V AC 120 mA 100 mA 3.1 W 220 g (8 oz.)
L+
M Ch.0 Ch.1
Power loss of the module Weight
Legend: QV: Analog output "voltage"
14-56
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Output Module 2 x 20 mA
www..com
Technical specifications Output range (rated values) Number of outputs Galvanic isolation
(6ES5 470-8MB12)
20 mA 2 yes (outputs to grounding point and between outputs) max. 300 two-wire connection 11 bits + sign (1024 units =rated value) two's complement (left-justified) max. 0.15 ms 25% yes 12 V
Input resistance
L+ 1 2 4 M QI 24 V
+
Connection method Digital representation of output signal
Ch.0
R
Measured value representation Conversion time (0 to 100%) Permissible overload Short-circuit protection Leerlaufspannung Permissible voltage difference to central ground point and between outputs
6 8
MANA QI
Ch.1
R
10 M ANA R 300 6
max.
75 V DC/60 V AC 0.3%
Basic error limits Operating error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - polarity reversal error - temperature error
+9 V GND Data
ANALOG OUTPUT
2 x 20 mA 6ES5 470-8MB12 12 3 4 5 6
0.6% 0.2% 0.1% 0.01%/K max. 200 m (660 ft.) 24 V DC 3.6 V 20 to 30 V VDE 0160 12 V AC 1xB 500 V AC
Length of cable - shielded Supply voltage L+ - rated value - ripple V PP - permissible range (ripple included) Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (output to L+, between outputs, output to + 9 V) - insulation group - tested with Current consumption - from + 9 V (CPU) - from L + Power loss of the module
0V - 15V +15V
1 2
3 4 +QI
5 6 MANA
7 8 +QI
9 10 MANA
60 V AC 1xB 500 V AC typ. typ. typ. approx. 120 mA 130 mA 3.8 W 220 g (8 oz.)
L+
M Ch.0 Ch.1
Weight
Legend: QI: Analog output "current"
EWA 4NEB 812 6120-02b
14-57
Module Spectrum
S5-100U
Analog Output Module 2 x 4 to 20 mA
www..com
Technical specifications Output range (rated value) Number of outputs Galvanic isolation
(6ES5 470-8MC12)
4 to 20 mA 2 yes (outputs to grounding point and between outputs) max. 300 two-wire connection 11 bits + sign (1024 units = rated value) two's complement (left-justified) max. 0.15 ms 25% yes 12 V
Load resistance
1 2 4 L+
Connection method +
24 V
M QI
Digital representation of output signal
Ch.0
R
Measured value representation Conversion time (0 to 100%) Permissible overload
6 8
MANA QI
Ch.1
R
Short-circuit protection Leerlaufspannung
10 M ANA R 300 6
Permissible voltage difference to central ground point and between outputs Basic error limits
max.
75 V DC/60 V AC 0.2%
ANALOG OUTPUT
2 x 4 ... 20 mA 6ES5 470-8MC12 12 3 4 5 6
Operating error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - temperature error
+9 V GND Data
0.6% 0.2% 0.01%/K max. 200 m (660 ft.) 24 V DC 3.6 V 20 to 30 V VDE 0160 12 V AC 1xB 500 V AC
Length of cable - shielded Supply voltage L+ - rated value - ripple VPP - permissible range (ripple included) Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (outputs to L+, between outputs, output to + 9 V ) - insulation group - tested with Current consumption - from + 9 V (CPU) - from L+
0V - 15V +15V
1 2
3 4 +QI
5 6
7 8 +QI
9 10
MANA
MANA
60 V AC 1xB 500 V AC typ. typ. typ. approx. 120 mA 130 mA 3.8 W 220 g (8 oz.)
L+
M Ch.0 Ch.1
Power loss of the module Weight
Legend: QI: Analog output "current"
14-58
EWA 4NEB 812 6120-02b
S5-100U
Module Spectrum
Analog Output Module 2 x 1 ... 5 V
www..com
(6ES5 470-8MD12)
Technical specifications Output range (rated values) Number of outputs Galvanic isolation 1 to 5 V 2 yes (outputs to grounding point and between outputs) 3.3 k two or four-wire connection 11 bits + sign (1024 units=rated value) two's complement (left-justified) max. 0.15 ms 25% yes 30 mA
Input resistance Connection method
1 L+
min.
+
24 V
M 2 4 QV 3 S+ Ch.0 5 6 8 SMANA QV
Digital representation of output signal
R
7 S+ Ch.1 9 10 SMANA R
Measured value representation Conversion time (0 to 100%) Permissible overload Short-circuit protection Short-circuit current Permissible voltage difference to central ground point and between outputs Basic error limits Operating error limits (0 to 60 C) (32 to 140 F) Single errors - linearity - temperature error
R 3,3k 6
max.
75 V DC/60 V AC 0.2%
0.6% 0.2% 0.01%/K 200 m (660 ft.) 24 V DC 3.6 V 20 to 30 V VDE 0160 12 V AC 1xB 500 V AC
ANALOG OUTPUT
2 x 1 ... 5 V 6ES5 470-8MD12 12 3 4 5 6
+9 V GND Data
0V - 15V +15V
Length of cable - shielded max. Supply voltage L+ - rated value - ripple VPP - permissible range (ripple included) Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Rated insulation voltage (outputs to L+, between outputs, output to +9 V) - insulation group - tested with Current consumption - from +9 V (CPU) - from L+ Power loss of the module Weight typ. typ. typ. approx.
60 V AC 1xB 500 V AC 120 mA 100 mA 3.1 W 220 g (8 oz.)
1
3
5
7
9
10 2 4 6 8 S+ QV S- MA S+ QV S- MA
L+
M Ch.0 Ch.1
EWA 4NEB 812 6120-02b
14-59
www..com
EWA 4NEB 812 6120-02b
www..com
15
Function Modules 15.1 15.2 15.3 15.4 15.5 15.6 15.6.1 15.6.2 15.6.3 15.6.4 15.6.5 Comparator Module 2 x 1 to 20 mA/0.5 to 10 V Timer Module 2 x 0.3 to 300 s ............. 15 - 1 15 - 4 15 - 7 15 - 9 15 - 12 15 15 15 15 15 17 20 25 27 29
.........................
Simulator Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnostic Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Counter Module 2 x 0 to 500 Hz ........................
Counter Module 25/500 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . Installation Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description of the Counter Mode . . . . . . . . . . . . . . . . . Functional Description of the Position Decoder . . . . . . . . . . . . . . . Entering New Setpoints for the Counter and Position Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.6.6 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.7 15.8 15.9 15.10 15.11 15.12 Closed-Loop Control Module IP 262 IP 263 Positioning Module ......................
15 - 38 15 - 39 15 - 41 15 - 45 15 - 49 15 - 52 15 - 55 15 - 59 15 - 62 15 - 62 15 - 65
.............................
IP 264 Electronic Cam Controller Module . . . . . . . . . . . . . . . . . . . IP 265 High Speed Sub Control Positioning Module IP 266 .........................
............................. .....................
Stepper Motor Control Module IP 267
15.13 Communications Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.13.1 Printer Communications Module CP 521 . . . . . . . . . . . . . . . . . . . 15.13.2 Communications Module CP 521 BASIC . . . . . . . . . . . . . . . . . . .
EWA 4NEB 812 6120-02b
www..com
Figures
Scanning the Comparator Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scanning the Timer Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scanning the Simulator Module as a Digital Input . . . . . . . . . . . . . . . . . . Setting the Input Voltage Range on the Counter Module (500 Hz) ...... Scanning the Counter Module (500 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . Timing Diagram: Setting and Resetting an Output of the Counter Module (500 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-7 Switch Positions on the Operating Mode Switch . . . . . . . . . . . . . . . . . . . 15-8 Pin Assignment of the 15-Pin Sub-D Female Connector . . . . . . . . . . . . . 15-9 Connecting a Counting Pulse Sensor for 5-V Differential Signal to RS 422 15-10 Connecting a Counting Pulse Sensor for 24 V DC . . . . . . . . . . . . . . . . . 15-11 Connecting a 5-V Position Sensor to RS 422 . . . . . . . . . . . . . . . . . . . . . 15-12 Connecting a 24-V DC Position Sensor . . . . . . . . . . . . . . . . . . . . . . . . . 15-13 Signal Sequence for Up-Counting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-14 Assignment Diagram for the Terminal Block . . . . . . . . . . . . . . . . . . . . . . 15-15 Diagnostic Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-16 Switching the Outputs Dependent on the Status of the Counter and the Enable Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-17 Position of the Reference Point (SYNC Bit 0 --> 1) within the Reference Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-18 Position of the Reference Point (SYNC Bit 0 --> 1) after the Reference Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-19a Synchronization (SYNC Bit 0 --> 1) during a Reversal of Direction before Reaching the Reference Pulse in a Positive Direction . . . . . . . . . . 15-19b No Synchronization during a Reversal of Direction before Reaching the Reference Pulse in a Positive Direction . . . . . . . . . . . . . . . 15-20 Schematic of a Reference Point Approach Operation . . . . . . . . . . . . . . . 15-21 Enabling the Outputs - Reaching the Setpoints - Resetting the Outputs .. 15-22 Approaching a Setpoint in Up-Count Direction . . . . . . . . . . . . . . . . . . . . 15-23 Approaching a Setpoint in Down-Count Direction . . . . . . . . . . . . . . . . . . 15-24 Approaching a Setpoint in Up-Count Direction and Consecutive Reversal of Direction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-25 Requirement for New Setpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-26 Positioning with the IP 263 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-27 Units of Measurement that IP 266 Can Process for Circular Axis and Linear Axis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-28 Course of a Following Error during a Positioning Operation . . . . . . . . . . . 15-29 Velocity Profile of the IP 267 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tables 15-1 15-2 15-3 15-4 15-5 15-6 15-7 15-8 Sending Data from the Programmable Controller to the Counter Module . . . Sending Data from the Counter Module to the Programmable Controller .. Pulse Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example for a Traversing Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reaction of the Counter Module during Transfer of the Setpoints . . . . . . . . Slot Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Meaning of the Address Bytes of a Slot Address (Example: Slot 1) . . . . . . Designation of the Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15-1 15-2 15-3 15-4 15-5 15-6
15 15 15 15 15 15 15 15 15 15 15 15 15 15 15
-2 -5 -8 - 14 - 15 15 19 20 21 21 22 22 23 24 26
15 - 28 15 - 32 15 - 32 15 - 33 15 15 15 15 15 33 33 34 35 36
15 - 36 15 - 38 15 - 48 15 - 56 15 - 57 15 - 60
15 15 15 15 15 15 15 15
-
25 25 30 31 38 39 39 58
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
15
15.1
Function Modules
Comparator Module 2 x 1 to 20 mA/0.5 to 10 V
Technical Specifications Channels Galvanic isolation Current or voltage measurement Switch position "0" 0
3 4
www..com
(6ES5 461-8MA11)
2 yes switch-selectable no measuring green LED for actual value setpoint with potentiometer 10% 2% 10% 0.5 to 10 V DC 47 k typ. max. 5 ms 100 V DC ( 0.5 s) 0.5 to 20 mA 500 100% VDE 0160
Display Setpoint adjustment Setting error
U O I
Reproducibility Hysteresis "V" measuring range Input resistance Inherent delay Input voltage
1
9 10
U O I
"I" measuring range Input resistance
6
Overload capability Insulation rating
COMPARATOR
0.5 to 10V/1 to 20mA 6ES5 461-8MA11 1 2 3 4 5 6
Rated insulation voltage (+9 V to measuring circuit and between measuring circuits) - insulation - tested with
+9 V GND Data
30 V AC 2xB 500 V AC 12 V AC 1xB 500 V AC 200 m (660 ft.) 100 m (330 ft.) typ. typ. 35 mA 0.3 W
Rated insulation voltage (+9 V to ) - insulation group - tested with Length of cable - shielded - unshielded Current consumption - from +9 V (CPU) Power losses of the module Weight
approx. 200 g (7 oz.)
1 2
3 4 V
5 6
7 8
9 10 I
EWA 4NEB 812 6120-02b
15-1
Function Modules
S5-100U
Function
www..com The module has two isolated comparators for voltage or current measurement (selector switch with positions U/0/I). When the preset value is reached, the LED of the respective channel lights up and sends a "1" signal to the programmable controller.
The module must be removed or the measuring circuit disconnected before you select the function. In switch position "0", the comparator is switched off; if scanned, a "0" signal results. The response threshold of the comparator is set by a selector on the front panel. The selector has scale divisions to simplify adjustment. Installation The comparator module is mounted on a bus unit like any other input or output module (see chapter 3). Wiring See schematic diagram. Unused inputs can be left open. Addressing The comparator module is addressed like a 2-channel digital input module (channel "0" or "1"). Scan (examples) A O I I x.0 x.1 Channel "0" Channel "1"
Channel number Slot address Figure 15-1. Scanning the Comparator Module
15-2
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
Typical Application
www..com A comparator module is mounted at slot 4. The current source is connected to channel 1. If the Schmitt trigger 1 detects that the current has exceeded the preset value, output 5.1 is to be set.
Terminal Connections
1
3
5
7
9
2
4
6
8
10
+
-
STL
Explanation
A =
I Q
4.1 5.1
As soon as the limit is reached or exceeded, input 4.1 becomes "1"; this sets output 5.1 to "1".
EWA 4NEB 812 6120-02b
15-3
Function Modules
S5-100U
15.2
Timer Module 2 x 0.3 to 300 s
(6ES5 380-8MA11)
www..com
Technical Specifications Number of timers Time setting Range extension factor Function indication 0 Setting error Reproducibility Temperature influence Insulation rating
x 0.3s x 3s x 30s
2 0.3 to 3 s x10, x100 green LED 10% 3% +1%/10 C (50 F) of set time VDE 0160 12 V AC 1xB 500 V AC typ. 10 mA
1
Rated insulation voltage (+ 9 V to ) - insulation group - tested with Current consumption - from +9 V (CPU) Weight
approx. 200 g (7 oz.)
x 0.3s x 3s x 30s
6
TIMER
2 x 0.3-300s 6ES5 380-8MA11 1 2 3 4 5 6
+9 V GND Data
0.3 s
300 s
0.3 s
300 s
1 2
3 4
5 6
7 8
9 10
X.0
X.1
15-4
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
Function
www..com The module contains two pulse timers. While a timer runs, the LED of the respective channel is lit and a "1" is reported to the CPU.
The pulse duration is preselected with the time range selector "x 0.3 s / x 3 s / x 30 s" in a definite range and then set to the exact value by means of a potentiometer on the front panel. This selector has scale divisions to simplify setting. (time value=time range x scale value) Example: Time range: Scale value: Set time: x3s 7 7 x 3 s=21 s
Installation The counter is inserted into a bus unit like any other input or output module (see chapter 3). Wiring No wiring is required. Addressing A timer module is addressed like a two-channel digital module (channel "0" or "1"). The timer module is addressed like a digital output module for starting, resetting, or interrupting the pulse. The signal status is scanned like a digital input module. Starting the pulse S S R R A A Q Q Q Q I I x.0 x.1 x.0 x.1 x.0 x.1 Channel number Slot address Figure 15-2. Scanning the Timer Module Channel "0" Channel "1"
Interrupt/ Reset Scan "1" = timer running
EWA 4NEB 812 6120-02b
15-5
Function Modules
S5-100U
Typical Application as "On-Delay Timer"
www..com A timer module is mounted at slot 5. A time of 270 s is set on channel "0" of this module by means of the time-range selector and the potentiometer. The timer is started when input 0.0 is "1". A lamp lights up (output 4.0) when the timer has run down.
Terminal Connections
No process peripherals are connected to this module. Unlike the internal timers, times can be set or modified using a timer module without making any program modifications.
STL
A I 0.0 5.0 65.0 4.0 5.0 65.0 0.0 4.0 0.0 5.0
Explanation The timer must not be scanned in the program scan cycle in which it was enabled since the CPU would not receive the acknowledgement that the timer had started until one program scan later. If flag 65.0 is "1" and the timer has run down (AN I 5.0), output 4.0 is set to "1". If the "Timer started" message has been sent to the CPU, the flag is set. If I 0.0 is "0", the lamp is switched off. The timer is started if I 0.0 is "1".
AN I AF SQ AI =F AN I R A = Q I Q
15-6
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
15.3
Simulator Module
(6ES5 788-8MA11)
www..com
Technical Specifications Function selection - simulation of 8 input signals - display of 8 output signals
IN OUT
selected by switch on rear of module
Function indication "0"/"1" input signals Insulation rating
yellow LED switch-selectable VDE 0160
.0 .1 .2 .3 .4 .5 .6 .7
Rated insulation voltage (+9 V to ) - insulation group - tested with Signal status display for input/output Current consumption - from +9 V (CPU) Power loss of the module Weight typ.
12 V AC 1xB 500 V AC green LEDs 30 mA 0.3 W 190 g (6.7 oz.)
SIMULATOR
INPUT/OUTPUT 6ES5 788-8MA11 1 2 3 4 5 6
+9 V GND Data
OUT
IN
3 2
1 4
5 6
7 8
9 10
EWA 4NEB 812 6120-02b
15-7
Function Modules
S5-100U
Function
www..com Simulator modules are 8-channel modules that can simulate digital input signals and display output signals.
The type of module to be simulated (input or output) is selected by means of a switch on the rear of the module and indicated by two LEDs on the front panel. The module cannot simulate interrupt inputs. Installation The simulator module is inserted into a bus unit like any other input or output module (see chapter 3). The module does not have a coding key and can therefore replace any digital module. The coding element on the bus unit does not have to be readjusted. Wiring There is no electrical connection between the module and the terminal block. It can therefore be inserted into slots that have already been wired and connected to the power supply. Addressing A simulator module is addressed like an 8-channel digital module (channels 0 to 7). Scan (examples) A O I Q 0.0 1.1 Channel "0" Channel "1"
Channel number Slot address Figure 15-3. Scanning the Simulator Module as a Digital Input
Typical Application The CPU is in the RUN mode, the green LED is lit but the programmable controller is malfunctioning. You have also discovered that the fault must be in a particular I/O module. If the module has no fault indicator, check to see if: * * The power supply is connected. The bus connections and interface modules are plugged in correctly.
Then, try to access the module via the process image (STATUS or STATUS VAR). If this procedure is not successful, replace the module with the simulator module. Perform a second check with the STATUS or STATUS VAR function. If the simulator performs, the input/output module you replaced is defective.
15-8
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
15.4
Diagnostic Module
(6ES5 330-8MA11)
www..com
Technical Specifications Insulation rating Rated insulation voltage (+9 V to ) - insulation group - tested with Voltage monitor - undervoltage - voltage ok Signal status display for control signals Current consumption - from+9 V (CPU) Power loss of the module Weight typ. VDE 0160 12 V AC 1xB 500 V AC red LED green LED yellow LEDs 25 mA 0.3 W
U1 8V U1>8V DATA DATA-N IDENT LATCH CLOCK CLEAR
approx. 175 g (6.1 oz.)
BUS SIGNAL
DISPLAY 6ES5 330-8MA11 1 2 3 4 5 6
+9 V GND Data/Bus signals
VRef -+ +1024
1 2
3 4
5 6
7 8
9 10
EWA 4NEB 812 6120-02b
15-9
Function Modules
S5-100U
Function
www..com The diagnostic module is used for monitoring the S5-100U I/O bus. LEDs on the front panel display the signal states of the control lines and the supply voltage for the I/O bus.
*
IDENT The programmable controller executes an IDENT run after each change from STOP to RUN. It executes an IDENT run after any changes in the configuration in order to determine the current configuration. The IDENT LED lights up briefly. If the LED lights up in the RUN mode, this indicates that a faulty I/O module has been plugged in. CLEAR The CLEAR signal line is "1" only in the STOP mode in normal operation. The outputs of the output modules are disabled. If CLEAR is "1" in the RUN mode, the control line itself may be defective (no contact). LATCH/CLOCK These two control lines control data interchange between the CPU, the I/O bus, and the I/O modules. During normal operation, both LEDs must flash (programmable controller in RUN mode). The flashing frequency provides information on the speed of the serial bus. If both LEDs show a steady light in the RUN mode, the bus unit that the diagnostic module is plugged into is defective. DATA/DATA-N The alternate lighting up of the DATA and DATA-N LEDs indicates data flow on the I/O bus. If these two LEDs show a steady light (as in the case of the LATCH and CLOCK LEDs), this indicates that the bus unit that the diagnostic module is plugged into is defective. U1 8 V If the supply voltage of a slot remains at a value U1 8 V, proper functioning of the I/O modules is no longer guaranteed. The low supply voltage can be explained by an excessively high bus load (> 1 A). If this LED flickers, noise pulses are superimposed on the supply voltage U1 (e.g., by the coupling of noise pulses). The LED lights up briefly if the programmable controller is switched on or off. U1 > 8 V The supply voltage of the I/O bus is functioning correctly.
*
*
*
*
*
15-10
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
Installation
www..com The diagnostic module is plugged into a bus unit like any other input or output module (see chapter 3). The module has no mechanical coding. The coding element on the bus unit does not have to be reset.
Note
The module can be plugged in and removed regardless of the operating status of the programmable controller.
Wiring No wiring is required. Existing wiring does not have to be removed. Addressing There is no addressing since the module cannot be addressed by the programmable controller.
EWA 4NEB 812 6120-02b
15-11
Function Modules
S5-100U
15.5
Counter Module 2 x 0 to 500 Hz
(6ES5 385-8MA11)
www..com
F Q0
Q1
Ch.0 Ch.1 5V/24 V Ch.0
Ch.1
6
COUNTER
500 Hz 6ES5 385-8MA11 12 3 4 5 6
+9 V GND Data
-0 -0
5V 24 V
1 2
3 4
5 6
7 8
9 10
15-12
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
www..com Technical Specifications
Number of Inputs Galvanic isolation Input voltage - rated value - for "0" signal - for "1" signal Input current for "1" signal Inherent delay Input frequency typ. typ. 2 yes 5 V/24 V DC 0 to 0.8/-33 to 5 V 3 to 5 V/13 to 33 V 1.5/8.5 mA 180 s Total permissible current of outputs Driving a digital input Paralleling of outputs - max. current Permissible ambient temperature for the unit - horizontal arrangement - vertical arrangement Length of cable - unshielded Insulation rating possible 1.5 mA Rated insulation voltage (inputs and outputs to each other and to ; input to +9 V) - insulation group - tested with Current consumption - from+9 V (CPU) Power loss of the module Weight typ. typ. max. 1A possible possible 0.5 A
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) 100 m (330 ft.) VDE 0160
max. 500 Hz
Connection of 2-wire BERO proximity switches (24 V DC) - quiescent current Length of cable - unshielded Number of Outputs Galvanic isolation Supply voltage L+ (for load) - rated value - permissible range (including ripple) Output current for "1" signal - rated value - permissible range - lamp load Residual current at "0" signal Output voltage - for "0" signal - for "1" signal Short-circuit protection Fault indication (red LED) Voltage induced on circuit interruption (internal) limited to Switching frequency - resistive load - inductive load
max. 50 m (165 ft.) 2 yes
60 V AC 1xB 1250 V AC 20 mA 2.5 W
24 V DC 20 to 30 V
approx. 200 g (7 oz.)
0.5 A 5 to 500 mA max. 5 W max. 1 mA max. 3 V max. L+-2.5 V electronic short-circuit
L+-47 V max. 100 Hz max. 2 Hz
EWA 4NEB 812 6120-02b
15-13
Function Modules
S5-100U
Function
www..com The module consists of two independent down counters with isolated inputs and outputs. It counts input signals up to a frequency of 500 Hz from a set value down to the value 0. When 0 is reached, the 24-V DC output of the module is energized.
At the same time, a green LED on the module lights up and the input signal (I x.0 or I x.1) is set to "1". The setpoint (0 to 999) can be entered via the three-digit thumbwheel switches on the front panel of the module. The input voltage ranges can be set for 5 V DC or 24 V DC using rocker switches on the front panel.
Channel 0 Channel 1 5 V DC (TTL)
Channel 0 Channel 1 24 V DC
Figure 15-4. Setting the Input Voltage Range on the Counter Module (500 Hz)
Installation The counter module is plugged into a bus unit like any other module (see chapter 3). Wiring See schematic diagram for the counter module.
15-14
EWA 4NEB 812 6120-02b
S5-100U
Function Modules
Addressing
www..com A counter module can be addressed like a two-channel digital module (channel "0" or "1"). For enabling and resetting the counter, you address the module like a digital output module. The counter reading is scanned in the same way as a digital input module.
Counter enable (Set to start value) Counter reset
S S R R A A
Q Q Q Q I I
x.0 x.1 x.0 x.1 x.0 x.1
Channel "0" Channel "1"
Scan "1" = Counter at zero
Channel number Slot address Figure 15-5. Scanning the Counter Module (500 Hz)
Timing Diagram
S Q x.0
1 0 1 0 6 0 1 0
R Q x.0 Enable Counting pulses
Output Q Time Figure 15-6. Timing Diagram: Setting and Resetting an Output of the Counter Module (500 Hz)
EWA 4NEB 812 6120-02b
15-15
Function Modules
S5-100U
Typical Application
www..com A counter module is plugged into slot 2. A value of 100 is set on channel "0" of this module using the three-digit thumbwheel switches. The incoming pulses are counted once the counter has been enabled by the control program. As soon as 100 pulses have been counted, a signal (output 4.0) is released.
Connection Diagram
1
3
5
7
9
2
4
6
8
10
STL
S A = Q I Q 2.0 2.0 4.0
Explanation During the counting operation, input I 2.0 is "0". When the counter status is "0", input I 2.0 is set to "1". Output Q 4.0 is then also set. Direct output at terminals 5 and 6 is possible.
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15.6
Counter Module 25/500 kHz
(6ES5 385-8MB11)
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F PD SV
2x 4x 24 V
6
HIGH SPEED
COUNTER 25/500 kHz 6ES5 385-8MB11 12 3 4 5 6
+9 V GND Data 1 3 4 5 8
+5 V 24 V
1 2
3 4
5 6
7 8
9 10
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S5-100U
www..com Technical Specifications
Power supply for sensor Operating mode (switch-selectable) - position decoder - counter Sensor inputs PD C 1 sensor 5 V (differential input) or 1 sensor 24 V DC 2; reference and enabling 2; setpoints reached 1 and 2 no Output current Digital Inputs Rated input voltage Digital inputs Digital outputs Galvanic isolation Counting range Operating mode - position decoder - counter Counting mode - position decoder - counter Setpoint input 5-V Sensor Input Input signals - position decoder - counter Counting frequency Cable length (shielded) Power supply for decoder Output current 24-V Sensor Input Rated input voltage Input signals - position decoder - counter Input voltage - "0" signal - "1" signal Rated input current for "1" signal Counting frequency Cable length (shielded) typ. Input voltage - "0" signal - "1" signal Rated input current for "1" signal and at 24 V Input frequency two's complement (KF) - 32768 to +32767 unipolar representation (KH) 0 to 65535 up/down up via program 15-pin Cannon subminiature D connector differential signals to RS 422 A A-N, B B-N, R R-N A A-N max. 500 kHz max. 50 m (165 ft.) 5 V from L+via voltage transformer max. 300 mA, short-circuitproof 15-pin Cannon subminiature D connector 24 V DC A, B, R A - 33 to 5 V DC +13 to 33 V DC 8.5 mA Inherent delay typ. max. typ. max. 24 V from L+ (PTC thermistor) 300 mA, shortcircuit proof reference and enabling 24 V DC - 33 to +5 V DC +13 to 33 V DC 8.5 mA 100 Hz 3 ms (1.4 to 5 ms) 100 m (330 ft.) setpoints 1 and 2 5 mA to 0.5 A
Cable length (unshielded) max. Digital Outputs Output current (resistive, inductive load) Residual current for "0" signal Switching current for lamps Limitation of inductive interrupting voltage Output voltage - "1" signal - "0" signal to max.
0.5 mA 0.22 A (5 W) -15 V
min. max.
L+ - 2.2 V 3V 100 m (330 ft.) electronic red LED
Cable length (unshielded) max. Short-circuit protection (cable impedance up to 15 ) Short-circuit indication (short-circuit to M) Supply voltage L+ - rated value - ripple Vpp - permissible range (including ripple) Fuse (internal) Current consumption - from L+ without sensor supply without load - internal (+9 V) Power consumption of the module Weight typ.
max.
24 V DC 3.6 V 20 to 30 V DC T 5 A (slow blow) 30 mA 70 mA 1.9 W+total output current (IA)x1.1 V
max. 25 kHz max. 100 m (330 ft.)
approx. 250 g (9 oz.)
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Function Modules
Function
www..com The counter module can be used as an up-counter or as an up/down counter for a position decoder. The counting pulses are supplied by a sensor that you can connect to the 15-pin subminiature D female connector of the module. You can choose from two types of sensors that fulfill the following requirements:
* *
5-V error voltages according to RS 422 (up to 500 kHz) 24-V signals (up to 25 kHz)
As additional inputs, the module has an enable input and a reference input. By using the STEP 5 program, you can assign two setpoints via the I/O bus. Once the counter status reaches one of these values, the respective output completes the circuit at terminal block (Q 0 or Q 1). The status of the outputs is displayed in the diagnostic byte. You can also read the following values by using the STEP 5 program: * * The updated count The diagnostic byte
You can preselect the following items on the operating mode switch: * * * The function mode The position resolution The input voltage range of the sensor
Position decoding (PD) Counter (C) Pos. resolution single
Pos. resolution
double
PD
2x 4x
Pos. resolution quadruple
SV
24 V
not allowed Sensor connection Sensor connection 5V 24 V
Figure 15-7. Switch Positions on the Operating Mode Switch
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Function Modules
S5-100U
15.6.1 Installation Guidelines
Installing and Removing the Module Plug the counter module into a bus unit like other I/Os. The counter module can only be plugged into slots 0 through 7. Set the coding key to number 6 on the bus unit. Installing or Removing the Sensor Disconnect the 24-V DC power supply (terminals 1 and 2 of the terminal block) before connecting or disconnecting the sensor cables.
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!
Warning
Connecting or disconnecting the 5-V sensor cable while the module is energized can cause damage to the sensor.
Connection of Pulse and Position Sensors Connect pulse and position sensors on the front plate by means of a 15-pin sub-D female connector. The correct cable connectors are listed in Appendix D. The module can supply the sensors (5 V DC or 24 V DC). Basically, all sensors can be connected if they fulfill the requirements of the system signals and supply voltage. Sensors with OPEN-COLLECTOR outputs cannot be connected to the module. The shield connection of the sensors must be connected to the metallic front connector cover.
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Assignment 5 V Supply voltage 5 V Sensor line Ground Rectangular-wave signal A-N (5 V) Rectangular-wave signal A (5 V) Supply voltage (24 V) Rectangular-wave signal B (5 V) Rectangular-wave signal B-N (5 V) Reference pulse R (5 V) Reference pulse R-N (5 V) Rectangular-wave signal A (24 V) Rectangular-wave signal B (24 V) Reference pulse R (24 V)
1 9 2 10 3 11 4 12 5 13 6 14 7 15 8
Figure 15-8. Pin Assignment of the 15-Pin Sub-D Female Connector
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Function Modules
*
Connecting Counting Pulse Sensors for 5-V Differential Signal to RS 422
Module Electronic light Sensor line
1 2 3 4
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5V 5V 0V A-N A 24 V L+ M
5V 5V 0V
5 6
5-V Va Pulse sensor
7 8 9 10 11 12 13 16 15
Shield
Shell of subminiature D connector
Figure 15-9. Connecting a Counting Pulse Sensor for 5-V Differential Signal to RS 422
*
Connecting a Counting Pulse Sensor for 24 V DC
Module
1 2 3 4 5 6 7
M 0V
0V
DC
8 9
L+ DC 24V
24-V Pulse sensor
10 11 12 13 16 15
A
Shield
Shell of subminiature D connector
Figure 15-10. Connecting a Counting Pulse Sensor for 24 V DC
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S5-100U
*
Connecting a 5-V Position Sensor to RS 422
Module Electronic light Sensor line
5V 5V 0V
1 2 3 4 5 6
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5V 5V 0V A-N A B B-N R R-N L+
24 V M
5-V
Va1
7 8 9 10 11
Position sensor
Va2 Va0
12 13 16 15
Shield
Shell of subminiature D connector
Figure 15-11. Connecting a 5-V Position Sensor to RS 422
*
Connecting a 24-V DC Position Sensor
Module
1 2 3 4
M 0V
Electronic light source
5 6 7
0V 24 V
8 9 10
L+ 24 V
24-V Position sensor Va1 Va2 Va0 Shield
11 12 13 16 15
A B R
Shell of subminiature D connector
Figure 15-12. Connecting a 24 V DC Position Sensor
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Function Modules
Sensor Requirements
www..com The following requirements must be satisfied by the sensor signals to the module inputs:
*
Signal sequence for up-counting
Sensor signals: Va1 (A, A-N/A)
t t t t t1
Va2 (B, B-N/B)
t1
Va0 (R, R-N/R)
t2
Figure 15-13. Signal Sequence for Up-Counting
*
Pulse time of the sensors 5-V Sensors t t1 t2 500 ns 2 s 500 ns 24-V Sensors 10 s 40 s 10 s Pulses Va1 = Position decoder count pulses (A) Va2 = Position decoder count pulses (B) Va0 = Position decoder ref. pulse (R)
*
Minimum edge steepness 5 V - differential signals according to RS 422A (A, A-N, B, B-N, R, R-N): 24 V - count pulses and reference pulse (A, B, R): 24 V - enable and reference signal: 5 V/s 0.3 V/s 0.3 mV/s
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S5-100U
Terminal Block
www..com Proximity switches can be connected (contacts, two-wire BERO proximity limit switches) to the inputs on the terminal block.
Terminal
1 2
1 3 5 7 9 1 3 5 7 9
Terminal Assignment
24-V DC supply for the module Ground 24-V DC supply for enable signal DI enable signal DQ 24 V/0.5 A setpoint (Q0) Ground 24-V DC supply for reference signal DI reference signal DQ 24-V/0.5 A setpoint 2 (Q1) Ground
3 4 5 6 7 8 9 10
2
4
6
8
10
2
4
6
8
10
Figure 15-14. Assignment Diagram for the Terminal Block
*
Assignment of Inputs on the Terminal Block Two-wire BERO proximity limit switches can be connected to the reference input. The enable input can also be driven by a 24-V DC digital output module.
*
Outputs on the Terminal Block There are two short-circuit protected 24-V DC digital outputs on the terminal block.
*
Short-Circuit Indication A shorted output is indicated by the red LED on the front panel.
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15.6.2 Data Transfer
The data is transmitted via the I/O bus. Four bytes are used. Examples of data transfer are shown in section 15.6.6.
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Transfer from the Programmable Controller to the Counter Module (PIQ) The control program transfers two setpoints to the counter module by means of transfer operations. Table 15-1. Sending Data from the Programmable Controller to the Counter Module Byte 0 Setpoint 1 High byte Low byte High byte Byte 1 Byte 2 Setpoint 2 Low byte Byte 3
Transfer from the Counter Module (PII) to the Programmable Controller The counter module transfers the diagnostic byte and the current counter status. In the control program, this data can be read in by means of load operations and then evaluated. Table 15-2. Sending Data from the Counter Module to the Programmable Controller Byte 0 Irrelevant Byte 1 Diagnostic byte High byte Byte 2 Actual value Low byte Byte 3
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*
Diagnostic Byte (Byte 1) is byte 1 of the first input word. Byte 0 has no significance. The diagnostic byte provides information on the following items: - Preset position resolution - Preset mode - Status of setpoints - Signal status of the sync bit for position decoding
www..com The diagnostic byte
Bit No.:
7 X
6 R
5 R
4
3
2 S2
1 S1
0 Sy
P/C OV
Position resolution single double quadruple not possible Mode Position decoding Counter Counter overflow No counter overflow Setpoint 2 reached Setpoint 2 not reached Setpoint 1 reached Setpoint 1 not reached Sync bit set Sync bit not set *
X = irrelevant
0 1 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0
*
If the sync bit is not set, a reference point approach must be implemented before operation can continue in the Position Decoding mode.
Figure 15-15. Diagnostic Byte
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15.6.3 Functional Description of the Counter Mode
In the operation mode "Counter", the module works as a "port-controlled" up-counter and counts the positive edges of the counting pulses while the enable input is active. If the counter reaches a preselected setpoint, the respective output is enabled. Initial Settings Use the operating mode switch to make the following selections: * * "Counter" (C) Signal level of counting pulses (5 V or 24 V)
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The position of the switches for the position resolution is irrelevant. For this operation, you need a counting pulse sensor (e.g., BERO). The pulses can be applied as 5-V differential signals according to RS 422A (up to 500 kHz) or as 24-V signals (up to 25 kHz). The sensor is connected to the sub-D connector of the module. Loading Setpoints The control program can transfer two setpoints to the module. These setpoints must be between 0 and 65,535. The transfer of the setpoints via the module depends on whether the "setpoint 1 (setpoint 2) reached" bit is set in the diagnostic byte (S1 and S2). If the bit is not set, which means the existing setpoint has not been reached or has not been exceeded, the new setpoint is transferred immediately and is immediately valid. If the bit is set, which means the existing setpoint has been reached or exceeded, the new setpoint is valid only after a positive edge occurs at the enable input. If you do not specify a setpoint, a setpoint of "0" applies. Enabling the Counter The signal state of the enable input (terminal 3 on the terminal block) determines the function of the counter. A positive edge at the enable input * * * * Sets the counter to 0 Resets the diagnostic bits for "setpoint reached" Resets the outputs Enables the counter
Note
The enable input should be set to "1" only after the setpoint has been transferred. Otherwise, the outputs are enabled automatically when the first positive edge occurs.
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Function Modules
S5-100U
Disabling the Counter
www..com A negative edge at the enable input disables the counter. The outputs, diagnostic bits, and the counter are not reset. You can continue reading the current count. A positive edge at the enable input resets the outputs and the diagnostic bytes.
Reaching the Setpoints - Setting the Outputs - Resetting the Outputs If setpoints have been preselected and the counter is enabled, the module counts the positive edges at the counter input. The count is incremented by "1" with every leading edge. After setpoint 1 has been reached, output Q 0 is enabled. At the same time, status bit S1 is set. After setpoint 2 has been reached, output Q 1 is enabled. At the same time, status bit S2 is set. As long as the enable input is active, the counter counts the pulses. After the enable command has been cancelled, the counter is disabled. The actual value remains constant. You can read the current count in the STEP 5 program. The actual value is displayed as an unsigned whole number and must be between 0 and 65,535.
Note
If no setpoint is preselected, the respective value "0" is assigned. The corresponding output is enabled with the positive edge of the enable input.
Example: Setpoints S1=2 and S2=4 are entered into the counter
Counter status Counting pulses
0 1 2 3 4 5 501 2
Enable input
Output Q 0 (setpoint 1 reached) Output Q 1 (setpoint 2 reached)
Pulse is not counted because counter is disabled by enable input=0. The count is "frozen" to the current value.
Figure 15-16.
Switching the Outputs Dependent on the Status of the Counter and the Enable Input
When the programmable controller goes from RUN to STOP, outputs Q 0 and Q 1 are reset.
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Performance during Overflow
www..com If the enabled counter exceeds the counter range limit 65,535 the following occurs:
* *
Bit 3 (overflow) in the diagnostic byte is set to "1". The outputs and diagnostic bits for "setpoint reached" are disabled, but they remain unchanged.
The counting function continues. Thus the actual value is constantly updated. You can continue to read all data from the module in the STEP 5 program: * * * The updated count The status of the outputs at the time of the overflow (This status remains unchanged until the overflow bit is reset.) The set overflow bit
After an overflow, the counter can be reset by one of the following actions: * * A positive edge at the enable input An overall reset of the programmable controller (STOP to RUN mode)
Note
After a cold restart of the programmable controller, the outputs are disabled. These outputs can be enabled via a positive edge to the enable input.
15.6.4 Functional Description of the Position Decoder
In the operation mode "position decoder" the module works as an up/down-counter and counts the pulses of the connected position encoder. Because of the phase offset of the two decoder signals A and B, the counter determines the counting direction. If the counter reaches a preselected setpoint, the respective output is then turned on. Settings Set the following items on the operating mode switch: * * * "Position decoding" (PD) function The desired position resolution (single, double, or quadruple) The signal level of the counting pulses (5 V or 24 V)
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Connect the sub-D interface female connector to an incremental position encoder that has to deliver the following signals: www..com * * Two counting pulses offset by 90 degrees A reference pulse
The pulses can be supplied as 5-V differential signals according to RS 422 (up to 500 kHz) or as 24-V DC signals. Connect a switch to the enable input. This switch must deliver a 24-V signal. In the same way, the reference pulse has to deliver a 24-V signal to the reference input. Position Resolution
*
Counter capacity The 16-bit up/down-counter permits a resolution of 65,536 units between -32,768 and +32,767. The traversing range depends on the resolution of the position encoders. Pulse evaluation The counting pulses, which are offset by 90 degrees, can be subjected to single, double, or quadruple evaluation. The necessary setting is made on the operating mode switch (see section 15.6).
*
The accuracy of the traversing path increases accordingly if double or quadruple pulse evaluation is used. However, the traversing range then available is reduced by the factor 2 or 4.
Table 15-3. Pulse Evaluation Single Evaluation Counting pulse A Counting pulse B Double Evaluation Quadruple Evaluation
Count
0
1
0
1
2
01234
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Example:
www..com A rotary incremental position encoder produces 1000 pulses per revolution.
The spindle has a pitch of 50 mm/revolution. The position encoder therefore produces 1000 pulses for a traversing path of 50 mm (1 revolution). The resolution of the encoder is therefore 50 mm/1000 pulses. The counter can handle up to 65,536 pulses. With the above resolution, the following traversing ranges are obtained: Table 15-4. Example for a Traversing Range Pulse evaluation Traversing range Distance travelled/ pulse Single 3.25 m (10.7 ft.) 50 m Double 1.625 m (5.3 ft.) 25 m Quadruple 0.81 m (2.7 ft.) 12.5 m
Loading Setpoints In the STEP 5 program, two setpoints can be transferred to the module. These setpoints must lie between -32768 and +32767. The acceptance of the setpoints by the module depends on whether the "setpoint 1 (setpoint 2) reached" bit has been set in the diagnostic byte. If the bit is not set, which means the existing setpoint is not reached or not exceeded, the new setpoint is immediately accepted and is immediately valid. If the bit is set, which means the existing setpoint is reached or exceeded, the new setpoint is not valid until a positive edge occurs at the enable input. If you do not specify a setpoint, a setpoint of "0" applies. Synchronization of the Actual Value Detection (Reference Point Approach) The synchronization of the actual value detection is necessary after Power ON and after a counter overflow. Synchronization performs one of the following functions: * * The count (actual value) is set to "0" and the SYNC bit (bit 0 in the diagnostic bit) is set after Power ON. The overflow bit (bit 3 in the diagnostic byte) is reset after an overflow.
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Prerequisites for a Synchronization
www..com 1. The reference signal
The sensor for the reference signal is connected to terminals 7 and 8 of the terminal block. Synchronization is enabled with the leading edge (0 to 1) at terminal 8. If the signal was already on "1" when the module was switched on, then the reference signal must be turned off to restart the synchronization. If the reference signal lies in the normal traversing range, the actual value will be constantly resynchronized by the reference signal. To prevent the unwanted resynchronizing, you have to mask out the reference signal after the first reference point approach. 2. The traversing direction after a positive edge of the reference signal After the reference signal has been reached, the module has to recognize a positive traversing path (up-counting) while the reference signal is still active (1). This means, you have to input the reference signal with increasing actual value to synchronize the module. 3. The reference pulse The reference pulse is generated by the position encoder at least once per revolution. * The first reference pulse that the module recognizes after a leading edge of the reference signal synchronizes the module (see figures 15.17 and 15.19a). * If the reference signal changes from "1" to "0" before the reference pulse is reached, the module is only synchronized if a positive traversing path is recognized after the falling edge of the reference signal (see figure 15.18). The module is not synchronized, if a negative traversing path is recognized after the falling edge of the reference signal (see figure 15.19b). The figures 15.17, 15.18 and 15.19a illustrate different possibilities for a reference traversing path. Figure 15.19b illustrates a reference traversing path, which is terminated without synchronization:
Positive direction of traverse Reference signal Reference pulse of the sensor
Sync. bit
Figure 15-17.
Position of the Reference Point (SYNC Bit 0 --> 1) within the Reference Signal Range
Positive direction of traverse Reference signal Reference pulse of the sensor
Sync. bit
Figure 15-18. Position of the Reference Point (SYNC Bit 0 --> 1) after the Reference Signal
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www..com Reference signal
Reference pulse of the sensor
Positive direction of traverse
Change of direction Reference signal Reference pulse of the sensor Synchronization
Change of direction
Sync. bit
No synchronization
Figure 15-19a. Synchronization (SYNC Bit 0 -->1) 15-19b. No Synchronization during a Reversal of Direction before Reaching the Reference Pulse in a Positive Direction
Example:
Transporting objects from point A to point B on a conveyor belt. A rotary position encoder is used, together with a BERO proximity switch as reference transmitter. The conveyor belt is marked at a definite point. As soon as this mark comes within the range of the BERO, the BERO produces a reference signal.
Following the reference point approach, the enable input is set via a digital output module.
Rotary position encoder PS CPU DQ Operation range of reference transmitter Conveyor belt
Counting-up direction
Mark BERO as reference transmitter Traversing path Enable input Reference input Traversing range
Figure 15-20. Schematic of a Reference Point Approach Operation
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Starting the Counter
www..com The counter is reset and started by setting the SYNC bit in the diagnostic byte during the reference point approach operation. The active pulses are counted according to the rotation direction of the position encoder. The count value is incremented during a positive count direction, and decremented during a negative count direction.
Enabling the Outputs - Reaching the Setpoints - Resetting the Outputs The two outputs are enabled for switching by a positive pulse edge at the enable input. An output and the associated diagnostic bit "setpoint reached" are set if all of the following statements are true: * * * The position decoder was synchronized (SYNC bit=1 and overflow bit=0). The enable signal (terminal 3 on the terminal block) is set to "1" signal. The actual value corresponds to the selected setpoint. The setpoint can be reached in the up-count or down-count direction.
Up-count direction SYNC bit is set to begin Counter status Counting pulses SYNC bit (in diagnostic byte)
0 1 2 3 4 5 6 7 8 7 9 10 -10 -9
Down-count direction SYNC bit is constantly set
-8 7 -7 -6 -5 -4 -3 -2 -1 0 1
Enable input Output Q0 (setpoint 1 reached) Output Q1 (setpoint 2 reached) Measured counting pulse Counter is still disabled
Figure 15-21. Enabling the Outputs - Reaching the Setpoints - Resetting the Outputs
After reaching setpoint 1, the output Q 0 is energized and the status bit S1 is set. After reaching setpoint 2, the output Q 1 is energized and status bit S2 is set. As long as the enable input is active, the outputs are switchable through the module. If the enable command is cancelled, the outputs are switched off and the diagnostic bits are reset. The current actual value is still being measured and incremented or decremented depending on the direction of rotation.
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You can read the current count in the STEP 5 program. The actual value is displayed as a signed whole number in two's complement and lies in the range - 32,768 to +32,767. www..com
Note
Before you enable the outputs to be switched on by setting the enable input to "1", make sure the following conditions exist: * * * Both setpoints were transferred. The overflow bit=0. The SYNC bit=1.
If you ignore these prerequisites, the outputs are switched on directly when the actual value=0.
The diagnostic bit and the output are reset with the "0" signal at the enable input. Outputs Q 0 and Q 1 are also reset when the programmable controller goes from RUN to STOP. The following examples show the switching on of the output at the selected setpoint. There are three possibilities: * * * Reaching the setpoint in the direction of a rising actual value Reaching the setpoint in the direction of a falling actual value Reaching the setpoint in the direction of a rising actual value, then a reversal of direction and a reapproaching of the setpoint in the opposite direction Approaching a Setpoint in Up-Count Direction
Example 1:
Enable input Direction of traverse Output, diagnostic bit setpoint reached Example of actual value
1000 2000
Setpoint
3000 4000 5000 6000 7000
Figure 15-22. Approaching a Setpoint in Up-Count Direction * * * Actual value=1000: The enable input is set to "1". Actual value=3000: The setpoint is reached, output and diagnostic bit "setpoint reached" are set. Actual value=6000: The enable input is set to "0", output and diagnostic bit are reset.
.
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Example 2:
Enable input
Approaching a Setpoint in Down-Count Direction
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Direction of traverse Output, diagnostic bit setpoint reached Example of actual value
1000 2000
Setpoint
3000 4000 5000 6000 7000
Figure 15-23. Approaching a Setpoint in Down-Count Direction * * * Actual value=7000: The enable input is set to "1". Actual value=3000: The setpoint is reached, the output and the diagnostic bit "setpoint reached" are set. Actual value=1000: The enable input is set to "0", the output and the diagnostic bit are reset.
Example 3:
Enable input
Reversal of Direction after Approaching a Setpoint
Direction of traverse
Output, diagnostic bit setpoint reached Example of actual value
Setpoint Direction of traverse
Change of direction
1000
2000
3000
4000
5000
6000
7000
Figure 15-24.
Approaching a Setpoint in Up-Count Direction and Consecutive Reversal of Direction
* * * *
Actual value=1000: The enable input is set to "1". Actual value=3000: The setpoint is reached, the output and the diagnostic bit "setpoint reached" are set. Actual value=4500: The traversing path is reversed. Actual value=1000: The enable input is set to "0", the output and the diagnostic bit are reset.
Note
Set outputs can be reset only via a "0" signal to the enable input.
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Performance during Overflow
www..com If the counter leaves the counting range of -32,768 to + 32,767, then the following occurs:
* *
Bit 3 (overflow) in the diagnostic byte is set to "1". The outputs of the counter module are disabled.
The enable input (terminal 4 of the terminal block) must be set to "0", in order to switch off active outputs. After an overflow, a new reference point approach operation has to be executed for synchronization of the actual value detection. After reaching the synchronization, bit 3 in the diagnostic byte is again set to "0", and the outputs along with the active enable input can be turned on.
Note
During an overflow, active outputs are not switched off, and the SYNC bit (bit 0 in the diagnostic byte) is not reset.
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15.6.5 Entering New Setpoints for the Counter and Position Decoder
Entering new setpoints is always possible via the PIQ. However, a setpoint is only valid if the respective output is not switched on. The status of the outputs is displayed with diagnostic bits S1 and S2. Diagnostic bit S1 (bit 1 in the diagnostic byte)=1: Diagnostic bit S2 (bit 2 in the diagnostic byte)=1: setpoint 1 is reached and output 1 is switched on. setpoint 2 is reached and output 2 is switched on.
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Table 15-5. Reaction of the Counter Module during Transfer of the Setpoints Diag. Bit S1 = 0 S2 = 0 S1 = 1 S2 = 1 Response New setpoint 1 is transferred and is valid immediately. New setpoint 2 is transferred and is valid immediately. New setpoint 1 only becomes active if a positive edge has appeared at the enable input. New setpoint 2 only becomes active if a positive edge has appeared at the enable input.
Example: You want to control a drive by using the outputs of the counter module. After a run of positioning, both setpoints are reached and both outputs are turned on. You can enter the new setpoints by using the following sequence:
Enable input
Output Q 0/ Diag. bit S 1 Output Q 1/ Diag. bit S 2 S 1old S 2old S 1new S 2new
Figure 15-25. Requirement for New Setpoints Transfer the new setpoints to the module. Since both diagnostic bits S1 and S2 are set to "1", the actual values are not yet accepted. Switch the signal now at the enable input to "0". With the falling edge, the outputs are switched off and the diagnostic bits are reset. Switch the signal at the enable input again to "1". The new setpoints are accepted and are now active. After reaching the new setpoints, the respective output is switched on again.
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Function Modules
15.6.6 Addressing
The counter module is addressed like an analog module (see section 6.3). * * * The module may only be plugged into slots 0 to 7. The address range extends from byte 64 to byte 127. In both process image tables, eight bytes are reserved per slot and of these eight bytes only the first four are used.
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Slot Addressing Table 15-6. Slot Addressing Slot Address PII/PIQ 0 64 to 71 1 72 to 79 2 80 to 87 3 88 to 95 4 96 to 103 5 104 to 111 6 112 to 119 7 120 to 127
Meaning of the Bytes of a Slot Address (Example: Slot 1) Table 15-7. Byte Number 0 1 2 3 4 to 7 Meaning of the Address Bytes of a Slot Address (Example: Slot 1) Meaning in PII Irrelevant Diagnostic byte High byte Actual value 75 76 to 79 Low byte Low byte Irrelevant High byte Low byte High byte Meaning in PIQ
Byte Address 72 73 74
Setpoint 1
Setpoint 2
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Examples for Data Exchange between the Programmable Controller and the Counter Module Example 1:
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The counter module is plugged into slot 4. If you now wish to check whether your system for position decoding has been synchronized by a reference point approach, you must scan the sync bit in the diagnostic byte (bit 0). If this bit is set, a branch is to be made to FB20. The position decoding operation is started in FB20. STL
... A I JC ...
Description
97.0
FB 20
Read in bit 0 of the diagnostic byte (sync bit). If this bit is set, a branch is made to FB20. If the bit is not set, program scanning is continued with the statement following the block call.
Example 2: Transferring the setpoints stored in flag words 0 and 2 to the counter module inserted into slot 7. The module has only to accept the setpoints when the old setpoints have been reached or exceeded. STL
... AN JC= L L001 T AN JC= L T BE ... I L001 FW QW I L002 FW QW 121.1 0 120 121.2 2 122
Description
L002
If setpoint 1 has not yet been reached (bit 1=0), a branch is made to label 1. Read in setpoint 1 and transfer it to the counter module. If setpoint 2 has not yet been reached (bit 2=0), a branch is made to label 2. Read in setpoint 2 and transfer it to the counter module. Block end
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15.7
Closed-Loop Control Module IP 262
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(6ES5 262-8MA12) (6ES5 262-8MB12)
STATUS
S1
1 2 3 4 on off
6
CLOSED LOOP
CONTROLLER 6ES5 262-8MA12 12 3 4 5 6
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S5-100U
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Technical Specifications Controller Total cycle time (equals scan time) Resolution of the open-loop controller Analog Inputs Number of inputs 4 (suited for current, thermocouple, or resistance thermometer), voltage with external switching 1 (resistance thermometer) no - 1 V to +1 V - 1 V to +1 V 11 bits+sign 0 to 20 mA or 4 to 20 mA 24.3 0.1% 0 to 50 mV or - 8.9 to 41.1 mV (type J, K, L, S) 30 per wire 18.49 219.12 30 per wire 100 to 200 ms 5 ms at 50 Hz 4.2 ms at 60 Hz Analog outputs of the constant controller (6ES5 262-8MA12) Number of outputs Galvanic isolation Output signal range Maximum permissible load No load voltage 3 no 0 to 20 mA or 4 to 20 mA 600 (L+) - 2 V
Binary outputs for the open-loop controller (6ES5 262-8MB11) Number of outputs Galvanic isolation Signal state "0" Signal state "1" Maximum load current Wiring method Programmer (PG) Operator panel (OP) SINEC L1 network connection Connectable are front side via 15-pin subminiature D connector PG 605, PG 635, PG 675, PG 685, PG 695, PG 730, PG 750, OP 393, OP 396, OP 395 front side via 25-pin subminiature D connector via terminal block of the bus unit 8 no <1.5 V (L+) - 3.8 V 100 mA short-circuit proof
Additional input for reference temperature Galvanic isolation Permissible voltage difference - between inputs - between inputs and central ground point Digital representation of the input signal Current input - input signal range - input resistance mV Input (for thermocouple) - input signal range
Analog and binary inputs
Analog and binary outputs General data Input voltage - rated value - permissible range - permissible range with the PG 605/OP 393 Current consumption - internal (from the CPU; 9 V) - external (for 24 V; without load) - external (for 24 V; without load; with PG 605/OP 393) Ambient temperature
Cable impedance Resistance thermometer - start - end - permissible cable impedance Binary Inputs Number of inputs Galvanic isolation Signals state "0" Signal state "1" Input resistance
24 V DC 18 to 34 V DC 18 to 27 V DC
4 no - 30 to+4.5 V or open +13 to +30 V (signal state invertible) approx. 4 k
approx. 20 mA approx. 180 mA approx. 340 mA 0 to 55 C (32 to 131F)
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Function
www..com The S5-100U programmable controller offers different solutions for individual closed-loop control tasks. First there is a software solution for CPU 103, version 8MA02 and higher, via function blocks. Second, there is a control module solution (for example, a module that can solve PID control tasks simply and in a time saving manner). The basis, in both cases, is a PID control algorithm.
The closed-loop control module IP 262 can be used with the S5-90U, S5-95U, and S5-100U programmable controllers. It can be used without COM software. The module relieves the programmable controller from closed-loop control tasks. The IP 262 also works with its own power supply in a stand-alone operation. The module can function independently without a programmable controller and can handle up to four closed-loop control circuits. Two interfaces are located on the front panel of the module. * * An interface for the connection of a programmer (PG) or an operator panel (OP) or the SINEC L1 Network (under development) An interface for the connection of analog and binary inputs
In addition, the following items are available: * * A selector switch for each channel for current and voltage (thermocouples or PT 100) A status LED for RUN (a continuously lit green light), transducer malfunction (blinking light), and module malfunction (off)
The module is well suited to take over control-loop tasks in the area of industrial processing technology, for example, temperature control, pressure and flow control, continuous injection functions, and non-time-critical closed-loop rpm controls. Modules There are two IP 262 modules. * * ... - 8MA12 with 3 analog outputs for continuous controllers with analog output signals ... - 8MB12 with 8 binary outputs for continuous controllers with pulse time-interval signals or for step-action controllers
Additionally, the module provides the following inputs: * * 4 analog inputs for direct feed of setpoint and actual values 4 binary inputs for control variables
Installation * * * * The closed-loop control module is plugged into a bus unit like any other input or output module (see chapter 3). The module can only be plugged into slots 0 to 7. The connections for power supply and the analog and binary output signals are located on the terminal block of the bus unit. The analog and binary inputs are connected to the module with a 25-pin sub-D female connector.
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Addressing
www..com The module is addressed like a four-channel analog module.
Operating Modes Since transducers and sensors are directly wired to the module, the module can work independently from a programmable controller in stand-alone operation, provided that the setpoints and the 24-V power supply voltage are fed directly to the IP 262. This means that the module executes the control and the output of the manipulated variable and can work alone or be controlled via the SINEC L1 by a master unit. Besides this, the IP 262 has its own back-up, which means that the module can continue to work alone in the event the master CPU (e.g., S5-135U with R64) fails. It uses the last setpoint received from the CPU or the predefined back-up setpoint. Two operating modes are possible: * DDC Operation (Direct Digital Control) The control is executed entirely from the CPU. The IP only outputs the manipulated variable. If the CPU fails, the module can continue to control independently with a predefined back-up setpoint. SPC Operation (SetPoint Control) The module receives only the setpoint from the CPU; the control task is carried out independently of the CPU. If the CPU fails, the IP continues to control using the last setpoint received from the CPU. It is also possible to use a predefined back-up setpoint here.
*
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15.8
IP 263 Positioning Module
(6ES5 263-8MA13)
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RUN
FAULT 1 FAULT 2
E N C O D E R 1
E N C O D E R 2
F 3.15 A 6
Positioning/Counter Module IP 263
6ES5 263-8MA13 1 2 34 5 6
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Technical Specifications Encoders Position decoder Maximum traversing range - with incremental encoders - with absolute encoders incremental, absolute (SSI interface) 224 increments 8192 increments per revolution x 2048 revolutions 5 V to RS 422 24 V (only incremental encoders) 5 V/300 mA 24 V/300 mA
Digital Inputs Input voltage range Galvanic isolation 0 signal 1 signal Permissible zero-signal current at 0 signal Input current at 24 V - 3 V to + 30 V no - 3 V to +5 V +13 V to+30 V 1.1 mA typ. 5 mA
Signal voltages - Differential inputs - Asymmetrical inputs
Other: If the digital inputs are used, they must always be connected to a defined potential (0 V, 24 V) and must not be kept open. Digital Outputs Output voltage range Galvanic isolation Output current at 1 signal Short-circuit protection Cable length, shielded Supply Voltage +20 V to+30 V no max. 500 mA Short-circuit-proof output max. 100 m (328 ft.)
Supply votlage for encoders (short-circuit-proof, no overload) Input frequency and cable length Symmetrical encoders (5 V signals): - with 5 V encoder supply - with 24 V encoder supply Asymmetrical encoders (24 V signale):
max. 200 kHz for 32 m (105 ft.) cable, shielded max. 200 kHz for 100 m (328 ft.) cable, shielded max. 100 kHz for 25 m (82 ft.) cable, shielded max. 25 kHz for 100 m (328 ft.) cable, shielded 62.5 kHz (selectable in steps) 125 kHz (160 m/ 525 ft. shielded) 250 kHz 500 kHz 1 MHz (32 m/ 105 ft. shielded) 2 pulse trains displaced by 90 1 zero pulse 1 pulse train Absolute value to RS 422 typ. 5 mA
Logic voltage from 24 V supply produced with switchedmode power supply Current consumption from 24 V without outputs and encoder Undervoltage monitoring Power Loss
4.9 V to 5.1 V typ. 120 mA Vinternal < 4.65 V typ. 4 W
Data transmission rate and cable length with absolute encoders
Input signals - Incremental
- 24 V initiator (BERO) - SSI Input currents -5V - 24 V
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A separate manual is available for the IP 263 positioning module. It can be ordered under the order number 6ES5 998-5SK21. www..com The IP 263 is suitable for positioning of two independent axes.
Assignments of Outputs The IP 263 is a two-channel module: 4 digital outputs are assigned to each channel for the control of drives; * * * * Rapid traverse Creep speed Anti-clockwise rotation Clockwise rotation
Both incremental and absolute encoders (SSI - synchronous serial interface) can be connected for actual position encoding. They transmit the machine data, such as * * * * * Software limit switches Resolution Cutoff difference Switchover difference Zero-speed control
The syntax for the data block which has to be created for this purpose is simple and is described in the manual.
Positioning The only thing that remains to be done is to specify the desired target and then the module is ready for the positioning procedure. The IP 263 then carries out positioning automatically. When the target has been reached, it sends a message to the IM 318-B interface module and thus to the CPU. Figure 15-26 shows the positioning procedure with the IP 263: After the start, a rapid traverse towards the target takes place first. When the switchover/cutoff point has been reached, a switchover to creep speed or cutoff takes place. Afterwards, the IP 263 monitors approach of the target. When the axis has reached the target range, a signal is sent to the IM 318-B interface module.
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S5-100U
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VRapid traverse
Switchover point Cutoff point Target range
VCreep
Rapid traverse Creep speed
Clockwise Anti-clockwise
Fig. 15-26. Positioning with the IP 263
During reference point travel, the digital input of the module senses the speed reducing cam (reference point switch). In the "Length measurement" operating mode, the module senses encoder pulses as long as this input has a "1" signal. Installation As other I/O modules, the IP 263 is mounted on the bus unit (see chapter 3).
Addressing The IP 263 is addressed like a 4-channel analog module.
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15.9
IP 264 Electronic Cam Controller Module
6ES5 264-8MA12
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RUN
ACTIVE FAULT E N C O D E R I N E N C O D E R O U T
F 10 A 6
Cam Controller Module IP 264
6ES5 264-8MA12 1 2 34 5 6
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Technical Specifications Encoders Actual value sensing Maximum traversing range - with incremental encoders - with absolute encoders Signal voltages - Differential inputs - Asymmetrical inputs incremental, absolute (SSI interface) 216 increments 216 encoders 5 V to RS 422 24 V (only incremental encoders) 5 V/300 mA 24 V/300 mA
Digital Inputs Input voltage range Galvanic isolation 0 signal 1 signal Permissible zero-signal current at 0 signal Input current at 24 V -3 V to + 30 V no - 3 V to +5 V +13 V to+30 V 1.1 mA typ. 5 mA
Other: If the digital inputs are used, they must always be connected to a defined potential (0 V, 24 V) and must not be kept open. Digital Outputs Output voltage range Galvanic isolation Output current at 1 signal Short-circuit protection Cable length, shielded +20 V to+30 V no max. 300 mA Short-circuit-proof output max. 100 m (328 ft.)
Supply voltage for encoders (short-circuit-proof, no overload) Input frequency and cable length Symmetrical encoders (5 V signals): - with 5 V encoder supply - with 24 V encoder supply Asymmetrical encoders (24 V signal):
max. 200 kHz for 32 m (105 ft.) cable, shielded max. 200 kHz for 100 m (328 ft.) cable, shielded max. 100 kHz for 25 m (82 ft.) cable, shielded max. 25 kHz for 100 m (328 ft.) cable, shielded
Supply Voltage Logic voltage from 24 V supply produced with switchedmode power supply Current consumption from 24 V without outputs and sensors Undervoltage monitoring Power Loss Module Cycle Time (incl. dead-time compensation) Separate cam programs with max. 32 cams each for forwards and backwards (incl. dead-time compensation) 57.6 s "Common" cam program with max. 32/64 cams for forwards and backwards 57.6/115.2 s
4.9 V to 5.1 V typ. 120 mA Vinternal < 4.65 V typ. 4 W
Data transmission rate and cable length with absolute encoders (selectable in steps)
125 kHz (160 m/ 525 ft. shielded) 250 kHz 500 kHz 1 MHz (32 m/ 105 ft. shileded) 2 pulse trains displaced by 90 1 zero pulse 1 pulse train Absolute value to RS 422 typ. 5 mA
Input signals - Incremental
- 24 V initiator (BERO) - SSI Input currents -5V - 24 V
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A separate manual is available for the electronic cam controller. It can be ordered under the order number 6ES5 998-5SL21. www..com The IP 264 can be used both for rotary and linear axes. The IP 264 electronic cam controller makes electronic processing of cams economical even for applications in the lower performance range. 32 cams which can be allocated as desired to 16 tracks have a switching accuracy of better than 1 degree at 2400 revolutions per minute. This corresponds to a response time of less than 60 s. For applications with low precision requirements it is even possible to program 64 cams. It is also possible to integrate 32 cams each into a cam program for "forwards" and a cam program for "backwards". Switchover between these two programs is carried out by automatic direction sensing of the IP 264 or it is controlled by the SIMATIC S5. All cams can be defined either as path-path cams or as path-time cams. Dead Time Compensation Through the speed-dependent, dynamic shift, each individual cam compensates the dead time of the actuator connected (e.g. pneumatic valve) at a scanning rate of 60 s. This enables the utmost accuracies to be achieved even at changing drive speeds. Direct Process Connection In order to be able to pass on the short response time of the IP 264 directly to the process, a digital output (24 V, 0.3 A) is available on the module for each track. Generally, the units to be controlled can be connected directly. Auxiliary contactors are required only for actuators with a higher current consumption. The sensors to be connected can be incremental encoders, absolute SSI encoders (SSI= synchronous serial interface) or simple 24 V signal sensors (e.g. BEROs). The sensor data can be looped through to further modules via the additional sensor output, without separating the sensor cables mechanically or using additional fan-out units.
Installation As other I/O modules, the IP 263 is mounted on the bus unit (see chapter 3).
Addressing The IP 264 is addressed like a 4-channel analog module.
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15.10
IP 265 High Speed Sub Control
(6ES5 265-8MA01)
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STOP RUN I O
I N P u T
O U T P u T
I N T E R F A C E 6
HIGH SPEED L+ SUB CONTROL 24 V M 6ES5 265-8MA01 123
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Technical Specifications Current consumption from +9 V (CPU) Signal status display <175 mA only for 24 V inputs and 24 V outputs (green LEDs) STOP (red LED) RUN (green LED) EPROM/EEPROM typ. 2.3 W Output current at "1" signal Weight approx. 300 g (10.6 oz.) Permissible total current of output Connection of outputs in parallel Output frequency at ohmic load 0.5 A at 60 C 2 A at 60 C possible in pairs (Ioutp=0.8xIrated) max. 1 kHz at 15 mA load* max. 2 kHz at 50 mA load* max. 4 kHz at 500 mA load* max. 100 m (330 ft.) max. 2 W max. 1 mA max. 1 V -15 V typ. 10 s typ. 150 s at 15 mA load* typ. 90 s at 50 mA load* typ. 70 s at 500 mA load* Digital 24 V outputs (9-pin sub D socket connector) Number of outputs Galvanic isolation Status display Short-circuit protection Load voltage L+ - Rated value - Permissible range 8 no Yes, on 5 V side Yes, electronic clock cycle 24 V DC 20 to 30 V
Operating status display Memory submodule Power loss
Digital 24 V Inputs (9-pin sub D connector) Number of inputs Galvanic isolation Status display Input votlage L+ - Rated value - for "0" signal - for "1" signal Input current at "1" signal Connection of 2-wire BERO 8 no Yes, on 5 V side 24 V DC 0 to 5 V 11 to 30 V (IEC 65A) Cable length typ. 6.5 mA (IEC 65 A) possible (zero signal current 1.5 mA) max. 10 kHz max. 100 m (330 ft.) typ. 15 s typ. 10 s Delay time of output circuit - Rising edge - Falling edge, depending on ohmic load: Lamp load Residual current at "0" signal Voltage drop at "1" signal Limitation of inductive cut-off voltage
Input frequency Cable length (shielded) Delay time of input circuit - Rising edge - Falling edge
5 V differential inputs (15-pin D sub HD socket connector) Number and type of input signals Input frequency Pulse length - "Low" level - "High" level Cable length (shielded) 3 differential signals RS 422 max. 58 kHz min. 8.6 s min. 8.6 s max. 32 m (105 ft.)
Expansion input and outputs (15-pin D sub HD socket connector) Number of inputs and outputs 8 (any desired mixture of I/Os can be configured)
Connector for 24 V load voltage (2-pin) Permissible cross-sections of cables - Flexible cable H07V-K with end sleeve 0.5 to 1.5 mm2 - Solid cable H07V-U 0.5 to 2.5 mm2
* Peak value (no effective value specified)
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S5-100U
The IP 265 High Speed Sub Control is a powerful, user-programmable I/O module which relieves the CPU's of the SIMATIC S5-100 systems of automation tasks which place great demand on speed www..com and reproducibility. A separate manual is available for the IP 265. It can be ordered under the order number 6ES5 9985SH21. Function The IP 265 High Speed Sub Control is available with a COM software package which is required to determine the function of the module. The use of the IP 265 in an S5 system enables rapid I/O processing in the millisecond range. By implementation of an FPGA (Field Programmable Gate Array) in the IP 265 it is possible to process process signals in parallel and very fast. The IP 265 user program consists of elementary basic functions such as logic operations, counters, timers or comparators. The structure of the IP 265 user program is based on the CSF5 type of representation. The following can be used: * * Either a user-programmed user program or a fixed-programmed standard program from SIEMENS.
The COM 265 is available for user-programming of the IP 265. Besides it being programmable, the IP 265 can also be used to implement the special "counter" function with a fixed-program standard program. For this purpose, SIEMENS AG offers a memory submodule for the IP 265 with the standard "counter" function. The IP 265 user program is automatically processed by the IP 265. It conditions process input signals to process output signals. The IP 265 can read 11 process inputs (8 x 24 V inputs, 3 x 5 differential inputs) and set 8 process outputs (24 V outputs). The program capacity of the FPGA and the number of process inputs/outputs of one IP 265 are limited. The IP 265 is therefore used for rapid sub controls. By adding one IP 265 to another, complex sub-processes can be controlled with this module. Installation As other I/O modules, the IP 265 High Speed Sub Control is mounted on a bus unit.
Adressing The module is addressed like a 4-channel analog module.
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15.11 Positioning Module IP 266
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(6ES5 266-8MA11)
Technical Specifications Analog Output Output signal range Digital signal representation Short-circuit proof Reference potential of the analog output signal
FAULT
10 V 13 bits plus sign yes analog ground of the power section 32 m (105 ft.) incremental 32767.999 mm/ 0.1 inch/degree 5 V/RS 422 24 V/typ. 7.3 mA 5 V/350 mA 24 V/350 mA
ANALOG OUT
Cable length shielded Pulse Input Position decoder Traverse range
max.
E N C O D E R
Input voltages for the tracks - differential inputs - asymmetrical inputs Supply voltage for the sensor (short-circuit proof) P G Input Frequency and Cable Length Symmetrical sensors (5 V) max. max. Asymmetrical sensors (24 V) max. max. POSITIONING CONT.
MODULE IP 266 6ES5 266-8MA11 12 3 4 5 6
500 kHz, 30 m (98 ft.) shielded cable length 100 kHz for 25 m (82 ft.) cable length shielded 25 kHz for 100 m (330 ft.) cable length shielded 2 pulse series 90 degrees out of phase 1 zero pulse 30 V no - 30 V to +5 V 13 V to 30 V 1.5 mA 7.3 mA 20 V to 30 V no 100 mA short-circuit proof output 100 m (330 ft.)
6
Input Signals Digital Inputs Input voltage range Galvanic isolation "0" signal "1" signal Permissible zero signal current at "0" signal Typ. input current at 24 V Digital Outputs Output voltage range Galvanic isolation Max. output current at "1" signal Short-circuit protector Cable length shielded max. Supply Voltage Logic voltage from 24-V ext. supply produced with switched-mode power supply Current consumption from 24-V supply without outputs and 24-V sensor typ.
4.7 V to 5.5 V 180 mA
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Because of its performance capability and the complexity of its description, the IP 266 has its own manual that you can order separately. The order number is: 6ES5 998-5SC21. The positioning www..com control module IP 266 expands the field of application for "positioning operations" of the S5-100U. As an "intelligent I/O module", it allows you to use open-loop as well as closed-loop control positioning. The positioning operations are processed independently of the execution times of the user programs in the programmable controller. Thus the CPU is not burdened with positioning jobs constantly being processed. You can plug the IP 266 into slots 0 to 7 on the S5-100U. The IP 266 is assigned addresses in the analog address area of the programmable controller. Operation Principle of the IP 266 The IP 266 enables you to control the positioning operation of your drive exactly. The module delivers a voltage setpoint in the range of10 V via an analog output for the control of a power section for servo motors. The IP 266 needs exact data about your drive system in order to calculate speed, acceleration, or traverse residual distances. This data can be stored in an EEPROM that is permanently installed in the programmable controller. By using its own start-up routine, this data can be accessed immediately after you switch on the programmable controller and can be processed directly. The IP 266 allows you to select between a linear axis and a circular axis. You can also select the unit of measurement for processing the data: either [mm], [in.] or [deg]. Linear Axis Circular Axis
Beginning/end of traversing range
Table
Rotary table Continuous belt
Possible parameter units: [mm], [in.]
Possible parameter units: [deg], [mm], [in.]
Figure 15-27.
Units of Measurement that IP 266 Can Process for Circular Axis and Linear Axis
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Besides purely traversing movements, other operating modes allow offset generation of axis coordinates or drift compensation in the system. www..com In addition, the IP 266 offers operating modes to read data such as positioning actual value or residual traversing distances. In order to use the IP 266 in an automatic manufacturing process, it is possible to combine individual traversing applications, positioning corrections, offsets or dwell times in a "traversing program". These traversing programs can be called up via two special operating modes and processed automatically or semi-automatically. Such a traversing program can be created by using the "learning capable" "Teach-in mode" for positioning applications. The information from single positioning applications can be stored at the end of an operation in a traversing program. Positioning For the positioning operation, the IP 266 calculates the setpoint from the selected end data and velocity data in conjunction with the programmed machine data. The actual value follows the selection. The deviation (following error) that occurs reaches a constant value after the short start-up phase and must reach zero at the end of the positioning operation.
S(t) a b t S s
a = Setpoint function b = Actual value function S = Following error
s = const
t
Figure 15-28. Course of a Following Error during a Positioning Operation
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Overview of the Operation Modes
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Table 15-8. Designation of the Operating Modes List of the Operating Modes
JOG 1 JOG 2 CONTROLLED JOG FOLLOW-UP MODE REFERENCE POINT INCREMENTAL ABSOLUTE INCREMENTAL RELATIVE AUTOMATIC
AUTOMATIC SINGLE BLOCK TEACH-IN ON TEACH-IN OFF ZERO OFFSET ABSOLUTE ZERO OFFSET RELATIVE CLEAR ZERO OFFSET TOOL OFFSET ON TOOL OFFSET OFF
ACKNOWLEDGE ERROR DRIFT COMPENSATION ON DRIFT COMPENSATION OFF RAM EEPROM READ ACTUAL POSITION READ FOLLOWING ERROR READ DISTANCE TO GO SYNCHRONIZE IP
The COM 266 software package offers user friendly operation and programming. The IP 266 exchanges all data with the programmable controller via a serial interface. All tasks written in 8-byte messages are sent to the IP 266 during the program cycle via the process output image table (PIQ). The IP 266 transmits feedback messages cyclically via the process image input table (PII). These messages can be about the actual value position, remaining traversing distance, or following error as well as a status byte, error byte, the current operation mode, and special data from the traversing program. Installation 1. Plug the IP 266 into a bus unit like any other I/O module (see chapter 3). 2. Insert the IP 266 only into slots 0 to 7. 3. Connect the external switches to the digital inputs of the IP 266 via the terminal block. These switches are used to limit the traversing range. They also allow you to intervene at any time into the processing of the module. - The IP 266 can bypass the STEP 5 OB1 cycle, via three digital outputs, and send signals directly to external I/Os. The controller must, however, be enabled (function signal enable controller, FUM) and must be connected to the power section of the drive. 4. Connect the servo motor's power section to the 9-pin subminiature D female connector. 5. Connect the incremental encoder to the left 15-pin subminiature D female connector ENCODER. You can connect a programmer with screen to the 15-pin subminiature D female connector on the right side to operate the IP 266 via the COM software.
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15.12 Stepper Motor Control Module IP 267
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Technical Specifications Supply voltage (BUS) Current consumption Special voltage VS Digital Inputs ABT US 5V ACT RDY Rated input voltage Galvanic isolation Input voltage: "0" signal "1" signal Input current Supply voltage for two-wire BEROs
(6ES5 267-8MA11)
9V approx. 150 mA 5 V to 30 V
24 V no - 33 V to 5 V 13 V to 33 V typ. 8.5 mA 22 V to 30 V
9-pin Subminiature D Connector Output voltage with 5-V supply "0" signal "1" signal With special supply voltage VS (5 V to 30 V) "0" signal "1" signal Output current STEPPER MOTOR
MODUL IP 267 6ES5 267-8MA11 12 3 4 5 6
max. min.
0.4 V 4.5 V
6
max. min.
0.4 V VS - 0.4 V 20 mA (short-circuit proof)
Output frequency Increment number of steps
+9 V GND Data US 5 V - L
max. max. max.
204 kHz 220 - 1 pulses/ job 50 m (165 ft.) at 50 kHz (twisted pair cable)
Permissible cable length
9V 5V
24 V f 5V G ASIC t RDY ACT ABT
1 2
3 4
5 6
7 8
9 10
+24 V
+US
EWA 4NEB 812 6120-02b
15-59
Function Modules
S5-100U
Because of its performance capability and the complexity of its description, the IP 267 has its own manual that you can order separately. The order number is: 6ES5 998-5SD21. The IP 267 Stepper www..com Motor Control Module expands the field of application as an intelligent I/O module (IP) of the S5-100U and S5-95U programmable controllers for "closed-loop control positioning". The IP 267 controls positioning processes independently of the run time of user programs in the programmable controller. The CPU is not loaded with processing positioning job operations. You can plug the IP 267 into slots 0 to 7 in the programmable controller. It then occupies addresses in the analog address area of the programmable controller. Principle of Operation The IP 267 generates pulses for the stepper motor power section. The number of output pulses determines the length of the traversing path. The pulse frequency is a measure of the velocity. Each pulse causes the stepper motor shaft to turn through a certain angle. In the case of high-speed pulse trains, this step movement becomes a constant rotational movement. Stepper motors can reproduce all movement sequences only as long as no steps are lost. Step losses can be caused when load variations occur or when the programmed pulse trains exceed motor-specific values. To enable the IP 267 to generate these pulse trains, the user must enter the following data: * * Configuration data: This data describes the individual stepper motors and the technical characteristics of the drive system. Positioning data: This data describes the individual traverse jobs and indicates the velocities, directions, and lengths of the configured paths.
The IP exchanges data with the programmable controller via the serial interface. During the program scans, all necessary information is sent from the process image output table (PIQ) to the IP 267 in 4-byte messages. The IP 267 cyclically transmits feedback signals on the remaining distance to go and various status bits to the process image input table (PII). Using the configuration and positioning data settings, the IP 267 generates a symmetrical traverse profile consisting of an acceleration ramp, a constant velocity range, and a deceleration ramp.
f fA
fss 1. Acceleration ramp 2. Constant stepping rate/velocity range 3. Deceleration ramp t
fss = Start/stop rate; fA = Stepping rate
Figure 15-29. Velocity Profile of the IP 267
15-60
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S5-100U
Function Modules
Using a limit switch on the digital inputs, IP 267 can monitor the limits of a traversing range and stop the traversing movement when the permissible range limit is exceeded. www..com The activated input "external stop" causes a calculated decelerating of the traversing movement. An emergency limit switch can be installed at input "IS" (pulse inhibit). When this switch responds, the pulse output is interrupted immediately. For a reference point approach operation, an additional switch can be connected at input REF that lies within the traversing zone. The reference point approach operation is also possible without this switch. Status LEDs provide you with the following information: * * * The IP 267 is configured Pulse outputs during a positioning operation Interruption of the positioning operation RDY ACT ABT
There are four operating modes: * * * * STOP START FORWARDS START BACKWARDS NEUTRAL
Installation 1. Plug the IP 267 into a bus unit like any other I/O module (see chapter 3). 2. Insert the IP 267 module only into slots 0 to 7. 3. Connect the external switches to the DIs of the IP 267 via the terminal block. 4. Connect the stepper motor's power section to the 9-pin subminiature D female connector. Addressing The IP 267 is addressed like an analog module.
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Function Modules
S5-100U
15.13 Communications Modules 15.13.1 Printer Communications Module CP 521SI
www..com
(6ES5 521-8MA22)
Technical Specifications Galvanic isolation Memory submodule Serial interface Transmission TTY signals are isolated EPROM/EEPROM V.24/TTY passive (active) Asynchronous 10-bit character frame/11-bit character frame 110 to 9600 baud 15 m (49.2 ft.) Results from: (Voltage drop on cable)+ (Receiver-typ. voltage drop 1.5 V) or (transmitter-typ. voltage drop 0.9 V) max. 1000 m (3281 ft.) Transmitting Receiving Ready to send Battery failure 3.6 V/850 mAh typ. 140 mA typ. 1.2 W approx. 500 g (1.1 lb.)
Transmission rate
TXD RXD RTS BATT Battery 3,4 V 850 mAh
Permissible cable length - V.24 - TTY
LED displays - TxD (green) - RxD (green) - RTS (green) - BATT (yellow) Back-up battery Lithium 1/2 AA
6
Current consumption from +9 V Power loss of module Weight
CP 521 SI
SERIAL INTERFACE 6ES5 521-8MA22 1 2 3 4 5 6
+9 V GND Data
V.24 TTY module
1 2
3 4
5 6
7 8
9 10
15-62
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S5-100U
Function Modules
The CP 521 SI (Serial Interface) communications module is a powerful I/O module with its own central processor. www..com A separate manual is available for this module. It can be ordered under the order number 6ES5 9981UD21. The following is an overview of the module's mode of operation. Function The CP 521 SI can be used for unidirectional and bidirectional data exchange. Unidirectional Data Exchange For unidirectional data traffic, the CP 521 is provided with a printer driver. If the printer driver is used, the following must be connected to the serial interface of the CP 521 SI: * * A printer with TTY interface (active) or A printer with V.24 (RS 232C) interface.
This enables you to log process states and process disturbances. The output of messages on the printer does not extend the response time of the programmable controller. The following messages and texts can be output: * * * Message texts, which you have configured on a memory submodule in data blocks DB 2 to 63. Time of day and date, which are provided by the module's own clock Values for variables which are transmitted to the CP 521 SI via the I/O bus.
The message texts are stored on an EPROM or EEPROM memory submodule (up to 8/16 Kbytes). Bidirectional Data Exchange The following drivers are implemented for the bidirectional data exchange: * * * * * * ASCII driver, transparent ASCII driver, interpreting mode I and interpreting mode II "3964(R)" driver SINEC L1 driver, master (point-to-point) SINEC L1 driver, slave Terminal driver
The use of these drivers enables the transmission of data frames between the CPU and an I/O device connected to the CP 521 SI.
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Function Modules
S5-100U
The maximum data flow rate is 6 bytes of user data per 2 program cycles; i.e. at a program cycle time of, for example, 50 ms a maximum of 60 bytes per second can be transmitted. www..com The following terminals and communications devices can be used as I/O devices: * * * * * * * * Keyboard Terminal Another CP 521 SI CP 523 S5-95U with second serial interface CP 524/CP 525-2 (in connection with special driver 6ES5 897-2AB11) CPU 944 (with ASCII driver, 3964(R) driver) Other I/O devices with serial interface, e.g. bar code readers
Which of the I/O devices and transmission modes are used depends on the intended application of data transmission. In the bidirectional data exchange mode of the module you are, for example, able to network programmable controllers (point-to-point link). I/O devices and CP 521 SI are connected with each other via a serial interface. Either a passive TTY interface or a 24 V voltage interface are available (programmable). Parameterizing (matching) of the I/O interface and configuring of the message texts are supported by the DB editor of programmers. The parameters of the I/O interface are stored either on a memory submodule in DB1 or are directly transmitted in the user program. The CP 521 SI can be programmed and operated wihtout the COM software. Integrated Real-Time Clock The CP 521 SI has it's own real-time clock which is battery-backed when the module is in the deenergized state. Independent of the type of function selected for the CP 521 SI, the clock data can be read from the CPU and can be used in the user program for date and time-dependent tasks. Installation * * * * As other I/O modules, the CP 521 SI is mounted on the bus unit (see chapter 3). Plug the module only into slots 0 to 7. The module has no connection to the terminal block. Connect the printer to the module via a 25-pin sub-D female connector.
Adressing The CP 521 SI is addressed like a 4-channel analog module.
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S5-100U
Function Modules
15.13.2
Communications Module CP 521 BASIC
(6ES5 521-8MB12)
www..com
Technical Specifications Galvanic isolation Memory submodule Serial interface TTY signals are isolated EPROM/EEPROM/ RAM V.24 (RS-232-C)/TTY, passive 1 s/day at 25 C (77 F) -10 to +70 C 1 s to -11 s according to data sheet 14.7456 MHz asynchronous 10-bit character frame/11-bit character frame 110 to 9600 Bd send data receive data ready to send battery low
RUN PROG
RXD TXD RTS BATT Battery 3,4V 850mAh
Real-time clock - accuracy - variation due to temperature change tV (ambient temperature TA in C)
Quartz frequency Transmission mode
Baud rate LEDs - TXD - RXD - RTS - BATT (yellow)
6
CP-521 BASIC
SERIAL INTERFACE 6ES5 521-8MB12 1 2 3 4 5 6
Permiss. length of cable - TTY dependent on: voltage drop on the +line - typical for receiver - typical for sender - V.24 Back-up battery lithium AA Life expectancy Degree of protection Permiss. ambient temperature - horizontal arrangement - vertical arrangement Relative humidity Current consumption from+9 V (CPU)
module
1.5 V+ 0.9 V 15 m (50 ft.) 3.4 V/850 mAh 1 year minimum IP20
+9 V GND Data
0 to 60 C (32 to 140 F) 0 to 40 C (32 to 104 F) 15% to 95%
BASIC Interpreter
+
typ. typ. approx.
180 mA 1.6 W 500 g (1 lb. 1.5 oz.)
V.24 TTY
Power loss of the module Weight
1 2
3 4
5 6
7 8
9 10
Note: It is only possible to run the CP 521 with the interrupt processing if the interrupts are disabled at the end of the OB1 cycle and enabled again at the beginning of the OB1 cycle.
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15-65
Function Modules
S5-100U
The CP 521 BASIC is a powerful peripheral module that can be used with the SIMATIC systems S5-90U, S5-95U, and the S5-100U. It has its own central processor (cannot be used with the www..com CPU 100, version 8MA01). A separate manual for this module is available. The order number is 6ES5 998-0UW21. A brief overview of the functions of this module follows.
Function This module comes with a special COM software package that is required for generating and storing BASIC programs (on a floppy disk or an EPROM submodule). Since the CP 521 includes a basic interpreter, you can create and run BASIC programs that exchange data with a CPU and a connected peripheral device. Use a programmer or a PC terminal and the COM software to program the BASIC interpreter. You can store the BASIC programs in the module's own battery backed-up RAM or on a plug-in memory submodule. Connect programmers or PC terminals to the CP 521 via a serial interface. You can choose (by setting parameters) between a passive TTY current-loop interface or a RS-232 C V.24 interface to connect a programmer or terminal. Connect a printer to the unidirectional V.24 interface of the module to print listings or messages. Change parameter settings for the peripheral interface by using a BASIC command or by using the BASIC program. The CP 521 has an integral real-time clock that can be backed up by a battery. You can use the clock data in unidirectional data traffic to log process statuses or process malfunctions.
Installation 1. Install the communications module on the bus module like any other I/O module (see chapter 3). 2. Plug the module only into slots 0 to 7. 3. The module has no connection to the terminal block. 4. Connect the printer to the module via a 25-pin sub-D female connector.
Addressing The module is addressed like a 4-channel analog module.
15-66
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www..com
Appendices Appendix A Appendix B Appendix C Appendix D Appendix E Appendix F
Operations List, Machine Code and List of Abbreviations Dimension Drawings Active and Passive Faults in Automation Equipment / Guidelines for Handling Electrostatic Sensitive Devices Information for Ordering Accessories Reference Materials Siemens Addresses Worldwide
EWA 4NEB 812 6120-02b
www..com
EWA 4NEB 812 6120-02b
www..com
A
Operations List, Machine Code and List of Abbreviations Operations List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Basic Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supplementary Operations ............................. System Operations, for CPU 102 and Higher . . . . . . . . . . . . . . . . . Evaluation of CC 1 and CC 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Machine Code Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A A A A A A A -1 -1 -8 - 13 - 14 - 15 - 18
A.1 A.1.1 A.1.2 A.1.3 A.1.4 A.2 A.3
EWA 4NEB 812 6120-02b
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EWA 4NEB 812 6120-02b
S5-100U
Operations List, Machine Code and List of Abbreviations
A
A.1 A.1.1
Operations List, Machine Code and Abbreviations
Operations List Basic Operations
For function blocks (FB) For sequence blocks (SB) Execution Time in s CPU 100 1 2 3 CPU 102 CPU 103 MA02 MA03 Function
www..com
For organization blocks (OB) For program blocks (PB) Operation (STL) Permissible Operands RLO*
Boolean Logic Operations
A I, Q F T C AN I, Q F T Z O I, Q F T C ON I, Q F T C O N N N N N N N N N N N N N N N N N Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y N N N N N N N N N N N N N N N N Y 41 7 1.6 0.8 Combine AND operations through logic OR. Combine expressions enclosed in parentheses through logic AND (6 nesting levels). Combine expressions enclosed in parentheses through logic OR (6 nesting levels). Close parentheses (conclusion of a parenthetical expression). typ. 80 4 1.6 0.8 Scan operand for "0" and combine with RLO through logic OR. typ. 75 4 1.6 0.8 Scan operand for "1" and combine with RLO through logic OR. typ. 75 4 1.6 0.8 Scan operand for "0" and combine with RLO through logic AND. typ. 70 4 1.6 0.8 Scan operand for "1" and combine with RLO through logic AND.
7
9
7
9
A(
N
Y
Y
61
6
1.6
0.8
O(
N
Y
Y
64
6
1.6
0.8
)
N
Y
N
51
13
1.6
0.8
Set/Reset Operations
S I, Q F * 1 RLO dependent ? Y Y N N Y Y typ. 70 7 1.6 0.8 Set operand to "1".
2 RLO affected ?
3 RLO reloaded ?
EWA 4NEB 812 6120-02b
A-1
Operations List, Machine Code and List of Abbreviations
S5-100U
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Set/Reset Operations (cont.)
R I, O F = I, O F Y Y N N N N N N Y Y Y Y typ. 70 typ. 70 7 1.6 0.8 Reset operand to "0".
6
1.6
0.8
Assign value of RLO to operand.
Load Operations
L IB N N N 59 14 1.6 0.8 Load an input byte from the PII into ACCU 1. Load an output byte from the PIQ into ACCU 1. Load an input word from the PII into ACCU 1: byte n ACCU 1 (bits 8-15); byte n+1 ACCU 1 (bits 0-7) Load an output word from the PIQ into ACCU 1: byte n ACCU 1 (bits 8-15); byte n+1 ACCU 1 (bits 0-7) Permissible in OB2 and OB13. Load an input byte of the digital/analog inputs from the interrupt PII into ACCU 1. Permissible in OB2 and OB13. Load an input byte of the digital/analog inputs from the interrupt PII into ACCU 1. Load a flag byte into ACCU 1. Load a flag word into ACCU 1: byte n ACCU 1 (bits 8-15); byte n+1 ACCU 1 (bits 0-7). Load a data word (left-hand byte) of the current data block into ACCU 1. Load a data word (right-hand byte) of the current data block into ACCU 1. Load a data word of the current data block into ACCU 1: byte n ACCU 1 (bits 8-15); byte n+1 ACCU 1 (bits 0-7).
L
QB
N
N
N
63
14
1.6
0.8
L
IW
N
N
N
59
17
1.6
0.8
L
QW
N
N
N
63
17
1.6
0.8
L
PY
--
--
N
--
--
91
68
L
PW
--
--
N
--
--
92
69
L L
FY FW
N N
N N
N N
64 71
14 17
1.6 1.6
0.8 0.8
L
DL
N
N
N
65
39
82
1.7
L
DR
N
N
N
65
41
83
1.7
L
DW
N
N
N
66
43
85
2.0
*
1 RLO dependent ?
2 RLO affected ?
3 RLO reloaded ?
A-2
EWA 4NEB 812 6120-02b
S5-100U
Operations List, Machine Code and List of Abbreviations
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Load Operations (cont.)
L KB N N N 54 7 59 1.45 Load a constant (1-byte number) into ACCU 1. Load a constant (2 characters in ASCII format) into ACCU 1. Load a constant (fixed-point number) into ACCU 1. Load a constant (hexadecimal code) into ACCU 1. Load a constant (bit pattern) into ACCU 1. Load a constant (2-byte number) into ACCU 1. Load a constant (time in BCD) into ACCU 1. Load a constant (count in BCD) into ACCU 1. Load a time or count (in binary code) into ACCU 1. Load times or counts (in BCD) into ACCU 1.
L
KS
N
N
N
57
7
1.6
0.8
L
KF
N
N
N
57
7
1.6
0.8
L
KH
N
N
N
57
7
1.6
0.8
L
KM
N
N
N
57
7
1.6
0.8
L
KY
N
N
N
57
7
1.6
0.8
L
KT
N
N
N
57
7
1.6
0.8
L
KC
N
N
N
57
7
1.6
0.8
L
T, C
N
N
N
typ. 70 125
19
1.6
0.8
LC
T C
N N
N N
N N
69
154
1.8
Transfer Operations
T IB N N N 51 5 1.6 0.8 Transfer the contents of ACCU 1 to an input byte (into the PII). Transfer the contents of ACCU 1 to an output byte (into the PIQ). Transfer the contents of ACCU 1 to an input word (into the PII): ACCU 1 (bits 8-15) byte n; ACCU 1 (bits 0-7) byte n+1. Transfer the contents of ACCU 1 to an output word (into the PIQ): ACCU 1 (bits 8-15) byte n; ACCU 1 (bits 0-7) byte n+1. Permissible in OB2 and OB13. Transfer the contents of ACCU 1 to the interrupt PIQ with updating of the PIQ.
T
QB
N
N
N
54
5
1.6
0.8
T
IW
N
N
N
53
11
1.6
0.8
T
QW
N
N
N
56
11
1.6
0.8
T
PY
--
--
N
--
--
60
37
*
1 RLO dependent ?
2 RLO affected ? 3 RLO reloaded ?
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A-3
Operations List, Machine Code and List of Abbreviations
S5-100U
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Transfer Operations (cont.)
T PW --N 67 51 Permissible in OB2 and OB13. Transfer the contents of ACCU 1 to the interrupt PIQ with updating of the PIQ. Transfer the contents of ACCU 1 to a flag byte. Transfer the contents of ACCU 1 to a flag word (into the PIQ): ACCU 1 (bits 8-15) byte n; ACCU 1 (bits 0-7) byte n+1. Transfer the contents of ACCU 1 to a data word (left-hand byte). Transfer the contents of ACCU 1 to a data word (righthand byte). Transfer the contents of ACCU 1 to a data word.
T
FY
N
N
N
55
5
1.6
0.8
T
FW
N
N
N
64
11
1.6
0.8
T
DL
N
N
N
53
31
75
1.15
T
DR
N
N
N
57
33
78
1.15
T
DW
N
N
N
59
36
81
1.4
Timer Operations
SP T Y N Y 125 74 147 1.9 Start a timer (stored in ACCU 1) as a signalcontracting pulse. Start a timer (stored in ACCU 1) as extended pulse (signal contracting and stretching). Start an on-delay timer (stored in ACCU 1). Start a stored on-delay timer (stored in ACCU 1). Start an off-delay timer (stored in ACCU 1). Reset a timer.
SE
T
Y
N
Y
125
74
147
1.9
SD
T
Y
N
Y
127
76
150
1.9
SS
T
Y
N
Y
127
76
150
1.9
SF
T
Y
N
Y
125
74
144
1.9
R
T
Y
N
Y
126
75
96
1.9
Counter Operations
CU CD * C C Y Y N N Y Y 79 92 42 31 105 117 1.9 1.9 Counter counts up 1. Counter counts down 1.
1 RLO dependent ?
2 RLO affected ?
3 RLO reloaded ?
A-4
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S5-100U
Operations List, Machine Code and List of Abbreviations
Oper- Permissible www..com ation Operands (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Counter Operations (cont.)
S R C C Y Y N N Y Y 118 69 67 12 141 96 1.9 1.9 Set counter. Reset counter.
Arithmetic Operations
+F N N N 55 26 1.6 0.8 Add two fixed-point numbers: ACCU 1+ACCU 2. CC 1/CC 0/OV are affected. Subtract one fixed-point number from another: ACCU 2 - ACCU 1. CC 1/CC 0/OV are affected.
-F
N
N
N
58
23
1.6
0.8
Comparison Operations
!=F N Y N 79 24 1.6 0.8 Compare two fixed-point numbers for "equal to": If ACCU 2=ACCU 1, the RLO is "1". CC 1/CC 0 are affected. Compare two fixed-point numbers for "not equal to": If ACCU 2 ACCU 1, the RLO is "1". CC 1/CC 0 are affected. Compare two fixed-point numbers for "greater than": If ACCU 2 > ACCU 1, the RLO is "1". CC 1/CC 0 are affected. Compare two fixed-point numbers for "greater than or equal to": If ACCU 2 ACCU 1, the RLO is "1". CC 1/CC 0 are affected. Compare two fixed-point numbers for "less than": If ACCU 2 < ACCU 1, the RLO is "1". CC 1/CC 0 are affected. Compare two fixed-point numbers for "less than or equal to": If ACCU 2 ACCU 1, the RLO is "1". CC 1/CC 0 are affected.
>N
Y
N
82
27
1.6
0.8
>F
N
Y
N
79
24
1.6
0.8
>=F
N
Y
N
79
24
1.6
0.8
N
Y
N
82
27
1.6
0.8
<=F
N
Y
N
82
27
1.6
0.8
*
1 RLO dependent ?
2 RLO affected ?
3 RLO reloaded ?
EWA 4NEB 812 6120-02b
A-5
Operations List, Machine Code and List of Abbreviations
S5-100U
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Block Call Operations
JU PB N N Y 125 49 185 3.35 Jump unconditionally to a program block. Jump unconditionally to a function block. Jump unconditionally to a sequence block. Jump conditionally to a program block. Jump conditionally to a function block. Jump conditionally to a sequence block. Call a data block. Generate or delete a data block.
JU
FB
N
N
Y
147
49
187
3.35
JU
SB
N
N
Y
--
--
185
3.35
JC
PB
Y Y1)
Y
130
53
190
3.35
JC
FB
Y Y1)
Y
152
53
196
3.35
JC
SB
Y Y1)
Y
--
--
194
3.35
C G
DB DB
N N
N N
N Y
70 --
28 --
79 233
1.75 182
Return Operations
BE N N Y 88 36 119 2.5 Block end (termination of a block) Block end, conditional Block end, unconditional (BEU cannot be used in organization blocks.)
BEC BEU
Y Y1) N N
Y Y
90 88
38 36
121 119
2.5 2.5
"No" Operations
NOP 0 NOP 1 N N N N N N 35 35 0 0 1.6 1.6 0.8 0.8 No operation (all bits reset) No operation (all bits set)
Stop Operations
STP N N N 35 1 53 25 Stop: scanning is still completed before a stop. Error ID "STS" is set in the ISTACK.
Display Generation Operations
BLD 130 N N N 35 0 1.6 0.8 Display generation operation for the programmer: carriage return generates blank line. Display generation operation for the programmer: switch to statement list (STL).
BLD 131 * 1 RLO dependent ? 1) RLO is set to "1".
N
N
N
35
0
1.6
0.8
2 RLO affected ?
3 RLO reloaded ?
A-6
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S5-100U
Operations List, Machine Code and Abbreviations
Oper- Permissible ation Operands www..com RLO* (STL) 1 2 3
Execution Time in s CPU 100 CPU 102 CPU 103 MA02 MA03
Function
Display Generation Operations (cont.)
BLD 132 BLD 133 BLD 255 * 1 RLO dependent ? N N N 35 0 1.6 0.8 Display generation operation for the programmer: switch to control system flowchart (CSF). Display generation operation for the programmer: switch to ladder diagram (LAD). Display generation operation for the programmer: terminate a segment.
N
N
N
35
0
1.6
0.8
N
N
N
35
0
1.6
0.8
2 RLO affected ?
3 RLO reloaded ?
EWA 4NEB 812 6120-02b
A-7
Operations List, Machine Code and Abbreviations
S5-100U
A.1.2 Supplementary Operations
www..com For organization blocks (OB)
For program blocks (PB) Operation (STL) Permissible Operands 1 RLO* CPU 100 2 3 For function blocks (FB) For sequence blocks (SB) Execution Time in s CPU 102 CPU 103 MA02 MA03 Function
Boolean Logic Operations
A= Formaloperand I, Q, F, T, C Formal operand I, Q, F, T, C Formal operand I, Q, F, T, C Formal operand I, Q, F, T, C N Y N --202 151 AND operation: scan formal operand for "1". (Data type: BI) AND operation: scan formal operand for "0". (Data type: BI) OR operation: scan formal operand for "1". (Data type: BI) OR operation: scan formal operand for "0". (Data type: BI) Combine contents of ACCU 2 and ACCU 1 through logic AND (word operation). Result is stored in ACCU 1. CC 1/CC 0 are affected. Combine contents of ACCU 2 and ACCU 1 through logic OR (word operation). Result is stored in ACCU 1. CC 1/CC 0 are affected. Combine contents of ACCU 2 and ACCU 1 through logic EXCLUSIVE OR (word operation). Result is stored in ACCU 1. CC 1/CC 0 are affected.
AN=
N
Y
N
--
--
202
151
O=
N
Y
N
--
--
202
151
ON=
N
Y
N
--
--
202
151
AW
N
N
N
53
19
1.6
0.8
OW
N
N
N
53
19
1.6
0.8
XOW
N
N
N
51
19
1.6
0.8
Bit Operations
TB T, C N Y N --187 123 Test a bit of a timer or counter word for "1". Test a bit of a data word for "1". Test a bit of a data word in the system data area for "1". Test a bit of a timer or counter word for "0".
TB
D
N
Y
N
--
--
187
144
TB
RS
N
Y
N
--
--
185
121
TBN
T, C
N
Y
N
--
--
188
124
*
1 RLO dependent ?
2 RLO affected ?
3 RLO reloaded ?
A-8
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Operations List, Machine Code and Abbreviations
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Bit Operations (cont.)
TBN D N Y N --188 145 Test a bit of a data word for "0". Test a bit of a data word in the system data area for "0". Set a bit of a timer or counter word unconditionally. Set a bit of a data word unconditionally. Reset a bit of a timer or counter word unconditionally. Reset a bit of a data word unconditionally.
TBN
RS
N
Y
N
--
--
186
122
SU
T, C
N
N
Y
--
--
180
125
SU
D
N
N
Y
--
--
183
146
RU
T, C
N
N
Y
--
--
189
124
RU
D
N
N
Y
--
--
189
146
Set/Reset Operations
S= Formal operand I, Q, F Formal operand I, Q, F Formal operand T, C Formal operand I, Q, F Y N Y --202 151 Set a formal operand (when RLO=1). (Data type: BI) Reset a formal operand (when RLO=1). (Data type: BI) Reset a formal operand (digital) (when RLO=1). Assign the value of the RLO to the status of the formal operand. (Data type: BI) Enable a timer/counter for cold restart. If RLO="1", - "FR T" restarts the timer - "FR C" sets, decrements, or increments the counter. Enable formal operand (timer/ counter) for cold restart (for detailed description, see "FR" operation). Start a timer (formal operand) as pulse with the value stored in ACCU 1.
RB=
Y
N
Y
--
--
203
152
RD=
Y
N
Y
--
--
197
147
==
N
N
Y
--
--
202
151
FR
T, C
Y
N
Y
--
--
98
1.9
FR=
Formal op. T, C
Y
N
Y
--
--
194**
145**
SP=
Formal op. T
Y
N
Y
--
--
194**
145**
* 1 RLO dependent ? 2 RLO affected ? ** +Execution of the substituted command
3 RLO reloaded ?
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Operations List, Machine Code and Abbreviations
S5-100U
Oper- Permissible www..com ation Operands (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Timer and Counter Operations (cont.)
SD= Formal op. T Formal op. T, C Y N Y --194** 145** Start an on-delay timer (formal operand) with the value stored in ACCU 1. Start a timer (formal operand) as an extended pulse with the value stored in ACCU 1, or set a counter (formal operand) with the next count value indicated. Start a stored on-delay timer (formal operand) with the value stored in ACCU 1, or increment a counter (formal operand). Start an off-delay timer (formal operand) with the value stored in ACCU 1, or decrement a counter (formal operand).
SEC =
Y
N
Y
--
--
194**
145**
SSU =
Formal op. T, C
Y
N
Y
--
--
194**
145**
SFD=
Formal op. T, C
Y
N
Y
--
--
194**
145**
Load and Transfer Operations
L= Formal operand I, Q, F, T, C N N N --142** 148** Load the value of the formal operand into ACCU 1. Data type: BY, W Additional actual operands: DL, DR, DW 61 Load a word from the system data area into ACCU 1.
L
RS
N
N
N
--
--
77
LD=
Formal operand T, C Formal operand
N
N
N
--
--
194**
145** Load the value of the formal operand in BCD code into ACCU 1. 76 Load a formal operand bit pattern into ACCU 1. Data type: D Parameter type: KC, KF, KH, KM, KS, KT, KY
LW=
N
N
N
--
--
152
T=
Formal operand I, Q, F
N
N
N
--
--
195**
149** Transfer the contents of ACCU 1 to the formal operand. Data type: BY, W Additional actual operands: DR, DL, DW
* 1 RLO dependent ? 2 RLO affected ? ** +Processing time for the substituted command
3 RLO reloaded ?
A-10
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Operations List, Machine Code and Abbreviations
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Conversion Operations
CFW N N N 42 4 1.6 0.8 Form the one's complement of ACCU 1. Form the two's complement of ACCU 1. CC 1/CC 0 and OV are affected.
CSW
N
N
N
60
23
1.6
0.8
Shift Operations
SLW Parameter n=0 to 15 N N N 47+ n*10 12+ n*10 1.6 0.8 Shift the contents of ACCU 1 to the left by the value specified in the parameter. Unassigned positions are padded with zeros. CC 1/CC 0 are affected. Shift the contents of ACCU 1 to the right by the value specified in the parameter. Unassigned positions are padded with zeros. CC 1/CC 0 are affected.
SRW
Parameter n=0 to 15
N
N
N
47+ n*10
12+ n*10
1.6
0.8
Jump Operations
JU= Symbolic address max. 4 characters Symbolic address max. 4 characters Symbolic address max. 4 characters N N N 62 2 1.6 0.8 Jump unconditionally to the symbolic address. Jump conditionally to the symbolic address. (If the RLO is "0", it is set to "1".) Jump if the result is zero. The jump is made only if CC 1=0 and CC 0=0. The RLO is not changed. Jump if the result is not zero. The jump is made only if CC 1 CC 0. The RLO is not changed. Jump if the sign of the result is "+". The jump is made only if CC 1=1 and CC 0=0. The RLO is not changed. Jump if the sign of the result is "-". The jump is made only if CC 1=0 and CC 0=1. The RLO is not changed. Jump on overflow. The jump is made only if the OVERFLOW bit is set. The RLO is not changed.
JC=
Y Y1)
Y
65
5
1.6
0.8
JZ=
N
N
N
69
6
1.6
0.8
JN=
Symbolic address max. 4 characters
N
N
N
69
10
1.6
0.8
JP=
Symbolic address max. 4 characters
N
N
N
71
6
1.6
0.8
JM=
Symbolic address max. 4 characters
N
N
N
71
6
1.6
0.8
JO=
Symbolic address max. 4 characters
N
N
N
65
4
1.6
0.8
* 1 RLO dependent ? 1) RLO is set to "1".
2 RLO affected ?
3 RLO reloaded ?
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Operations List, Machine Code and Abbreviations
S5-100U
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Other Operations
IA N N N --58 24 Disable interrupt. Input/ output interrupt or timer OB processing is disabled. Enable interrupt. This operation cancels the effect of IA. Decrement the low byte (bits 0 to 7) of ACCU 1 by the value n (n=0 to 255). Increment the low byte (bits 0 to 7) of ACCU 1 by the value n (n=0 to 255). Process a block. (Only C DB, JU OB, J U PB, JU FB, JU SB can be substituted.) Actual operands: C DB, JU OB, JU PB, JU FB, JU SB Process data word. The next operation is combined with the parameter specified in the data word (OR operation) and then carried out. Process flag word. The next operation is combined with the parameter specified in the flag word (OR operation) and then carried out.
RA
N
N
N
--
--
58
26
D
N
N
N
--
--
49
0,9
I
N
N
N
--
--
49
0,9
DO=
Formal operand
N
N
Y
--
--
252**
188**
DO
DW***
N
N
N
--
--
229
171
DO
FW***
N
N
N
--
--
179
138
* ** ***
1 RLO dependent ? 2 RLO affected ? +Processing time for the substituted command Permissible operations: A, AN, O, ON S, R=; FR T, RT, SF T, SD T, SP T, SS T, SE T; FR C, RC, SC, CU, CD C;
3 RLO reloaded ?
L, LC, T; JU, JC, JZ, JN, JP, JM, JO, SLW, SRW; D, I; C DB, T RS, TNB
A-12
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Operations List, Machine Code and Abbreviations
A.1.3 System Operations, for CPU 102 and Higher
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Operation (STL) Permissible Operands 1 RLO* CPU 100 2 3 Execution Time in s CPU 102 CPU 103 MA02 MA03 Function
Set Operations
SU RS N N Y --167 123 Set bit in system data area unconditionally. Reset bit in system data area unconditionally.
RU
RS
N
N
Y
--
--
167
123
Load and Transfer Operations
LIR N N N --105 76 Load the contents of a memory word (addressed by ACCU 1) indirectly into the register (0: ACCU 1; 2: ACCU 2). Transfer the register contents (0: ACCU 1; 2: ACCU 2) indirectly into the memory word (addressed by ACCU 1). Transfer a field byte by byte (number of bytes 0 to 255). Transfer a word to the system data area.
TIR
N
N
N
--
--
85
61
TNB
Parameter n=0 to 255 RS
N
N
N
--
13+n*19 (48+n*19) --
97+ n*21 71
75+ n*16 59
T
N
N
N
--
*
1 RLO dependent ?
2 RLO affected ?
3 RLO reloaded ?
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A-13
Operations List, Machine Code and Abbreviations
S5-100U
Oper- Permissible ation Operands www..com (STL) 1
RLO* CPU 100 2 3
Execution Time in s CPU 102 CPU 103 MA02 MA03
Function
Block Call Operations and Return Operations
JU OB N N Y --187 3.35 Call an organization block unconditionally. Call an organization block conditionally.
JC
OB
Y Y1)
Y
--
--
194
3.35
Jump Operation
JUR N N N --131 82 Jump at random within a function block (jump distance -32768 to + 32767)
Arithmetic Operations
ADD BF N N N --58 35 Add byte constant (fixed point) to ACCU 1. Add fixed-point constant (word) to ACCU 1.
ADD
KF
N
N
N
--
--
104
68
Other Operations
STS N N N --Stop operation. Program processing is interrupted immediately after this operation. 74 57 Swap the contents of ACCU 1 and ACCU 2.
TAK * 1 RLO dependent ? 1) RLO is set to "1"
N
N
N
--
--
2 RLO affected ?
3 RLO reloaded ?
A.1.4
Evaluation of CC 1 and CC 0
Arithmetic Operations
Result =0 Result <0 Result >0 Result 0
CC 1 CC 0 0 0
Digital Logic Operations
Result =0
Comparison Operations
ACCU 2 = ACCU 1 ACCU 2 < ACCU 1 ACCU 2 > ACCU 1
Shift Operations
shifted bit = 0
Conversion Operations
0
1
Result <0 shifted bit = 1 Result >0
1
0
A-14
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Operations List, Machine Code and List of Abbreviations
A.2
Machine Code Listing
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Machine Code B0
L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 R 0 1 2 3 4 5 6 7 8 8 9 A B C D E F 0 0 0 0 0 1 2 3 4 5 6 7 9 C D L 0 0 0d 0l 0d 0 0c 0c 0 8 0 0a 0a 0d 0i 0c 0c 8 8 8 8 F 0n 0a 0a 0d 0i 0c 0c 0n 0d 0f
Machine Code B3
Operation R NOP 0 CFW L TNB FR BEC FR= A= IA RA CSW L T LC JO= LC= 0 BLD BLD BLD BLD BLD I L T SF JP= SFD= S= D SE JC T FB FW FW T 130 131 132 133 255 FY FY T T T Operand L 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3
B1
R 0 0 0d 0l 0d 0 0c 0c 0 0 0 0a 0a 0d 0i 0c 0c 2 3 4 5 F 0n 0a 0a 0d 0i 0c 0c 0n 0d 0f L
B2
R L
B0
R E F 0 1 1 1 1 1 1 2 3 4 5 6 7 8 A B C D E F 0 0 0 0 0 0 0 2 3 4 L 0c 0c 0f 2 4 6 8 A C
B1
R 0c 0c 0f 0 0 0 0 0 0 0g 0g 0d 0i 0c 0c 0e 0g 0g 0d 0i 0c 0c 1 2 4 0 0 0 0 0g 0g 0d L
B2
R L
B3
R
Operation
Operand
SEC= == C >F =F <=F L T SD JM= SD= AN= L L T SS JU= SSU= ON= 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e 0e L L L L L L L L T SP KC KT KF KS KY KH KM DW DW T KB DR DR T DL DL T DB
0g 0g 0d 0i 0c 0c 0e 0g 0g 0d 0i 0c 0c 0 0 0 1 2 4 8 0g 0g 0d
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Operations List, Machine Code and List of Abbreviations
S5-100U
Machine Code
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Machine Code B3
Operation R JN= SI= RB= R JU RD= LW= LIR AW L FR JZ= L= TIR OW L L T T LC JC DO ADD XOW L L T T CD IW QW IW QW C PB KF IB QB IB QB C OB FW BF C C T FY Operand L 5 5 6 6 6 6 6 6 6 6 6 6 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
B0
L 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 5 5 R 5 6 7 C D E F 0 1 2 4 5 6 8 9 A A B B C D E 0 1 2 2 3 3 4 5 8 9 L 0i 0c 0c
B1
R 0i 0c 0c 0d 0f 0c 0c 0k 0 0o 0o 0i 0c 0k 0 0a 0a 0a 0a 0o 0f 0g 0e 0 0a 0a 0a 0a 0o 0f 0 0 L
B2
R L
B0
R C D 1 2 3 5 5 6 9 C D E 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 L
B1
R 0o 0f 0h 0g 0g 0 1 0c 0h 0o 0f 0g 0 2 3 5 5 5 5 5 5 5 5 6 6 6 6 7 7 7 7 C 8 4 0 C 8 4 0 C 8 4 0 C 8 4 0 L
B2
R L
B3
R
Operation
Operand
0o 0f 0h 0g 0g 0 0 0c 0h 0o 0f 0g 0 0 0 1 1 1 1 2 2 2 2 4 4 4 4 5 5 5 5
S JC SLW L T BE BEU T= SRW CU JU DO STS TAK 0 0 0 0 0 0 0 0 0b 0b 0b 0b 0b 0b 0b 0b 0o 0o 0o 0o 0d 0d 0d 0d 0g 0g 0g 0g 0g 0g 0g 0g 0o 0o 0o 0o 0d 0d 0d 0d 0g 0g 0g 0g 0g 0g 0g 0g STP TB TBN SU RU TB TBN SU RU TB TBN SU RU TB TBN SU RU
C SB
0d 0f 0c 0c 0 0 0o 0o 0i 0c 0 0 0a 8a 0a 8a 0o 0f 0g 0e 0 0a 8a 0a 8a 0o 0f 0 0
RS RS
C OB DW
C C C C T T T T D D D D RS RS RS RS
0e
0e
0e
0e
JC ADD -F
A-16
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Machine Code B1 B2
R 0a 0a 0f 0c 5 0 0a 0a 0o 0f 0 0a 0a 0a 0a 0a 0a 0a 0o 0o 0 0 0o 0o 0 0 0f 0f L R L
Machine Code B3
R L T JU DO= G +F L T R JU DI A O S = AN ON R A O A( O( AN ON C C F F F F F F F C C PW PW C SB DB PY PY PY Operation Operand L B C C C C D D D D E E E E F F F F F F F F F
B0
L 7 7 7 7 7 7 7 7 7 7 7 8 8 9 9 A A B B B B B B B R 2 3 5 6 8 9 A B C D E 0b 8b 0b 8b 0b 8b 0b 8 9 A B C D L
B0
R F 0b 0b 8b 8b 0b 0b 8b 8b 0b 0b 8b 8b 0b 0b 8 9 A B C D F L 0
B1
R 0 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0d 0d 0i 0 0d 0d F L
B2
R L
B3
R )
Operation
Operand
0a 0a 0f 0c 0 0 0a 0a 0o 0f 0 0a 0a 0a 0a 0a 0a 0a 0o 0o 0 0 0o 0o
0a 8a 0a 8a 0a 8a 0a 8a 0a 8a 0a 8a 0a 8a 0d 0d 0i 0 0d 0d F
A A O O S S = = AN AN ON ON R R A O JC= O AN ON NOP 1
I Q I Q I Q I Q I Q I Q I Q T T
T T
Explanation of the Indices a b c d e f g + byte address + bit address + parameter address + timer number + constant + block number + word address h i k l m n o + number of shifts + relative jump address + register address + block length in bytes + jump displacement (16 bits) + value + counter number
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Operations List, Machine Code and List of Abbreviabrations
S5-100U
A.3
List of Abbreviations
Permissible Operand Value Range for
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Abbreviation
Explanation CPU 100 CPU 102 CPU 103
ACCU 1
Accumulator 1
(When accumulator 1 is loaded, any existing contents are shifted into accumulator 2.)
ACCU 2 BF C
Accumulator 2 Byte constant (fixed-point number) Counter - retentive - non-retentive - for the "Bit Test" and "Set" supplementary operations Condition code 0/Condition code 1 DB1 parameter: input correction factor (integral real-time clock) DB1 parameter: clock data location Central processing unit of programmable controller STEP 5 control system flowchart method of representation Data (1 bit) Data block Data word (left-hand byte) Data word (right-hand byte) Data word DB1 parameter: SINEC L1, position of receive mailbox Flag Function block Flag byte - retentive - non-retentive - retentive - non-retentive (0.0 to 63.7) (64.0 to 127.7) (0 to 63) (0 to 63) (64 to 127) (0.0 to 63.7) (64.0 to 127.7) (0 to 63*) (0 to 63) (64 to 127) (0.0 to 63.7) (64.0 to 255.7) (0 to 255) (0 to 63) (64 to 255) (2 to 63) (0 to 255) (0 to 255) (0 to 255) (2 to 63) (0 to 255) (0 to 255) (0 to 255) (0.0 to 255.15) (2 to 255) (0 to 255) (0 to 255) (0 to 255) (- 127 to +127) (0 to 7) (8 to 15) (0 to 15) (- 127 to +127) (0 to 7) (8 to 127) (0 to 127) (- 127 to +127) (0 to 7) (8 to 127) (0 to 127) (0.0 to 127.15)
CC 0/CC 1 CF CLK CPU CSF D DB DL DR DW EF F FB FB/FY Formal operand FW I IB IW KB
Expression with a maximum of 4 characters. The first character must be a letter of the alphabet. Flag word Input Input byte Input word Constant (1 byte) - retentive - non-retentive (0 to 62) (64 to 126) (0.0 to 127.7) (0 to 127) (0 to 126) (0 to 255) (0 to 62) (64 to 126) (0.0 to 127.7) (0 to 127) (0 to 126) (0 to 255) (0 to 62) (64 to 254) (0.0 to 127.7) (0 to 127) (0 to 126) (0 to 255)
* +integrated FBs such as CPU 103
A-18
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Operations List, Machine Code and List of Abbreviabrations
Permissible Operand Value Range for
www..com Abbreviation
Explanation CPU 100 CPU 102 CPU 103
KBE KBS KC KF KH KM KS
DB1 parameter: SINEC L1, position of the "Receive" coordination byte DB1 parameter: SINEC L1, position of the "Send" coordination byte Constant (count) Constant (fixed-point number) Constant (hexadecimal code) Constant (2-byte bit pattern) Constant (2 characters) (0 to 999) (- 32,768 to +32,767) (0 to FFFF) (arbitrary bit pattern: 16 bit) (any two alphanumeric characters) (0.0 to 999.3) (0 to 255 each byte) (0 to 999) (- 32,768 to +32,767) (0 to FFFF) (arbitrary bit pattern: 16 bit) (any two alphanumeric characters) (0.0 to 999.3) (0 to 255 each byte) (0.0 to 999.3) (0 to 255 each byte) (0 to 999) (- 32,768 to +32,767) (0 to FFFF) (arbitrary bit pattern: 16 bit)
KT KY LAD NT OB
Constant (time) Constant (2 bytes) STEP 5-Ladder Diagram DB1 parameter: number of timers being processed Organization block for special applications: 1, 3, 13, 21, 22, 31, 34, 251 DB1 parameter: interval (ms) within which OB13 is called and processed DB1 parameter: enable operating hours counter DB1 parameter: set operating hours counter Operator panel Overflow. This condition code bit is set if, e.g., a numerical range is exceeded during arithmetic operations. Process image input table Process image output table Program block (with block call and return operations) Peripheral byte Programmer Peripheral word Output Output Byte Output word
(0 to 63)
(0 to 63)
(0 to 255)
OB13 OHE OHS OP OV
PII PIQ PB PY PG PW Q QB QW
(0 to 63)
(0 to 63)
(0 to 255) (0 to 127)
(0 to 126) (0.0 to 127.7) (0 to 127) (0 to 126) (0.0 to 127.7) (0 to 127) (0 to 126) (0.0 to 127.7) (0 to 127) (0 to 126)
* +integrated FBs such as CPU 103
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Operations List, Machine Code and List of Abbreviabrations
S5-100U
Permissible Operand Value Range for
www..com Abbreviation
Explanation CPU 100 CPU 102 CPU 103
RLO RLO affected? Y/N RLO dependent? Y Y /Y N
Result of logic operation The RLO is affected/not affected by the operation. The statement is executed only if the RLO is "1". The statement is executed only on positive/negative edge change of the RLO. The statement is always executed.
RLO reloaded? When the next binary operation takes place, the Y/N RLO is reloaded/not reloaded (e.g. A I 0.0). RS System data area - for load operations (supplementary operations) and transfer operations (system operations) - for bit test and set operations (system operations) STEP address counter DB1 parameter: Clock time after last switch from STOP RUN or save from last Power OFF Sequence block DB1 block ID for system data parameters DB1 parameter: Set clock/date DB1 parameter: SINEC L1, position of send mailbox DB1 block ID for SINEC L1 DB1 parameter: SINEC L1, slave number STEP 5 statement list method of representation DB1 parameter: update the clock while in the STOP state. DB1 parameter: status word location (integral real-time clock) Timer - for the "Bit Test" and "Set" supplementary operations DB1 block ID for timer function block DB1 parameter: set prompt time DB1 parameter: set scan time monitoring (0 to 15) (0 to 31) (0 to 127) (0.0 to 127.15) (0 to 255) (0 to 255) (0.0 to 255.15)
SAC SAV SB SDP SET SF SL1 SLN STL STP STW T
TFB TIS WD
* +integrated FBs such as CPU 103
A-20
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B
Dimension Drawings
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Figures
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B-1 B-2 B-3 B-4 B-5 B-6 B-7
Cross Sections of Standard Mounting Rails . . . . . . . . . . . . . . . . . . . . . . . . Dimension Drawing of the 483-mm (19-in.) Standard Mounting Rail . . . . . . . Dimension Drawing of the 530-mm (20.9-in.) Standard Mounting Rail . . . . . . Dimension Drawing of the 830-mm (32.7-in.) Standard Mounting Rail . . . . . . Dimension Drawing of the 2-m (6.6-ft.) Standard Mounting Rail . . . . . . . . . . Dimension Drawing of the S5-100U (CPU) . . . . . . . . . . . . . . . . . . . . . . . . Dimension Drawing of the Bus Unit (Crimp Snap-in Connections) with I/O Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-8 Dimension Drawing of the Bus Unit (SIGUT Screw-type Terminals) with I/O Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-9 Dimension Drawing of the IM 315 Interface Module . . . . . . . . . . . . . . . . . . B-10 Dimension Drawing of the IM 316 Interface Module (6ES5 316-8MA12) . . . . B-11 Dimension Drawing of the PS 930 and PS 931 Power Supply Modules ....
B B B B B B B B B B B
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1 1 2 2 2 3 4 5 6 7 8
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Dimension Drawings
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Dimensions are indicated in millimeters. The approximate equivalent in inches is indicated in parentheses. (1 mm=0.039 in. rounded off to the nearest tenth or hundredth of an inch)
15 1 2.5 (0.1) R 1.2 (0.05) 15
Deburred
2.5 (0.1) R 1.2 (0.05)
1
Deburred
Centerline for oblong hole
24 (1.0)
R 1.2 (0.05)
R 1.2 (0.05)
19 (0.8) 24 (1.0) 35 (1.4)
19 (0.8) 35 (1.4)
Deburred oblong hole
15 (0.6)
15 (0.6)
Figure B-1. Cross Sections of Standard Mounting Rails
8.7 (0.3) 163.8 (6.5)
465.1 (18.3) 155 (6.1)
7 (0.3)
482.6 (19.0)
11 (0.4)
Figure B-2. Dimension Drawing of the 483-mm (19-in.) Standard Mounting Rail
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15 (0.6) 25 (1.0) 20 x 25=500 (0.8 x 1.0=19.7)
5.2 (0.2)
18 (0.7) 530 (20.9)
Figure B-3. Dimension Drawing of the 530-mm (20.9-in.) Standard Mounting Rail
15 (0.6) 25 (1.0)
32 x 25=800 (1.26 x 1.0=31.5)
5.2 (0.2)
18 (0.7) 830 (32.7)
Figure B-4. Dimension Drawing of the 830-mm (32.7-in.) Standard Mounting Rail
2000 mm (6.6 ft.)
Figure B-5. Dimension Drawing of the 2-m (6.6-ft.) Standard Mounting Rail
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81 (3.2)
91.5 (3.6)
63.5 (2.5) 135 (5.3)
35 (1.4)
120 127 (4.1) (5)
40 (1.6) 10.8 (0.4)
Figure B-6.
Dimension Drawing of the S5 100U (CPU)
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Dimension Drawings
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135 (5.3)
85 (3.4)
127 (5)
81 (3.2) 135 (5.3)
with crimp snap-in connection (6ES5 700-8MA22)
Standard mounting rail EN 50022-35 x 15
91.5 (3.6)
45.75 (1.8)
Figure B-7. Dimension Drawing of the Bus Unit (Crimp Snap-in Connections) with I/O Module
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135 (5.3)
85 (3.4)
127 (5)
81 (3.2) 162 (6.4) with screw type terminals (6ES5 700-8MA11) Standard mounting rail EN 50022-35 x 15
91.5 (3.6) 45.75 (1.7)
Figure B-8. Dimension Drawing of the Bus Unit (SIGUT Screw-type Terminals) with I/O Module
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135 (5.3)
min. 210 (8.3) max. 570 (22.4)
81 (3.2)
135 (5.3)
13.5 (0.5)
45.4 (1.8)
26 (1) 35 (1.4)
Figure B-9.
Dimension Drawing of the IM 315 Interface Module
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45.4 (1.8)
min. 210 (8.3) max. 10000 (39.4) 81 (3.2)
135 (5.3)
13.5 (0.5)
26 (1) 35 (1.4)
Figure B-10. Dimension Drawing of the IM 316 Interface Module (6ES5 316-8MA12)
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135 (5.3)
120 (4.7) 127 (5)
81 (3.2)
Standard mounting rail EN 50022-35x15
45.4 (1.8)
Figure B-11. Dimension Drawing of the PS 930 and PS 931 Power Supply Modules
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Active and Passive Faults in Automation Equipment
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Active and Passive Faults in Automation Equipment/ESD Guidelines
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Active and Passive Faults in Automation Equipment / Guidelines for Handling Electrostatic Sensitive Devices
Active and Passive Faults in Automation Equipment
* Depending on the particular task for which the electronic automation equipment is used, both active as well as passive faults can result in a dangerous situation. For example, in drive control, an active fault is generally dangerous because it can result in an unauthorized startup of the drive. On the other hand, a passive fault in a signalling function can result in a dangerous operating state not being reported to the operator. The differentiation of the possible faults and their classification into dangerous and nondangerous faults, depending on the particular task, is important for all safety considerations in respect to the product supplied.
*
Warning
In all cases where a fault in automation equipment can result in severe personal injury or substantial property damage, i.e., where a dangerous fault can occur, additional external measures, additional external measures must be taken or equipment provided to ensure or force safe operating conditions even in the event of a fault (e.g., by means of independent limit monitors, mechanical interlocks, etc.).
Procedures for Maintenance and Repair If you are carrying out measurement or testing work on an active unit, you must adhere to the rules and regulations contained in the "VGB 4.0 Accident Prevention Regulations" of the German employers liability assurance association ("Berufsgenossenschaften"). Pay particular attention to paragraph 8, "Permissible exceptions when working on live parts." Do not attempt to repair an item of automation equipment. Such repairs may only be carried out by Siemens service personnel or repair shops Siemens has authorized to carry out such repairs.
The information in this manual is checked regularly for updating and correctness and may be modified without prior notice. The information contained in this manual is protected by copyright. Photocopying and translation into other languages is not permitted without express permission from Siemens.
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Guidelines for Handling Electrostatic Sensitive Devices (ESD)
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What is ESD? All electronic modules are equipped with large-scale integrated ICs or components. Due to their design, these electronic elements are very sensitive to overvoltages and thus to any electrostatic discharge. These Electrostatic Sensitive Devices are commonly referred to by the abbreviation ESD. Electrostatic sensitive devices are labelled with the following symbol:
!
Caution
Electrostatic sensitive devices are subject to voltages that are far below the voltage values that can still be perceived by human beings. These voltages are present if you touch a component module without previously being electrostatically discharged. In most cases, the damage caused by an overvoltage is not immediately noticeable and results in total damage only after a prolonged period of operation.
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Active and Passive Faults in Automation Equipment/ESD Guidelines
Electrostatic charging of objects and persons Every object with no conductive connection to the electrical potential of its surroundings can be charged electrostatically. In this way, voltages up to 15000 V can build up whereas minor charges, i.e. up to 100 V, are not relevant. Examples: * * * * * * * Plastic covers Plastic cups Plastic-bound books and notebooks Desoldering device with plastic parts Walking on plastic flooring Sitting on a padded chair Walking on a carpet (synthetic) up to 5000 V up to 5000 V up to 8000 V up to 8000 V up to 12000 V up to 15000 V up to 15000 V
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Limits for perceiving electrostatic discharges An electrostatic discharge is * * * perceptible from 3500 V audible from 4500 V visible from 5000 V
A fraction of those voltages is capable of destroying or damaging electronic devices. Carefully note ad apply the protective measures described below to protect and prolong the life of your modules and components.
General protective measures against electrostatic discharge damage * Keep plastics away from sensitive devices. Most plastic materials have a tendency to build up electrostatic charges easily. Make sure that the personnel, working surfaces and packaging are sufficiently grounded when handling electrostatic sensitive devices. If possible, avoid any contact with electrostatic sensitive devices. Hold modules without touching the pins of components or printed conductors. In this way, the discharged energy cannot affect the sensitive devices.
*
*
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Additional precautions for modules without housings Note the following measures that have to be taken for modules that are not protected against accidental contact: * Touch electrostatical sensitive devices only - if you wear a wristband complying with ESD specifications or - if you use special ESD footwear or ground straps when walking ona an ESD floor. Persons working on electronic devices should first discharge their bodies by touching grounded metallic parts (e.g. bare metal parts of switchgear cabinets, water pipes, etc.) Protect the modules against contact with chargeable and highly insulating materials, such as plastic foils, insulating table tops or clothes made of plastic fibres. Place electrostatic sensitive devices only on conductive surfaces: - Tables with ESD surfaces - Conductive ESD foam plastic (ESD foam plastic ismostly coloured black) - ESD bags Avoid direct contact of eletrostatic sensitive devices with visual display units, monitors or TV sets (minimum distance to screen > 10 cm).
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*
*
*
*
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Active and Passive Faults in Automation Equipment/ESD Guidelines
The following Figures once again illustrates the precautions for handling electrostatically sensitive devices. www..com a b c d e f g Conductive flooring material Table with conductive, grounded surface ESD footwear ESD smock Gounded ESD writstband Grounded connection of switchgear cabinet Grounded chair
d
b e
g c a f
Figure C-1. ESD Measures
Taking measurements and working on ESD modules Measurements may be taken on electrostatic sensitive devices only if * * the measuring device is grounded (e.g. via protective conductor) or the tip of the isolated measuring tool has previously been discharged (e.g. by briefly touching grounded metal parts).
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Information for Ordering Accessories
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Information for Ordering Accessories
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Information for Ordering Accessories
Order Numbers
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Standard 35 mm Mounting Rail for 19-in. cabinets, length 483 mm for 600 mm cabinets, length 530 mm for 900 mm cabinets, length 830 mm Length 2000 mm, without holes Power Supply Modules Power supply module PS 930 115/230 V AC; 1 A Replacement fuse (3A extra-fast) Power supply module PS 931 115/230 V AC; 24 V DC; 2 A (with electronic circuit protection) Power supply module PS 935 24 V DC; 9 V DC, 2.5 A Load power supply 6EW1 115/230 V AC; 24 V DC; 4 A 115/230 V AC; 24 V DC; 10 A Bus Units Bus unit with SIGUT screw-type terminals Bus unit with crimp snap-in terminals Interrupt bus unit, with SIGUT screw-type terminals Interrupt bus unit with crimp snap-in terminals Accessories Extracting tool for crimp snap-in connections Crimp snap-in contacts, 250 pieces Crimping tool for attaching the crimp contacts Interface Modules IM 315 interface module IM 316 interface module - Cable connectors (0.5 m/1.6 ft.) - Cable connectors (2.5 m/8.2 ft.) - Cable connectors (5.0 m/16.5 ft.) - Cable connectors (10 m/33 ft.)
6ES5 710-8MA11 6ES5 710-8MA21 6ES5 710-8MA31 6ES5 710-8MA41
6ES5 930-8MD11 6ES5 980-3BC61 6ES5 931-8MD11 6ES5 935-8ME11 6EW1 380-1AB 6EW1 380-4AB01 6ES5 700-8MA11 6ES5 700-8MA22 6ES5 700-8MB11 6ES5 700-8MB21
6ES5 497-8MA11 6XX3 070 6XX3 071 6ES5 315-8MA11 6ES5 316-8MA12 6ES5 712-8AF00 6ES5 712-8BC50 6ES5 712-8BF00 6ES5 712-8CB00
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S5-100U
Order Numbers Central Processing Units (CPUs) CPU 100 CPU 102 CPU 103 S5-100U System Manual (CPU 100, CPU 102, CPU 103) German English French Spanish Italian Accessories for the CPUs Back-up battery lithium AA; 3.4 V/850 mAh Memory submodule (EPROM) Memory submodule (EPROM) Memory submodule (EPROM) Memory submodule (EEPROM) Memory submodule (EEPROM) Memory submodule (EEPROM) Memory submodule (EEPROM) 4096 statements 8192 statements 16384 statements 1024 statements 2048 statements 4096 statements 8192 statements
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6ES5 100-8MA02 6ES5 102-8MA02 6ES5 103-8MA03
6ES5 998-0UB13 6ES5 998-0UB23 6ES5 998-0UB33 6ES5 998-0UB43 6ES5 998-0UB53
6ES5 980-0MB11 6ES5 375-1LA15 6ES5 375-1LA21 6ES5 375-1LA41 6ES5 375-0LC11 6ES5 375-0LC21 6ES5 375-0LC31 6ES5 375-0LC41
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Order Numbers Manual for IP 262 Closed-Loop Control Module German English French Italian Manual for IP 263 Positioning Module German English Manual for IP 264 Electronic Cam Controller Module German English Manual for IP 265 Closed-Loop Control Module German English French Manual for IP 266 Positioning Module German English Manual for IP 267 Stepper Motor Module German English French Spanish Digital Input Modules 8 x 5 to 24 V DC 4 x 24 V DC 8 x 24 V DC 16 x 24 V DC 8 x 24 V DC 4 x 24 to 60 V DC 4 x 115 V AC 8 x 115 V AC 4 x 230 V AC 8 x 230 V AC Digital Output Modules 8 x 5 to 24 V DC/0.1 A 4 x 24 V DC/0.5 A 4 x 24 V DC/2 A 8 x 24 V DC/0.5 A 8 x 24 V DC/0.5 A 4 x 24 to 60 V DC/0.5 A 4 x 115 to 230 V AC/1 A 8 x 115 to 230 V AC/0.5 A 4 relays x 30 V DC/230 V AC 8 relays x 30 V DC/230 V AC isolated 6ES5 998-5SD11 6ES5 998-5SD21 6ES5 998-5SD31 6ES5 998-5SD41 6ES5 433-8MA11 6ES5 420-8MA11 6ES5 421-8MA12 6ES5 422-8MA11 6ES5 431-8MA11 6ES5 430-8MB11 6ES5 430-8MC11 6ES5 431-8MC11 6ES5 430-8MD11 6ES5 431-8MD11 6ES5 453-8MA11 6ES5 440-8MA12 6ES5 440-8MA22 6ES5 441-8MA11 6ES5 451-8MA11 6ES5 450-8MB11 6ES5 450-8MD11 6ES5 451-8MD11 6ES5 452-8MR11 6ES5 451-8MR12 6ES5 980-3BC11 6ES5 998-5SC11 6ES5 998-5SC21 6ES5 998-5SH11 6ES5 998-5SH21 6ES5 998-5SH31 6ES5 998-5SL11 6ES5 998-5SL21 6ES5 998-5SK11 6ES5 998-5SK21 6ES5 998-5SG11 6ES5 998-5SG21 6ES5 998-5SG31 6ES5 998-5SG51
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isolated isolated isolated isolated isolated isolated isolated
isolated isolated isolated* isolated*
* Replacement fuse (10 A extra-fast)
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Order Numbers Digital Input/Output Module 24 V DC 16 inputs/16 outputs Accessories Front connector, 40-pin for crimp snap-in connection - with crimp contacts - without crimp contacts Front connector, 40-pin for screw-type connection - standard - increased EMC strength Analog Input Modules 4 x 50 mV 4 x 50 mV 4x1V 4 x 10 V 4 x 20 mA 4 x + 4 to 20 mA 2 x PT 100/ 500 mV 2 x PT 100/ 500 mV 4 x + 0 to 10 V Analog Output Modules 2 x 10 V 2 x 20 mA 2 x + 4 to 20 mA 2 x + 1 to 5 V
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6ES5 482-8MA13 6ES5 490-8MA13 6ES5 490-8MA03 6ES5 490-8MB11 6ES5 490-8FB11
isolated isolated isolated isolated isolated isolated isolated isolated isolated isolated isolated isolated isolated
6ES5 464-8MA11 6ES5 464-8MA21 6ES5 464-8MB11 6ES5 464-8MC11 6ES5 464-8MD11 6ES5 464-8ME11 6ES5 464-8MF11 6ES5 466-8MF21 6ES5 466-8MC11 6ES5 470-8MA12 6ES5 470-8MB12 6ES5 470-8MC12 6ES5 470-8MD12
Function Modules IP 262 Closed-loop control module - with 3 analog outputs - with 8 binary outputs IP 263 Positioning module IP 264 Electronic cam controller module IP 265 High Speed Sub Control IP 266 Positioning module IP 267 Stepper motor control module Diagnostic module 330 Timer module 380 2 x 0.3 to 300 s Counter module 2 x 0 to 500 Hz Counter module 385B 1 x 25/500 KHz Comparator module 461 2 x 1 to 20 mA/0.5 to 10 V CP 521 SI Printer output module CP 521 BASIC communications module Simulator 788 (digital input/output signals)
6ES5 262-8MA12 6ES5 262-8MB12 6ES5 263-8MA13 6ES5 264-8MA12 6ES5 265-8MA01 6ES5 266-8MA11 6ES5 267-8MA11 6ES5 330-8MA11 6ES5 380-8MA11 6ES5 385-8MA11 6ES5 385-8MB11 6ES5 461-8MA11 6ES5 521-8MA22 6ES5 521-8MB12 6ES5 788-8MA11
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Order Numbers Operator Panels and Programmers OP 393-III Operator Panel with connecting cable OP 393-III Operator guide, German PG 605U Programmer PG 605U Operator guide, German PG 720 Programmer PG 720 C Programmer PG 740 Programmer PG 760 Programmer (-> Catalog ST 59) Cable connector for connecting the OP 393-III to the CPU 3m 10 m 20 m Special lengths up to 1000 m (-> Catalog ST 80) Program Packages Basic Functions Program Package with description in German, English, and French for the S5-DOS operating system for the MS-DOS, S5-DOS/MT operating system Floating Point Arithmetic Program Package with description in German, English, and French for the S5-DOS operating system for the MS-DOS, S5-DOS/MT operating system GRAPH 5 Program Package with description in German, English, and French GRAPH 5 Mini Program Package German English French Spanish Italian S5-100U Program Package with description in German English Italian STEP 5 Package for Mini PLCs for PC Documentation for STEP 5 Package, German 6ES5 840-4BC11 6ES5 840-4BC21 6ES5 840-4BC51 6ES5 866-0MA02 6ES5 896-0MY11 6ES5 886-1SE11 6ES5 886-1SE21 6ES5 886-1SE31 6ES5 886-1SE41 6ES5 886-1SE51
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6ES5 393-0UA15 6ES5 998-0UQ12 6ES5 605-0UA11 6ES5 998-0UP11 6ES7 720-0AB00-0YA0 6ES7 720-1AB00-0YB0 6ES7 740-0AA00-0YA0 6ES7 760-1AA00-0YA0
6ES5 728-0BD00 6ES5 728-0CB00 6ES5 728-0CC00
6ES5 848-8AA01 6ES5 848-7AA01
6ES5 845-8GP01 6ES5 845-7GP01 6ES5 886-1FA01
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Reference Materials
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Reference Materials
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Reference Materials
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The following reference material can be ordered from your local Siemens Company or your local bookshop: * Automating with the SIMATIC(R) S5-115U Programmable Controllers Hans Berger Siemens AG, Berlin and Munich, 1989 (2nd Edition) (Order No.: ISBN 3-8009-1530-8) Programmable Controllers Basic Concepts Siemens AG, 1992 (Order No.: A19100-L531-F914-X-7600) Programming Primer for the SIMATIC(R) S5-90/95U Practical Exercises with the PG 710 Programmer Siemens AG, Berlin and Munich, 1992 Order No.: A19100-L531-F550-X-7600
*
*
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Siemens Addresses Worldwide
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Siemens Addresses Worldwide
Federal Republic of Germany (continued) Hanover Leipzig Mannheim Munich Nuremberg Saarbrucken Stuttgart Finland Siemens Osakeyhtio Helsinki France Siemens S.A. Paris, Saint-Denis Lyon, Caluire-et-Cuire Marseilles Metz Seclin (Lille) Strasbourg Great Britain Siemens Ltd. London, Sunbury-onThames Birmingham Bristol, Clevedon Congleton Edinburgh Glasgow Leeds Liverpool Newcastle Greece Siemens A.E. Athens Thessaloniki Hungary SICONTACT GmbH Budapest Iceland Smith & Norland H/F Reykjavik Ireland Siemens Ltd. Dublin Italy Siemens S. p. A. Milan Bari Bologna Brescia Casoria Florence Genoa Macomer Padua Rome Turin Luxemburg Siemens S.A. Luxembourg Malta J.R. Darmanin & Co., Ltd. Valletta Netherlands Siemens Nederland N.V. The Hague Norway Siemens A/S Oslo Bergen Stavanger Trondheim Poland PHZ Transactor S.A. Warsaw Gda sk-Letnica Katowice Portugal Siemens S.R.A.L. Lisbon Faro Leiria Porto
European Companies and Representatives
Austria Siemens AG Osterreich Vienna Bregenz Graz Innsbruck Klagenfurt Linz Salzburg Belgium Siemens S.A. Brussels Liege Siemens N.V. Brussels Antwerp Gent Bulgaria RUEN office of the INTERPRED corporation, agency of the Siemens AG Sofia Sofia Czechoslovakia EFEKTIM Engineering Consultants, Siemens AG Prague Denmark Siemens A/S Copenhagen, Ballerup Hojbjerg Federal Republic of Germany Branch offices of the Siemens AG Berlin Bremen Cologne Dortmund Dusseldorf Essen Frankfurt/Main Hamburg
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S5-100U
www..com Romania
Siemens birou de consulta ii tehnice Bukarest Spain Siemens S.A. Madrid Sweden Siemens AB Stockholm Eskilstuna Goteborg Jonkoping Lulea Malmo Sundsvall
Switzerland Siemens-Albis AG Zurich Bern Siemens-Albis S.A. Lausanne, Renens Turkey ETMA Istanbul Adana Ankara Bursa Izmir Samsun
USSR Siemens AG Agency Moscow Yugoslavia General Export OOUR Zastupstvo Belgrade Ljubljana Rijeka Sarajewo Skopje Zagreb
Non-European Companies and Representatives Africa
Algeria Siemens Bureau Alger Algier Angola Tecnidata Luanda Burundi SOGECOM Bujumbara Egypt Siemens Resident Engineers Cairo-Mohandessin Alexandria Centech Zamalek-Cairo Ethiopia Addis Electrical Engineering Ltd. Addis Abeba Ivory Coast Siemens AG Succursale Cote d'Ivoire Abidjan Kenya Achelis (Kenya) Ltd. Nairobi Libya Siemens AG Branch Office Libya Tripoli Mauritius Rey & Lenferna Ltd. Port Louis Morocco SETEL Societe Electrotechnique et de Telecommunications S.A. Casablanca Mozambique Siemens Resident Engineer Maputo Namibia Siemens Resident Engineer Windhoek Nigeria Electro Technologies Nigeria Ltd. (Eltec) Lagos Rwanda Etablissement Rwandais Kigali Simbabwe Electro Technologies Corporation (Pvt.) Ltd. Harare South Africa Siemens Ltd. Johannesburg Cape Town Durban Middleburg Newcastle Port Elizabeth Pretoria
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National Electrical & Commercial Company (NECC) Khartoum Swaziland Siemens (Pty.) Ltd. Mbabane Tanzania Tanzania Electrical Services Ltd. Dar-es-Salaam Tunesia Sitelec S.A. Tunis Zaire SOFAMATEL S.P.R.L. Kinshasa Zambia Electrical Maintenance Lusaka Ltd. Lusaka Mining projects: General Mining Industries Ltd. Kitwe
Brazil Siemens S.A. Sao Paulo Belem Belo Horizonte Brasilia Campinas Curitiba Florianopolis Fortaleza Porto Alegre Recife Rio de Janeiro Salvador de Bahia Vitoria Canada Siemens Electric Ltd. Montreal, Quebec Toronto, Ontario Chile INGELSAC Santiago de Chile Colombia Siemens S.A. Bogota Baranquilla Cali Medellin Costa Rica Siemens S.A. San Jose
Honduras Representaciones Electroindustriales S. de R.L. Tegucigalpa Mexico Siemens S.A. Mexico, D.F. Culiacan Gomez Palacio Guadalajara Leon Monterrey Puebla Nicaragua Siemens S.A. Managua Paraguay Rieder & Cia., S.A.C.I. Asuncion Peru Siemsa Lima Uruguay Conatel S.A. Montevideo Venezuela Siemens S.A. Caracas Valencia United States of America Siemens Industrial Automation Inc. Alpharetta, Georgia
America
Argentina Siemens S.A. Buenos Aires Bahia Blanca Cordoba Mendoza Rosario Bolivia Sociedad Comercial e Industrial Hansa Ltd. La Paz
Ecuador Siemens S.A. Quito OTESA Guayaquil Quito El Salvador Siemens S.A. San Salvador Guatemala Siemens S.A. Ciudad de Guatemala
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Bahrain Transitec Gulf Manama or Siemens Resident Engineer Abu Dhabi Bangladesh Siemens Bangladesh Ltd. Dhaka Hong Kong Jebsen & Co., Ltd. Hong Kong India Siemens India Ltd. Bombay Ahmedabad Bangalore Calcutta Madras New Dehli Secundarabad Indonesia P.T.Siemens Indonesia Jakarta P.T. Dian-Graha Elektrika Jakarta Bandung Medan Surabaya Iran Siemens Sherkate Sahami Khass Teheran Iraq Samhiry Bros. Co. (W.L.L.) Baghdad or Siemens AG (Iraq Branch) Baghdad Japan Siemens K.K. Tokyo
Jordan Siemens AG (Jordan Branch) Amman or A.R. Kevorkian Co. Amman Korea (Republic) Siemens Electrical Engineering Co., Ltd. Seoul Pusan Kuwait National & German Electrical and Electronic Service Co. (INGEECO) Kuwait, Arabia Lebanon Ets. F.A. Kettaneh S.A. Beirut Malaysia Siemens AG Malaysian Branch Kuala Lumpur Oman Waleed Associates Muscat or Siemens Resident Engineers Dubai Pakistan Siemens Pakistan Engineering Co., Ltd. Karachi Islamabad Lahore Peshawer Quetta Rawalpindi People's Republic of China Siemens Representative Office Beijing Guangzhou Shanghai
Philippine Islands Maschinen & Technik Inc. (MATEC) Manila Qatar Trags Electrical Engineering and Air Conditioning Co. Doha or Siemens Resident Engineer Abu Dhabi Saudi Arabia Arabia Electric Ltd. (Equipment) Jeddah Damman Riyadh Sri Lanka Dimo Limited Colombo Syria Siemens AG (Damascus Branch) Damascus Taiwan Siemens Liaison Office Taipei TAI Engineering Co., Ltd. Taipei Thailand B. Grimm & Co., R.O.P. Bangkok United Arab Emirates Electro Mechanical Co. Abu Dhabi or Siemens Resident Engineer Abu Dhabi Scientechnic Dubai or Siemens Resident Engineer Dubai
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Siemens Addresses Worldwide
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Yemen (Arab Republic) Tihama Tractors & Engineering Co.o., Ltd. Sanaa or Siemens Resident Engineer Sanaa
Australia
Australia Siemens Ltd. Melbourne Brisbane Perth Sydney New Zealand Siemens Liaison Office Auckland
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F-5
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Index
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S5-100U
Index
Index
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A
Accumulator Actual operand Addition Address - absolute - relative Address assignment - in RAM - in the system data area AM flag Analog input module Analog modules - addressing Analog output module Analog value - conversion - output of (FB251) - read in (FB250) - scaling (FB250) Argument Arithmetic operations - comparison - system Arithmetic unit ASCII mode Assigning parameters Automation equipment - fault 8-10, 8-12 7-14 8-31 5-9 5-10 6-7 6-15 6-16 12-10 11-1, 11-11 6-5 11-20 11-22 9-14, 11-25, 9-14, 11-17, 11-22 9-14, 11-22 9-5 8-30 8-67 2-5 15-63 9-1 C-1
Block - call operations - end symbol - header - ID - length - parameters - programming - structure - type Boolean logic operation Broken wire BSTACK Bus cable Bus terminal Bus unit - installing
8-33 9-4 7-8 9-1, 9-5, 9-10 7-7 7-14 7-8 7-6 - 7-8 7-5 8-2 11-7 5-11 13-1 13-1 2-2 3-3
C
CE marking Central Processing Unit (CPU) Circuit diagram Clock data - 12-hour mode - 24-hour mode - area - range definition Clock pulse generator Clock time correction factor Closed-loop control module Code converter - : 16 - : B4 Comment - symbol Communications module - CP 521 Basic - CP 521 SI Comparator module Comparison - operation Complement - one's - two's COMPRESS Condition code generation 14-1 2-1, 3-2 7-3 12-10 12-10 12-8, 12-9, 12-15 12-10 8-73 12-7, 12-35 15-41 9-12 9-12 9-6 9-6 15-62 15-65 15-62 15-1 8-30 8-50 8-50 7-30 8-69
B
Back-up battery BASIC - creating a program in Basic operations Battery - failure (OB34) Binary coded representation (BCD) Binary divider Binary scaler Bit pattern Bit test operation 4-8 15-66 8-1 4-8 9-14 7-31, 7-32 8-71 8-71 11-11 8-42
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Index
S5-100U
Control - deviation www..com - system flowchart (CSF) - variable - word Controller - continuous action Controller DB Conversion operation Coordination byte Receive (KBE) Coordination byte Send (KBS) Correction rate - algorithm Correction value Counter - loading - operation - resetting - scanning - setting Counter module - 25/500 kHz - 2x0 to 500 Hz Counting pulse sensor - connection of CPU Crimp-snap-in - connection method
9-21 7-2 9-12 9-19 9-15 9-15, 9-19 8-50 13-2, 13-10 13-2, 13-8 9-18 12-35 2-4, 8-26 - 8-29 8-25 8-25 8-28, 8-29 8-26 8-28, 8-29 15-17 15-12 15-21 2-1 3-10
Display generation operation Divider : 16 DO operation
8-39 9-13 8-54
E
Electromagnetic interference Electronic cam controller module Enable operation Equipotential bonding Error - address - analysis - indication - remedy - parameter error Expansion capability - maximum 3-22 15-49 8-41 3-31 5-9 5-1, 5-4, 5-5 5-1 5-4, 5-5 9-4, 9-8 2-8
F
Fault - automation equipment FB250 FB251 Field transfer Filler Flags FORCE VAR Formal operand Four wire circuit Function module - addressing Function block - calling - header - integrated - setting parameters
C-1
11-22, 11-23 11-25 8-66 9-1, 9-5 2-4, 7-3 12-19 8-58 11-6 6-7 7-5, 7-11 7-14 7-12 9-11 7-12, 7-15
D
Data block - calling - deleting - generating Data cycle - interupt Data exchange DB1 - function DB1 parameter - transfering - setting Decimal format Default DB1 Derivative action time Design - modular Diagnostic - module Digital input module Digital input/output module - address assignment Digital logic operation 7-5, 7-16 8-33, 8-35 8-33, 8-35 8-33, 8-35 2-7 2-7 13-7 9-1, 12-2 7-17 9-10, 12-2 9-9 9-10 7-32 9-1, 13-5 9-19, 9-21 1-2 15-9 3-13 3-18, 6-4 6-7 8-44
G
GRAPH 5 Grounding 7-1 3-30
H
Hexadecimal representation 7-31
I
IM IM 315 IM 316 Increment operation Input Input/output module 2-2 3-5 3-5 8-52 7-3 2-2
2
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Index
Installation of the S5-100U - electrical www..com - horizontally - mechanical - mechanical, with external I/Os - vertical Integral action time (TN) Interface - module - serial Interrupt - disable - PII - PIQ - reaction time Interrupt data cycle I/O bus I/O modules
3-1 3-20, 3-21 3-7 3-1 3-4 3-8 9-19 2-2, 3-5, 3-6 2-4 8-53 7-29, 10-3 7-29, 10-3 10-7 2-7 2-5, 2-6, 15-10 3-13, 5-12
O
OB2 OB13 OB21 OB22 On-delay - stored - timer Operand - areas - ID Operating hours counter Operating mode - changing - display - panel - start-up - switch Operating system Operation - basic - Boolean logic - set/reset - supplementary - system Organization block - integrated Output Overall reset 10-1, 10-4 7-28 7-24 7-24 8-22, 8-23 8-23 15-6 7-1 7-3 7-1 12-7, 12-30 4-2 4-1 4-2 4-2 4-1 2-7 7-1, 8-1 8-1 8-2 - 8-7 8-7 - 8-9 8-1 8-1 7-5, 7-9, 7-18 9-14 7-3 4-2
J
Jump - processing - operation 8-57 8-56
L
Ladder diagram (LAD) Leap year Lightning protection Linerization Load operation Loading a time 7-1 12-10 3-30 11-8 8-10, 8-11, 8-40, 8-64 8-14
P
Parameter - function block Parameter block Parameter error - correction - locating - recognizing Parameter error code - scanning Parameter name PID control algorithm (OB251) PM flag Position - decoding - resolution 7-12 9-1, 9-5 9-4 9-6 9-8 9-8 9-2, 9-7 9-6 9-5 9-15 12-10 15-29 15-19, 15-26, 15-30
M
Mode change Modular design Momentary contact relay/edge evaluation Monitoring Mounting rail - standard Multiplier: 16 7-21 1-2 8-71 5-10 2-2 9-16
N
Nesting depth "NO" operation Normal mode Number - format 7-6 8-38 7-19 7-31
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Index
S5-100U
Position sensor - connecting www..com Positioning - algorithm - closed-loop controlled - open-loop controlled Positioning module - IP 263 - IP 266 Power supply - frequency - module Printer communications module CP521 Printer mode Process image (PII, PIQ) Process image I/O tables - interrupt - PII - PIQ Processor Program - block - memory - structured Program check Program processing - cyclical - interrupt-driven - time-controlled Programmable controller - design Programming - linear - structured Prompt time Proportional gain PT 100 Pulse generator - connection of Pulse timer - extended
15-20, 15-2 15-57 9-18 15-60 15-56 15-45 15-55 11-7 2-1, 3-2, 3-12 3-20 15-62 15-63 2-4, 7-29 10-4 6-12 6-8, 6-10, 10-3 6-8, 6-11, 10-3 2-5 7-5, 7-11 2-4, 7-30 8-33 4-11 7-18 7-26 6-12, 7-29, 10-1 6-12, 7-28 2-1 7-4 7-5 12-6, 12-25 9-19 11-6 15-21 8-20 8-21
Real-time clock - integral - reading - setting Receive Mailbox (EF) Reference - point approach - pulse - signal - variable Reference potential Register contents - loading and transfering Removing the S5-100U Response time Retentive characteristics Retriggering - OB31 RLO
12-1 12-21 12-5, 12-21 13-2 15-31 15-32 15-32 9-21 11-1 8-65 3-1, 3-2 7-27 2-5 8-33 8-33
S
Sampling interval Scan cycle time trigger Scan monitoring time Screw-type - connection method SEARCH - function Send Mailbox (SF) Sensor lines Serial interface Sequence block Set operation Set/reset operation Setpoint Set time Setting parameters - for function blocks Shielding Shift operation Shift register - length Shunt resistor Simulator - module SINEC L1 - local area network 9-18, 9-21 7-26 7-26 3-18 3-9 5-11 4-11 13-2 11-19 2-4 7-5, 7-11 8-64 8-7 - 8-9 9-19, 9-21 15-5 7-15 3-29 8-48 2-6 2-8 11-5 15-7 13-1
R
Reaction time - interrupt 10-5
4
EWA 4NEB 812 6120-02b
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Index
Slave Slot addressing www..com SONAR BERO Start ID START-UP Starting up Statement list (STL) STATUS STATUS VAR Status word Stepper motor control STOP operation Substitution operation Subtraction operation Supplimentary operation System - data - operations - parameters System data area System data word System characteristics - defining in DB1
13-3, 13-5 6-1 11-23 9-4, 9-5 4-1, 7-24 4-4 7-1 4-8 4-9 12-12, 12-15 15-59 8-39 8-58 8-31 8-1, 8-31 6-16 8-1, 8-64 - 8-67 5-14 12-15 13-2 9-11
U
USTACK 5-1
W
Wiring - arrangement Wiring method - crimp-snap-in terminals - screw-type terminals 3-29 3-10 3-9
T
Terminal block Temperature - compensation Test function - STATUS Test mode Thermocouples Time - base - loading Time constant - dominant Timer - module - operation - reset - starting Transfer - operation Transfering a time Two's complement 3-10 11-3 11-8 4-8 7-19 11-2 8-17 8-16, 8-17 8-14, 8-17 9-21 8-15 - 8-24 15-4 8-15 8-15 8-15, 8-19 8-12 8-10, 8-11, 8-64 8-14 11-11
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5
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Siemens AG A&D AS E 148 Postfach 1963 D-92209 Amberg Federal Republic of Germany
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EWA 4NEB 812 6120-02b
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EWA 4NEB 812 6120-02b


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